lib/mpi: Fix building for powerpc with clang
0day reports over and over on an powerpc randconfig with clang: lib/mpi/generic_mpih-mul1.c:37:13: error: invalid use of a cast in a inline asm context requiring an l-value: remove the cast or build with -fheinous-gnu-extensions Remove the superfluous casts, which have been done previously for x86 and arm32 in commitdea632cadd
("lib/mpi: fix build with clang") and commit7b7c1df288
("lib/mpi/longlong.h: fix building with 32-bit x86"). Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://github.com/ClangBuiltLinux/linux/issues/991 Link: https://lore.kernel.org/r/20200413195041.24064-1-natechancellor@gmail.com
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@ -722,22 +722,22 @@ do { \
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do { \
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do { \
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if (__builtin_constant_p(bh) && (bh) == 0) \
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if (__builtin_constant_p(bh) && (bh) == 0) \
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__asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \
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__asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \
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: "=r" ((USItype)(sh)), \
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: "=r" (sh), \
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"=&r" ((USItype)(sl)) \
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"=&r" (sl) \
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: "%r" ((USItype)(ah)), \
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: "%r" ((USItype)(ah)), \
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"%r" ((USItype)(al)), \
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"%r" ((USItype)(al)), \
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"rI" ((USItype)(bl))); \
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"rI" ((USItype)(bl))); \
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else if (__builtin_constant_p(bh) && (bh) == ~(USItype) 0) \
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else if (__builtin_constant_p(bh) && (bh) == ~(USItype) 0) \
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__asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \
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__asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \
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: "=r" ((USItype)(sh)), \
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: "=r" (sh), \
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"=&r" ((USItype)(sl)) \
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"=&r" (sl) \
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: "%r" ((USItype)(ah)), \
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: "%r" ((USItype)(ah)), \
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"%r" ((USItype)(al)), \
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"%r" ((USItype)(al)), \
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"rI" ((USItype)(bl))); \
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"rI" ((USItype)(bl))); \
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else \
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else \
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__asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \
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__asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \
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: "=r" ((USItype)(sh)), \
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: "=r" (sh), \
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"=&r" ((USItype)(sl)) \
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"=&r" (sl) \
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: "%r" ((USItype)(ah)), \
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: "%r" ((USItype)(ah)), \
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"r" ((USItype)(bh)), \
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"r" ((USItype)(bh)), \
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"%r" ((USItype)(al)), \
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"%r" ((USItype)(al)), \
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@ -747,36 +747,36 @@ do { \
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do { \
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do { \
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if (__builtin_constant_p(ah) && (ah) == 0) \
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if (__builtin_constant_p(ah) && (ah) == 0) \
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__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \
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__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \
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: "=r" ((USItype)(sh)), \
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: "=r" (sh), \
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"=&r" ((USItype)(sl)) \
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"=&r" (sl) \
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: "r" ((USItype)(bh)), \
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: "r" ((USItype)(bh)), \
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"rI" ((USItype)(al)), \
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"rI" ((USItype)(al)), \
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"r" ((USItype)(bl))); \
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"r" ((USItype)(bl))); \
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else if (__builtin_constant_p(ah) && (ah) == ~(USItype) 0) \
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else if (__builtin_constant_p(ah) && (ah) == ~(USItype) 0) \
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__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \
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__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \
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: "=r" ((USItype)(sh)), \
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: "=r" (sh), \
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"=&r" ((USItype)(sl)) \
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"=&r" (sl) \
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: "r" ((USItype)(bh)), \
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: "r" ((USItype)(bh)), \
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"rI" ((USItype)(al)), \
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"rI" ((USItype)(al)), \
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"r" ((USItype)(bl))); \
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"r" ((USItype)(bl))); \
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else if (__builtin_constant_p(bh) && (bh) == 0) \
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else if (__builtin_constant_p(bh) && (bh) == 0) \
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__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \
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__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \
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: "=r" ((USItype)(sh)), \
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: "=r" (sh), \
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"=&r" ((USItype)(sl)) \
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"=&r" (sl) \
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: "r" ((USItype)(ah)), \
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: "r" ((USItype)(ah)), \
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"rI" ((USItype)(al)), \
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"rI" ((USItype)(al)), \
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"r" ((USItype)(bl))); \
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"r" ((USItype)(bl))); \
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else if (__builtin_constant_p(bh) && (bh) == ~(USItype) 0) \
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else if (__builtin_constant_p(bh) && (bh) == ~(USItype) 0) \
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__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \
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__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \
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: "=r" ((USItype)(sh)), \
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: "=r" (sh), \
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"=&r" ((USItype)(sl)) \
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"=&r" (sl) \
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: "r" ((USItype)(ah)), \
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: "r" ((USItype)(ah)), \
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"rI" ((USItype)(al)), \
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"rI" ((USItype)(al)), \
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"r" ((USItype)(bl))); \
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"r" ((USItype)(bl))); \
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else \
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else \
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__asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \
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__asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \
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: "=r" ((USItype)(sh)), \
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: "=r" (sh), \
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"=&r" ((USItype)(sl)) \
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"=&r" (sl) \
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: "r" ((USItype)(ah)), \
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: "r" ((USItype)(ah)), \
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"r" ((USItype)(bh)), \
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"r" ((USItype)(bh)), \
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"rI" ((USItype)(al)), \
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"rI" ((USItype)(al)), \
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@ -787,7 +787,7 @@ do { \
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do { \
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do { \
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USItype __m0 = (m0), __m1 = (m1); \
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USItype __m0 = (m0), __m1 = (m1); \
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__asm__ ("mulhwu %0,%1,%2" \
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__asm__ ("mulhwu %0,%1,%2" \
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: "=r" ((USItype) ph) \
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: "=r" (ph) \
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: "%r" (__m0), \
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: "%r" (__m0), \
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"r" (__m1)); \
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"r" (__m1)); \
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(pl) = __m0 * __m1; \
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(pl) = __m0 * __m1; \
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