ARM: plat-stmp3xxx: irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
This commit is contained in:
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0e60e117fb
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5b88128fd7
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@ -34,7 +34,7 @@ void __init stmp3xxx_init_irq(struct irq_chip *chip)
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/* Disable all interrupts initially */
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/* Disable all interrupts initially */
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for (i = 0; i < NR_REAL_IRQS; i++) {
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for (i = 0; i < NR_REAL_IRQS; i++) {
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chip->mask(i);
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chip->irq_mask(irq_get_irq_data(i));
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set_irq_chip(i, chip);
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set_irq_chip(i, chip);
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set_irq_handler(i, handle_level_irq);
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set_irq_handler(i, handle_level_irq);
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set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
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set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
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@ -351,27 +351,27 @@ void stmp3xxx_release_pin_group(struct pin_group *pin_group, const char *label)
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}
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}
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EXPORT_SYMBOL(stmp3xxx_release_pin_group);
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EXPORT_SYMBOL(stmp3xxx_release_pin_group);
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static int stmp3xxx_irq_to_gpio(int irq,
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static int stmp3xxx_irq_data_to_gpio(struct irq_data *d,
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struct stmp3xxx_pinmux_bank **bank, unsigned *gpio)
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struct stmp3xxx_pinmux_bank **bank, unsigned *gpio)
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{
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{
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struct stmp3xxx_pinmux_bank *pm;
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struct stmp3xxx_pinmux_bank *pm;
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for (pm = pinmux_banks; pm < pinmux_banks + NR_BANKS; pm++)
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for (pm = pinmux_banks; pm < pinmux_banks + NR_BANKS; pm++)
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if (pm->virq <= irq && irq < pm->virq + 32) {
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if (pm->virq <= d->irq && d->irq < pm->virq + 32) {
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*bank = pm;
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*bank = pm;
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*gpio = irq - pm->virq;
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*gpio = d->irq - pm->virq;
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return 0;
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return 0;
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}
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}
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return -ENOENT;
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return -ENOENT;
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}
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}
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static int stmp3xxx_set_irqtype(unsigned irq, unsigned type)
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static int stmp3xxx_set_irqtype(struct irq_data *d, unsigned type)
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{
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{
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struct stmp3xxx_pinmux_bank *pm;
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struct stmp3xxx_pinmux_bank *pm;
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unsigned gpio;
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unsigned gpio;
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int l, p;
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int l, p;
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stmp3xxx_irq_to_gpio(irq, &pm, &gpio);
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stmp3xxx_irq_data_to_gpio(d, &pm, &gpio);
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switch (type) {
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switch (type) {
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case IRQ_TYPE_EDGE_RISING:
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case IRQ_TYPE_EDGE_RISING:
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l = 0; p = 1; break;
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l = 0; p = 1; break;
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@ -398,33 +398,33 @@ static int stmp3xxx_set_irqtype(unsigned irq, unsigned type)
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return 0;
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return 0;
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}
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}
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static void stmp3xxx_pin_ack_irq(unsigned irq)
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static void stmp3xxx_pin_ack_irq(struct irq_data *d)
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{
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{
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u32 stat;
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u32 stat;
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struct stmp3xxx_pinmux_bank *pm;
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struct stmp3xxx_pinmux_bank *pm;
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unsigned gpio;
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unsigned gpio;
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stmp3xxx_irq_to_gpio(irq, &pm, &gpio);
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stmp3xxx_irq_data_to_gpio(d, &pm, &gpio);
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stat = __raw_readl(pm->irqstat) & (1 << gpio);
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stat = __raw_readl(pm->irqstat) & (1 << gpio);
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stmp3xxx_clearl(stat, pm->irqstat);
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stmp3xxx_clearl(stat, pm->irqstat);
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}
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}
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static void stmp3xxx_pin_mask_irq(unsigned irq)
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static void stmp3xxx_pin_mask_irq(struct irq_data *d)
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{
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{
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struct stmp3xxx_pinmux_bank *pm;
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struct stmp3xxx_pinmux_bank *pm;
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unsigned gpio;
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unsigned gpio;
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stmp3xxx_irq_to_gpio(irq, &pm, &gpio);
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stmp3xxx_irq_data_to_gpio(d, &pm, &gpio);
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stmp3xxx_clearl(1 << gpio, pm->irqen);
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stmp3xxx_clearl(1 << gpio, pm->irqen);
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stmp3xxx_clearl(1 << gpio, pm->pin2irq);
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stmp3xxx_clearl(1 << gpio, pm->pin2irq);
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}
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}
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static void stmp3xxx_pin_unmask_irq(unsigned irq)
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static void stmp3xxx_pin_unmask_irq(struct irq_data *d)
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{
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{
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struct stmp3xxx_pinmux_bank *pm;
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struct stmp3xxx_pinmux_bank *pm;
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unsigned gpio;
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unsigned gpio;
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stmp3xxx_irq_to_gpio(irq, &pm, &gpio);
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stmp3xxx_irq_data_to_gpio(d, &pm, &gpio);
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stmp3xxx_setl(1 << gpio, pm->irqen);
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stmp3xxx_setl(1 << gpio, pm->irqen);
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stmp3xxx_setl(1 << gpio, pm->pin2irq);
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stmp3xxx_setl(1 << gpio, pm->pin2irq);
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}
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}
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@ -503,10 +503,10 @@ static void stmp3xxx_gpio_irq(u32 irq, struct irq_desc *desc)
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}
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}
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static struct irq_chip gpio_irq_chip = {
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static struct irq_chip gpio_irq_chip = {
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.ack = stmp3xxx_pin_ack_irq,
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.irq_ack = stmp3xxx_pin_ack_irq,
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.mask = stmp3xxx_pin_mask_irq,
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.irq_mask = stmp3xxx_pin_mask_irq,
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.unmask = stmp3xxx_pin_unmask_irq,
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.irq_unmask = stmp3xxx_pin_unmask_irq,
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.set_type = stmp3xxx_set_irqtype,
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.irq_set_type = stmp3xxx_set_irqtype,
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};
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};
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int __init stmp3xxx_pinmux_init(int virtual_irq_start)
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int __init stmp3xxx_pinmux_init(int virtual_irq_start)
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@ -533,7 +533,7 @@ int __init stmp3xxx_pinmux_init(int virtual_irq_start)
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pm->virq = virtual_irq_start + b * 32;
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pm->virq = virtual_irq_start + b * 32;
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for (virq = pm->virq; virq < pm->virq; virq++) {
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for (virq = pm->virq; virq < pm->virq; virq++) {
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gpio_irq_chip.mask(virq);
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gpio_irq_chip.irq_mask(irq_get_irq_data(virq));
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set_irq_chip(virq, &gpio_irq_chip);
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set_irq_chip(virq, &gpio_irq_chip);
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set_irq_handler(virq, handle_level_irq);
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set_irq_handler(virq, handle_level_irq);
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set_irq_flags(virq, IRQF_VALID);
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set_irq_flags(virq, IRQF_VALID);
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