ARM: dts: sun7i: Add device nodes for display pipelines
The A20 has two interconnected display pipelines, mirroring the A10. Add all the device nodes for them, including the downstream HDMI controller that we already support. Signed-off-by: Jonathan Liu <net147@gmail.com> [wens@csie.org: Squashed in HDMI and provided commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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@ -228,6 +228,12 @@
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};
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};
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de: display-engine {
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compatible = "allwinner,sun7i-a20-display-engine";
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allwinner,pipelines = <&fe0>, <&fe1>;
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status = "disabled";
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};
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soc@1c00000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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@ -346,6 +352,104 @@
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#size-cells = <0>;
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};
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tcon0: lcd-controller@1c0c000 {
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compatible = "allwinner,sun7i-a20-tcon";
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reg = <0x01c0c000 0x1000>;
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interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&ccu RST_TCON0>;
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reset-names = "lcd";
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clocks = <&ccu CLK_AHB_LCD0>,
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<&ccu CLK_TCON0_CH0>,
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<&ccu CLK_TCON0_CH1>;
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clock-names = "ahb",
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"tcon-ch0",
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"tcon-ch1";
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clock-output-names = "tcon0-pixel-clock";
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dmas = <&dma SUN4I_DMA_DEDICATED 14>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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tcon0_in: port@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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tcon0_in_be0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&be0_out_tcon0>;
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};
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tcon0_in_be1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&be1_out_tcon0>;
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};
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};
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tcon0_out: port@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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tcon0_out_hdmi: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&hdmi_in_tcon0>;
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allwinner,tcon-channel = <1>;
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};
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};
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};
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};
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tcon1: lcd-controller@1c0d000 {
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compatible = "allwinner,sun7i-a20-tcon";
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reg = <0x01c0d000 0x1000>;
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interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&ccu RST_TCON1>;
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reset-names = "lcd";
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clocks = <&ccu CLK_AHB_LCD1>,
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<&ccu CLK_TCON1_CH0>,
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<&ccu CLK_TCON1_CH1>;
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clock-names = "ahb",
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"tcon-ch0",
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"tcon-ch1";
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clock-output-names = "tcon1-pixel-clock";
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dmas = <&dma SUN4I_DMA_DEDICATED 15>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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tcon1_in: port@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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tcon1_in_be0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&be0_out_tcon1>;
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};
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tcon1_in_be1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&be1_out_tcon1>;
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};
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};
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tcon1_out: port@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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tcon1_out_hdmi: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&hdmi_in_tcon1>;
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allwinner,tcon-channel = <1>;
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};
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};
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};
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};
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mmc0: mmc@1c0f000 {
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compatible = "allwinner,sun7i-a20-mmc";
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reg = <0x01c0f000 0x1000>;
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@ -470,6 +574,49 @@
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clock-names = "ahb", "mod";
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};
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hdmi: hdmi@1c16000 {
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compatible = "allwinner,sun7i-a20-hdmi",
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"allwinner,sun5i-a10s-hdmi";
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reg = <0x01c16000 0x1000>;
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interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>,
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<&ccu 9>,
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<&ccu 18>;
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clock-names = "ahb", "mod", "pll-0", "pll-1";
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dmas = <&dma SUN4I_DMA_NORMAL 16>,
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<&dma SUN4I_DMA_NORMAL 16>,
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<&dma SUN4I_DMA_DEDICATED 24>;
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dma-names = "ddc-tx", "ddc-rx", "audio-tx";
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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hdmi_in: port@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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hdmi_in_tcon0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&tcon0_out_hdmi>;
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};
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hdmi_in_tcon1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&tcon1_out_hdmi>;
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};
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};
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hdmi_out: port@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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};
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};
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};
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spi2: spi@1c17000 {
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compatible = "allwinner,sun4i-a10-spi";
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reg = <0x01c17000 0x1000>;
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@ -1104,5 +1251,165 @@
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#interrupt-cells = <3>;
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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};
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fe0: display-frontend@1e00000 {
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compatible = "allwinner,sun7i-a20-display-frontend";
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reg = <0x01e00000 0x20000>;
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interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_AHB_DE_FE0>, <&ccu CLK_DE_FE0>,
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<&ccu CLK_DRAM_DE_FE0>;
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clock-names = "ahb", "mod",
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"ram";
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resets = <&ccu RST_DE_FE0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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fe0_out: port@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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fe0_out_be0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&be0_in_fe0>;
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};
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fe0_out_be1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&be1_in_fe0>;
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};
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};
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};
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};
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fe1: display-frontend@1e20000 {
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compatible = "allwinner,sun7i-a20-display-frontend";
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reg = <0x01e20000 0x20000>;
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interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_AHB_DE_FE1>, <&ccu CLK_DE_FE1>,
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<&ccu CLK_DRAM_DE_FE1>;
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clock-names = "ahb", "mod",
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"ram";
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resets = <&ccu RST_DE_FE1>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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fe1_out: port@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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fe1_out_be0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&be0_in_fe1>;
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};
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fe1_out_be1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&be1_in_fe1>;
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};
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};
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};
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};
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be1: display-backend@1e40000 {
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compatible = "allwinner,sun7i-a20-display-backend";
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reg = <0x01e40000 0x10000>;
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interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_AHB_DE_BE1>, <&ccu CLK_DE_BE1>,
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<&ccu CLK_DRAM_DE_BE1>;
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clock-names = "ahb", "mod",
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"ram";
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resets = <&ccu RST_DE_BE1>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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be1_in: port@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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be1_in_fe0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&fe0_out_be1>;
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};
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be1_in_fe1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&fe1_out_be1>;
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};
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};
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be1_out: port@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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be1_out_tcon0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&tcon1_in_be0>;
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};
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be1_out_tcon1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&tcon1_in_be1>;
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};
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};
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};
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};
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be0: display-backend@1e60000 {
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compatible = "allwinner,sun7i-a20-display-backend";
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reg = <0x01e60000 0x10000>;
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interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
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<&ccu CLK_DRAM_DE_BE0>;
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clock-names = "ahb", "mod",
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"ram";
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resets = <&ccu RST_DE_BE0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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be0_in: port@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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be0_in_fe0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&fe0_out_be0>;
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};
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be0_in_fe1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&fe1_out_be0>;
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};
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};
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be0_out: port@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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be0_out_tcon0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&tcon0_in_be0>;
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};
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be0_out_tcon1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&tcon1_in_be0>;
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};
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};
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};
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};
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};
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};
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