Cleanup, SECCOMP_FILTER support, message printing fixes, and other
changes to arch/sh. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQEcBAABAgAGBQJfODUiAAoJELcQ+SIFb8Hau0wH/iPeZyv0EhIwL41OPrWhm5wb 26MNWPvPjYIpKVpr0HMXiffILv595ntvrH0Ujnh1+e8J2kRj0eT+T91UkoyGSfav oWmjgcG3NRK6p9882Oo8Xavjr1cTTclOmmDInR4lpAcfIBXkeq2eX0R1h2IuGdNM idGlXhJMkgV+xTlgZy7pYmw5pvFMqL5j7fAUQxm0UoY9kbu8Ac4bOR5WrqtFpkjt xTh9141YvSSfpRx9uMzrQLuUYGzGePhnjUGSUf/b1deYG/33lNtzhHr+QMK6BpXr zdhFalJP40+m+2tG0nCBpAIZcWiOLGb23in5n/trFx3BGZfUf5EKnhZEGUYeE7Q= =XWDn -----END PGP SIGNATURE----- Merge tag 'sh-for-5.9' of git://git.libc.org/linux-sh Pull arch/sh updates from Rich Felker: "Cleanup, SECCOMP_FILTER support, message printing fixes, and other changes to arch/sh" * tag 'sh-for-5.9' of git://git.libc.org/linux-sh: (34 commits) sh: landisk: Add missing initialization of sh_io_port_base sh: bring syscall_set_return_value in line with other architectures sh: Add SECCOMP_FILTER sh: Rearrange blocks in entry-common.S sh: switch to copy_thread_tls() sh: use the generic dma coherent remap allocator sh: don't allow non-coherent DMA for NOMMU dma-mapping: consolidate the NO_DMA definition in kernel/dma/Kconfig sh: unexport register_trapped_io and match_trapped_io_handler sh: don't include <asm/io_trapped.h> in <asm/io.h> sh: move the ioremap implementation out of line sh: move ioremap_fixed details out of <asm/io.h> sh: remove __KERNEL__ ifdefs from non-UAPI headers sh: sort the selects for SUPERH alphabetically sh: remove -Werror from Makefiles sh: Replace HTTP links with HTTPS ones arch/sh/configs: remove obsolete CONFIG_SOC_CAMERA* sh: stacktrace: Remove stacktrace_ops.stack() sh: machvec: Modernize printing of kernel messages sh: pci: Modernize printing of kernel messages ...
This commit is contained in:
commit
5bbec3cfe3
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@ -16,6 +16,7 @@ config M68K
|
|||
select HAVE_DEBUG_BUGVERBOSE
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||||
select GENERIC_IRQ_SHOW
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select GENERIC_ATOMIC64
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select NO_DMA if !MMU && !COLDFIRE
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select HAVE_UID16
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||||
select VIRT_TO_BUS
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||||
select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS
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||||
|
@ -59,9 +60,6 @@ config TIME_LOW_RES
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config NO_IOPORT_MAP
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def_bool y
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||||
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||||
config NO_DMA
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def_bool (MMU && SUN3) || (!MMU && !COLDFIRE)
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||||
|
||||
config ZONE_DMA
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bool
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default y
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|
|
|
@ -126,6 +126,7 @@ config SUN3
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depends on MMU
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depends on !MMU_MOTOROLA
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select MMU_SUN3 if MMU
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select NO_DMA
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select M68020
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help
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This option enables support for the Sun 3 series of workstations
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|
|
119
arch/sh/Kconfig
119
arch/sh/Kconfig
|
@ -1,75 +1,77 @@
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# SPDX-License-Identifier: GPL-2.0
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config SUPERH
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def_bool y
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select ARCH_HAS_BINFMT_FLAT if !MMU
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select ARCH_HAS_PTE_SPECIAL
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select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
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select ARCH_MIGHT_HAVE_PC_PARPORT
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select HAVE_PATA_PLATFORM
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select CLKDEV_LOOKUP
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select DMA_DECLARE_COHERENT
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select HAVE_IDE if HAS_IOPORT_MAP
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select HAVE_OPROFILE
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select HAVE_ARCH_TRACEHOOK
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select HAVE_PERF_EVENTS
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select HAVE_DEBUG_BUGVERBOSE
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select HAVE_FAST_GUP if MMU
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select ARCH_32BIT_OFF_T
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select ARCH_HAVE_CUSTOM_GPIO_H
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select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
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select ARCH_HAS_BINFMT_FLAT if !MMU
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select ARCH_HAS_GIGANTIC_PAGE
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select ARCH_HAS_GCOV_PROFILE_ALL
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select PERF_USE_VMALLOC
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select HAVE_DEBUG_KMEMLEAK
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select HAVE_KERNEL_GZIP
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select CPU_NO_EFFICIENT_FFS
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select HAVE_KERNEL_BZIP2
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select HAVE_KERNEL_LZMA
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select HAVE_KERNEL_XZ
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select HAVE_KERNEL_LZO
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select HAVE_UID16
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select ARCH_HAS_PTE_SPECIAL
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select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
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select ARCH_HIBERNATION_POSSIBLE if MMU
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select ARCH_MIGHT_HAVE_PC_PARPORT
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select ARCH_WANT_IPC_PARSE_VERSION
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select HAVE_SYSCALL_TRACEPOINTS
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select HAVE_REGS_AND_STACK_ACCESS_API
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select MAY_HAVE_SPARSE_IRQ
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select IRQ_FORCED_THREADING
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select RTC_LIB
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select CLKDEV_LOOKUP
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select CPU_NO_EFFICIENT_FFS
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select DMA_DECLARE_COHERENT
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select GENERIC_ATOMIC64
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select GENERIC_IRQ_SHOW
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select GENERIC_SMP_IDLE_THREAD
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select GENERIC_IDLE_POLL_SETUP
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select GENERIC_CLOCKEVENTS
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select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
|
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select GENERIC_IDLE_POLL_SETUP
|
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select GENERIC_IRQ_SHOW
|
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select GENERIC_PCI_IOMAP if PCI
|
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select GENERIC_SCHED_CLOCK
|
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select GENERIC_STRNCPY_FROM_USER
|
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select GENERIC_STRNLEN_USER
|
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select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
|
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select MODULES_USE_ELF_RELA
|
||||
select NO_GENERIC_PCI_IOPORT_MAP if PCI
|
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select OLD_SIGSUSPEND
|
||||
select OLD_SIGACTION
|
||||
select PCI_DOMAINS if PCI
|
||||
select HAVE_ARCH_AUDITSYSCALL
|
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select HAVE_FUTEX_CMPXCHG if FUTEX
|
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select HAVE_NMI
|
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select NEED_SG_DMA_LENGTH
|
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select ARCH_HAS_GIGANTIC_PAGE
|
||||
select ARCH_32BIT_OFF_T
|
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select GENERIC_SMP_IDLE_THREAD
|
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select GUP_GET_PTE_LOW_HIGH if X2TLB
|
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select HAVE_ARCH_AUDITSYSCALL
|
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select HAVE_ARCH_KGDB
|
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select HAVE_ARCH_SECCOMP_FILTER
|
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select HAVE_ARCH_TRACEHOOK
|
||||
select HAVE_COPY_THREAD_TLS
|
||||
select HAVE_DEBUG_BUGVERBOSE
|
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select HAVE_DEBUG_KMEMLEAK
|
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select HAVE_DYNAMIC_FTRACE
|
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select HAVE_FAST_GUP if MMU
|
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select HAVE_FUNCTION_GRAPH_TRACER
|
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select HAVE_FUNCTION_TRACER
|
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select HAVE_FUTEX_CMPXCHG if FUTEX
|
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select HAVE_FTRACE_MCOUNT_RECORD
|
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select HAVE_HW_BREAKPOINT
|
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select HAVE_IDE if HAS_IOPORT_MAP
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select HAVE_IOREMAP_PROT if MMU && !X2TLB
|
||||
select HAVE_KERNEL_BZIP2
|
||||
select HAVE_KERNEL_GZIP
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||||
select HAVE_KERNEL_LZMA
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||||
select HAVE_KERNEL_LZO
|
||||
select HAVE_KERNEL_XZ
|
||||
select HAVE_KPROBES
|
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select HAVE_KRETPROBES
|
||||
select HAVE_IOREMAP_PROT if MMU && !X2TLB
|
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select HAVE_FUNCTION_TRACER
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||||
select HAVE_FTRACE_MCOUNT_RECORD
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||||
select HAVE_DYNAMIC_FTRACE
|
||||
select ARCH_WANT_IPC_PARSE_VERSION
|
||||
select HAVE_FUNCTION_GRAPH_TRACER
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||||
select HAVE_ARCH_KGDB
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||||
select HAVE_HW_BREAKPOINT
|
||||
select HAVE_MIXED_BREAKPOINTS_REGS
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||||
select PERF_EVENTS
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select ARCH_HIBERNATION_POSSIBLE if MMU
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||||
select SPARSE_IRQ
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select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
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select HAVE_NMI
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||||
select HAVE_OPROFILE
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select HAVE_PATA_PLATFORM
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select HAVE_PERF_EVENTS
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||||
select HAVE_REGS_AND_STACK_ACCESS_API
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||||
select HAVE_UID16
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select HAVE_STACKPROTECTOR
|
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select HAVE_SYSCALL_TRACEPOINTS
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select IRQ_FORCED_THREADING
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||||
select MAY_HAVE_SPARSE_IRQ
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||||
select MODULES_USE_ELF_RELA
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||||
select NEED_SG_DMA_LENGTH
|
||||
select NO_DMA if !MMU && !DMA_COHERENT
|
||||
select NO_GENERIC_PCI_IOPORT_MAP if PCI
|
||||
select OLD_SIGACTION
|
||||
select OLD_SIGSUSPEND
|
||||
select PCI_DOMAINS if PCI
|
||||
select PERF_EVENTS
|
||||
select PERF_USE_VMALLOC
|
||||
select RTC_LIB
|
||||
select SPARSE_IRQ
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||||
help
|
||||
The SuperH is a RISC processor targeted for use in embedded systems
|
||||
and consumer electronics; it was also used in the Sega Dreamcast
|
||||
|
@ -123,8 +125,8 @@ config ARCH_HAS_ILOG2_U64
|
|||
|
||||
config NO_IOPORT_MAP
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def_bool !PCI
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depends on !SH_CAYMAN && !SH_SH4202_MICRODEV && !SH_SHMIN && \
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!SH_HP6XX && !SH_SOLUTION_ENGINE
|
||||
depends on !SH_SH4202_MICRODEV && !SH_SHMIN && !SH_HP6XX && \
|
||||
!SH_SOLUTION_ENGINE
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|
||||
config IO_TRAPPED
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||||
bool
|
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|
@ -136,8 +138,10 @@ config DMA_COHERENT
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|||
bool
|
||||
|
||||
config DMA_NONCOHERENT
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def_bool !DMA_COHERENT
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def_bool !NO_DMA && !DMA_COHERENT
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select ARCH_HAS_DMA_PREP_COHERENT
|
||||
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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||||
select DMA_DIRECT_REMAP
|
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|
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config PGTABLE_LEVELS
|
||||
default 3 if X2TLB
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||||
|
@ -630,7 +634,7 @@ config SMP
|
|||
Y to "Enhanced Real Time Clock Support", below.
|
||||
|
||||
See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO
|
||||
available at <http://www.tldp.org/docs.html#howto>.
|
||||
available at <https://www.tldp.org/docs.html#howto>.
|
||||
|
||||
If you don't know what to do here, say N.
|
||||
|
||||
|
@ -726,7 +730,6 @@ config ZERO_PAGE_OFFSET
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config BOOT_LINK_OFFSET
|
||||
hex
|
||||
default "0x00210000" if SH_SHMIN
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default "0x00400000" if SH_CAYMAN
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default "0x00810000" if SH_7780_SOLUTION_ENGINE
|
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default "0x009e0000" if SH_TITAN
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default "0x01800000" if SH_SDK7780
|
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|
|
|
@ -15,11 +15,7 @@ ifneq ($(SUBARCH),$(ARCH))
|
|||
endif
|
||||
endif
|
||||
|
||||
ifeq ($(ARCH),sh)
|
||||
KBUILD_DEFCONFIG := shx3_defconfig
|
||||
else
|
||||
KBUILD_DEFCONFIG := cayman_defconfig
|
||||
endif
|
||||
|
||||
isa-y := any
|
||||
isa-$(CONFIG_SH_DSP) := sh
|
||||
|
@ -143,7 +139,6 @@ machdir-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp
|
|||
machdir-$(CONFIG_SH_SH4202_MICRODEV) += mach-microdev
|
||||
machdir-$(CONFIG_SH_LANDISK) += mach-landisk
|
||||
machdir-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2
|
||||
machdir-$(CONFIG_SH_CAYMAN) += mach-cayman
|
||||
machdir-$(CONFIG_SH_RSK) += mach-rsk
|
||||
|
||||
ifneq ($(machdir-y),)
|
||||
|
|
|
@ -340,12 +340,6 @@ config SH_MAGIC_PANEL_R2
|
|||
help
|
||||
Select Magic Panel R2 if configuring for Magic Panel R2.
|
||||
|
||||
config SH_CAYMAN
|
||||
bool "Hitachi Cayman"
|
||||
depends on CPU_SUBTYPE_SH5_101 || CPU_SUBTYPE_SH5_103
|
||||
select HAVE_PCI
|
||||
select ARCH_MIGHT_HAVE_PC_SERIO
|
||||
|
||||
config SH_POLARIS
|
||||
bool "SMSC Polaris"
|
||||
select CPU_HAS_IPR_IRQ
|
||||
|
|
|
@ -126,14 +126,14 @@ static void __init sh2007_init_irq(void)
|
|||
*/
|
||||
static void __init sh2007_setup(char **cmdline_p)
|
||||
{
|
||||
printk(KERN_INFO "SH-2007 Setup...");
|
||||
pr_info("SH-2007 Setup...");
|
||||
|
||||
/* setup wait control registers for area 5 */
|
||||
__raw_writel(CS5BCR_D, CS5BCR);
|
||||
__raw_writel(CS5WCR_D, CS5WCR);
|
||||
__raw_writel(CS5PCR_D, CS5PCR);
|
||||
|
||||
printk(KERN_INFO " done.\n");
|
||||
pr_cont(" done.\n");
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -1,5 +0,0 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
#
|
||||
# Makefile for the Hitachi Cayman specific parts of the kernel
|
||||
#
|
||||
obj-y := setup.o irq.o panic.o
|
|
@ -1,148 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* arch/sh/mach-cayman/irq.c - SH-5 Cayman Interrupt Support
|
||||
*
|
||||
* This file handles the board specific parts of the Cayman interrupt system
|
||||
*
|
||||
* Copyright (C) 2002 Stuart Menefy
|
||||
*/
|
||||
#include <linux/io.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/signal.h>
|
||||
#include <cpu/irq.h>
|
||||
#include <asm/page.h>
|
||||
|
||||
/* Setup for the SMSC FDC37C935 / LAN91C100FD */
|
||||
#define SMSC_IRQ IRQ_IRL1
|
||||
|
||||
/* Setup for PCI Bus 2, which transmits interrupts via the EPLD */
|
||||
#define PCI2_IRQ IRQ_IRL3
|
||||
|
||||
unsigned long epld_virt;
|
||||
|
||||
#define EPLD_BASE 0x04002000
|
||||
#define EPLD_STATUS_BASE (epld_virt + 0x10)
|
||||
#define EPLD_MASK_BASE (epld_virt + 0x20)
|
||||
|
||||
/* Note the SMSC SuperIO chip and SMSC LAN chip interrupts are all muxed onto
|
||||
the same SH-5 interrupt */
|
||||
|
||||
static irqreturn_t cayman_interrupt_smsc(int irq, void *dev_id)
|
||||
{
|
||||
printk(KERN_INFO "CAYMAN: spurious SMSC interrupt\n");
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
static irqreturn_t cayman_interrupt_pci2(int irq, void *dev_id)
|
||||
{
|
||||
printk(KERN_INFO "CAYMAN: spurious PCI interrupt, IRQ %d\n", irq);
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
static void enable_cayman_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned int irq = data->irq;
|
||||
unsigned long flags;
|
||||
unsigned long mask;
|
||||
unsigned int reg;
|
||||
unsigned char bit;
|
||||
|
||||
irq -= START_EXT_IRQS;
|
||||
reg = EPLD_MASK_BASE + ((irq / 8) << 2);
|
||||
bit = 1<<(irq % 8);
|
||||
local_irq_save(flags);
|
||||
mask = __raw_readl(reg);
|
||||
mask |= bit;
|
||||
__raw_writel(mask, reg);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
static void disable_cayman_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned int irq = data->irq;
|
||||
unsigned long flags;
|
||||
unsigned long mask;
|
||||
unsigned int reg;
|
||||
unsigned char bit;
|
||||
|
||||
irq -= START_EXT_IRQS;
|
||||
reg = EPLD_MASK_BASE + ((irq / 8) << 2);
|
||||
bit = 1<<(irq % 8);
|
||||
local_irq_save(flags);
|
||||
mask = __raw_readl(reg);
|
||||
mask &= ~bit;
|
||||
__raw_writel(mask, reg);
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
struct irq_chip cayman_irq_type = {
|
||||
.name = "Cayman-IRQ",
|
||||
.irq_unmask = enable_cayman_irq,
|
||||
.irq_mask = disable_cayman_irq,
|
||||
};
|
||||
|
||||
int cayman_irq_demux(int evt)
|
||||
{
|
||||
int irq = intc_evt_to_irq[evt];
|
||||
|
||||
if (irq == SMSC_IRQ) {
|
||||
unsigned long status;
|
||||
int i;
|
||||
|
||||
status = __raw_readl(EPLD_STATUS_BASE) &
|
||||
__raw_readl(EPLD_MASK_BASE) & 0xff;
|
||||
if (status == 0) {
|
||||
irq = -1;
|
||||
} else {
|
||||
for (i=0; i<8; i++) {
|
||||
if (status & (1<<i))
|
||||
break;
|
||||
}
|
||||
irq = START_EXT_IRQS + i;
|
||||
}
|
||||
}
|
||||
|
||||
if (irq == PCI2_IRQ) {
|
||||
unsigned long status;
|
||||
int i;
|
||||
|
||||
status = __raw_readl(EPLD_STATUS_BASE + 3 * sizeof(u32)) &
|
||||
__raw_readl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff;
|
||||
if (status == 0) {
|
||||
irq = -1;
|
||||
} else {
|
||||
for (i=0; i<8; i++) {
|
||||
if (status & (1<<i))
|
||||
break;
|
||||
}
|
||||
irq = START_EXT_IRQS + (3 * 8) + i;
|
||||
}
|
||||
}
|
||||
|
||||
return irq;
|
||||
}
|
||||
|
||||
void init_cayman_irq(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
epld_virt = (unsigned long)ioremap(EPLD_BASE, 1024);
|
||||
if (!epld_virt) {
|
||||
printk(KERN_ERR "Cayman IRQ: Unable to remap EPLD\n");
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < NR_EXT_IRQS; i++) {
|
||||
irq_set_chip_and_handler(START_EXT_IRQS + i,
|
||||
&cayman_irq_type, handle_level_irq);
|
||||
}
|
||||
|
||||
/* Setup the SMSC interrupt */
|
||||
if (request_irq(SMSC_IRQ, cayman_interrupt_smsc, 0, "Cayman SMSC Mux",
|
||||
NULL))
|
||||
pr_err("Failed to register Cayman SMSC Mux interrupt\n");
|
||||
if (request_irq(PCI2_IRQ, cayman_interrupt_pci2, 0, "Cayman PCI2 Mux",
|
||||
NULL))
|
||||
pr_err("Failed to register Cayman PCI2 Mux interrupt\n");
|
||||
}
|
|
@ -1,46 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2003 Richard Curnow, SuperH UK Limited
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/io.h>
|
||||
#include <cpu/registers.h>
|
||||
|
||||
/* THIS IS A PHYSICAL ADDRESS */
|
||||
#define HDSP2534_ADDR (0x04002100)
|
||||
|
||||
static void poor_mans_delay(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 2500000; i++)
|
||||
cpu_relax();
|
||||
}
|
||||
|
||||
static void show_value(unsigned long x)
|
||||
{
|
||||
int i;
|
||||
unsigned nibble;
|
||||
for (i = 0; i < 8; i++) {
|
||||
nibble = ((x >> (i * 4)) & 0xf);
|
||||
|
||||
__raw_writeb(nibble + ((nibble > 9) ? 55 : 48),
|
||||
HDSP2534_ADDR + 0xe0 + ((7 - i) << 2));
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
panic_handler(unsigned long panicPC, unsigned long panicSSR,
|
||||
unsigned long panicEXPEVT)
|
||||
{
|
||||
while (1) {
|
||||
/* This piece of code displays the PC on the LED display */
|
||||
show_value(panicPC);
|
||||
poor_mans_delay();
|
||||
show_value(panicSSR);
|
||||
poor_mans_delay();
|
||||
show_value(panicEXPEVT);
|
||||
poor_mans_delay();
|
||||
}
|
||||
}
|
|
@ -1,181 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* arch/sh/mach-cayman/setup.c
|
||||
*
|
||||
* SH5 Cayman support
|
||||
*
|
||||
* Copyright (C) 2002 David J. Mckay & Benedict Gaster
|
||||
* Copyright (C) 2003 - 2007 Paul Mundt
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <cpu/irq.h>
|
||||
|
||||
/*
|
||||
* Platform Dependent Interrupt Priorities.
|
||||
*/
|
||||
|
||||
/* Using defaults defined in irq.h */
|
||||
#define RES NO_PRIORITY /* Disabled */
|
||||
#define IR0 IRL0_PRIORITY /* IRLs */
|
||||
#define IR1 IRL1_PRIORITY
|
||||
#define IR2 IRL2_PRIORITY
|
||||
#define IR3 IRL3_PRIORITY
|
||||
#define PCA INTA_PRIORITY /* PCI Ints */
|
||||
#define PCB INTB_PRIORITY
|
||||
#define PCC INTC_PRIORITY
|
||||
#define PCD INTD_PRIORITY
|
||||
#define SER TOP_PRIORITY
|
||||
#define ERR TOP_PRIORITY
|
||||
#define PW0 TOP_PRIORITY
|
||||
#define PW1 TOP_PRIORITY
|
||||
#define PW2 TOP_PRIORITY
|
||||
#define PW3 TOP_PRIORITY
|
||||
#define DM0 NO_PRIORITY /* DMA Ints */
|
||||
#define DM1 NO_PRIORITY
|
||||
#define DM2 NO_PRIORITY
|
||||
#define DM3 NO_PRIORITY
|
||||
#define DAE NO_PRIORITY
|
||||
#define TU0 TIMER_PRIORITY /* TMU Ints */
|
||||
#define TU1 NO_PRIORITY
|
||||
#define TU2 NO_PRIORITY
|
||||
#define TI2 NO_PRIORITY
|
||||
#define ATI NO_PRIORITY /* RTC Ints */
|
||||
#define PRI NO_PRIORITY
|
||||
#define CUI RTC_PRIORITY
|
||||
#define ERI SCIF_PRIORITY /* SCIF Ints */
|
||||
#define RXI SCIF_PRIORITY
|
||||
#define BRI SCIF_PRIORITY
|
||||
#define TXI SCIF_PRIORITY
|
||||
#define ITI TOP_PRIORITY /* WDT Ints */
|
||||
|
||||
/* Setup for the SMSC FDC37C935 */
|
||||
#define SMSC_SUPERIO_BASE 0x04000000
|
||||
#define SMSC_CONFIG_PORT_ADDR 0x3f0
|
||||
#define SMSC_INDEX_PORT_ADDR SMSC_CONFIG_PORT_ADDR
|
||||
#define SMSC_DATA_PORT_ADDR 0x3f1
|
||||
|
||||
#define SMSC_ENTER_CONFIG_KEY 0x55
|
||||
#define SMSC_EXIT_CONFIG_KEY 0xaa
|
||||
|
||||
#define SMCS_LOGICAL_DEV_INDEX 0x07
|
||||
#define SMSC_DEVICE_ID_INDEX 0x20
|
||||
#define SMSC_DEVICE_REV_INDEX 0x21
|
||||
#define SMSC_ACTIVATE_INDEX 0x30
|
||||
#define SMSC_PRIMARY_BASE_INDEX 0x60
|
||||
#define SMSC_SECONDARY_BASE_INDEX 0x62
|
||||
#define SMSC_PRIMARY_INT_INDEX 0x70
|
||||
#define SMSC_SECONDARY_INT_INDEX 0x72
|
||||
|
||||
#define SMSC_IDE1_DEVICE 1
|
||||
#define SMSC_KEYBOARD_DEVICE 7
|
||||
#define SMSC_CONFIG_REGISTERS 8
|
||||
|
||||
#define SMSC_SUPERIO_READ_INDEXED(index) ({ \
|
||||
outb((index), SMSC_INDEX_PORT_ADDR); \
|
||||
inb(SMSC_DATA_PORT_ADDR); })
|
||||
#define SMSC_SUPERIO_WRITE_INDEXED(val, index) ({ \
|
||||
outb((index), SMSC_INDEX_PORT_ADDR); \
|
||||
outb((val), SMSC_DATA_PORT_ADDR); })
|
||||
|
||||
#define IDE1_PRIMARY_BASE 0x01f0
|
||||
#define IDE1_SECONDARY_BASE 0x03f6
|
||||
|
||||
unsigned long smsc_superio_virt;
|
||||
|
||||
int platform_int_priority[NR_INTC_IRQS] = {
|
||||
IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */
|
||||
RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */
|
||||
PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */
|
||||
RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */
|
||||
TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */
|
||||
RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */
|
||||
RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */
|
||||
RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */
|
||||
};
|
||||
|
||||
static int __init smsc_superio_setup(void)
|
||||
{
|
||||
unsigned char devid, devrev;
|
||||
|
||||
smsc_superio_virt = (unsigned long)ioremap(SMSC_SUPERIO_BASE, 1024);
|
||||
if (!smsc_superio_virt) {
|
||||
panic("Unable to remap SMSC SuperIO\n");
|
||||
}
|
||||
|
||||
/* Initially the chip is in run state */
|
||||
/* Put it into configuration state */
|
||||
outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
|
||||
outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
|
||||
|
||||
/* Read device ID info */
|
||||
devid = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_ID_INDEX);
|
||||
devrev = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_REV_INDEX);
|
||||
printk("SMSC SuperIO devid %02x rev %02x\n", devid, devrev);
|
||||
|
||||
/* Select the keyboard device */
|
||||
SMSC_SUPERIO_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX);
|
||||
|
||||
/* enable it */
|
||||
SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
|
||||
|
||||
/* Select the interrupts */
|
||||
/* On a PC keyboard is IRQ1, mouse is IRQ12 */
|
||||
SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_PRIMARY_INT_INDEX);
|
||||
SMSC_SUPERIO_WRITE_INDEXED(12, SMSC_SECONDARY_INT_INDEX);
|
||||
|
||||
/*
|
||||
* Only IDE1 exists on the Cayman
|
||||
*/
|
||||
|
||||
/* Power it on */
|
||||
SMSC_SUPERIO_WRITE_INDEXED(1 << SMSC_IDE1_DEVICE, 0x22);
|
||||
|
||||
SMSC_SUPERIO_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
|
||||
SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
|
||||
|
||||
SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE >> 8,
|
||||
SMSC_PRIMARY_BASE_INDEX + 0);
|
||||
SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE & 0xff,
|
||||
SMSC_PRIMARY_BASE_INDEX + 1);
|
||||
|
||||
SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE >> 8,
|
||||
SMSC_SECONDARY_BASE_INDEX + 0);
|
||||
SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE & 0xff,
|
||||
SMSC_SECONDARY_BASE_INDEX + 1);
|
||||
|
||||
SMSC_SUPERIO_WRITE_INDEXED(14, SMSC_PRIMARY_INT_INDEX);
|
||||
|
||||
SMSC_SUPERIO_WRITE_INDEXED(SMSC_CONFIG_REGISTERS,
|
||||
SMCS_LOGICAL_DEV_INDEX);
|
||||
|
||||
SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */
|
||||
SMSC_SUPERIO_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */
|
||||
SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */
|
||||
SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */
|
||||
|
||||
/* Exit the configuration state */
|
||||
outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
|
||||
|
||||
return 0;
|
||||
}
|
||||
device_initcall(smsc_superio_setup);
|
||||
|
||||
static void __iomem *cayman_ioport_map(unsigned long port, unsigned int len)
|
||||
{
|
||||
if (port < 0x400) {
|
||||
extern unsigned long smsc_superio_virt;
|
||||
return (void __iomem *)((port << 2) | smsc_superio_virt);
|
||||
}
|
||||
|
||||
return (void __iomem *)port;
|
||||
}
|
||||
|
||||
extern void init_cayman_irq(void);
|
||||
|
||||
static struct sh_machine_vector mv_cayman __initmv = {
|
||||
.mv_name = "Hitachi Cayman",
|
||||
.mv_ioport_map = cayman_ioport_map,
|
||||
.mv_init_irq = init_cayman_irq,
|
||||
};
|
|
@ -82,6 +82,9 @@ device_initcall(landisk_devices_setup);
|
|||
|
||||
static void __init landisk_setup(char **cmdline_p)
|
||||
{
|
||||
/* I/O port identity mapping */
|
||||
__set_io_port_base(0);
|
||||
|
||||
/* LED ON */
|
||||
__raw_writeb(__raw_readb(PA_LED) | 0x03, PA_LED);
|
||||
|
||||
|
|
|
@ -1,66 +0,0 @@
|
|||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_FORCE_MAX_ZONEORDER=11
|
||||
CONFIG_MEMORY_START=0x80000000
|
||||
CONFIG_MEMORY_SIZE=0x00400000
|
||||
CONFIG_FLATMEM_MANUAL=y
|
||||
CONFIG_CACHE_OFF=y
|
||||
CONFIG_SH_PCLK_FREQ=50000000
|
||||
CONFIG_HEARTBEAT=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_PNP=y
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_SCSI_MULTI_LUN=y
|
||||
CONFIG_SCSI_SPI_ATTRS=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_NET_ETHERNET=y
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_SERIO is not set
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_I2C=m
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FIRMWARE_EDID=y
|
||||
CONFIG_FB_MODE_HELPERS=y
|
||||
CONFIG_FB_SH_MOBILE_LCDC=m
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FONTS=y
|
||||
CONFIG_FONT_8x16=y
|
||||
CONFIG_LOGO=y
|
||||
# CONFIG_LOGO_LINUX_MONO is not set
|
||||
# CONFIG_LOGO_LINUX_VGA16 is not set
|
||||
# CONFIG_LOGO_LINUX_CLUT224 is not set
|
||||
# CONFIG_LOGO_SUPERH_MONO is not set
|
||||
# CONFIG_LOGO_SUPERH_VGA16 is not set
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
CONFIG_MINIX_FS=y
|
||||
CONFIG_ROMFS_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
||||
CONFIG_SCHEDSTATS=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
|
@ -25,4 +25,3 @@ obj-$(CONFIG_SH_7780_SOLUTION_ENGINE) += fixups-sdk7780.o
|
|||
obj-$(CONFIG_SH_TITAN) += fixups-titan.o
|
||||
obj-$(CONFIG_SH_LANDISK) += fixups-landisk.o
|
||||
obj-$(CONFIG_SH_LBOX_RE2) += fixups-rts7751r2d.o
|
||||
obj-$(CONFIG_SH_CAYMAN) += fixups-cayman.o
|
||||
|
|
|
@ -54,7 +54,7 @@ int __init pci_is_66mhz_capable(struct pci_channel *hose,
|
|||
int cap66 = -1;
|
||||
u16 stat;
|
||||
|
||||
printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
|
||||
pr_info("PCI: Checking 66MHz capabilities...\n");
|
||||
|
||||
for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
|
||||
if (PCI_FUNC(pci_devfn))
|
||||
|
@ -134,7 +134,7 @@ unsigned int pcibios_handle_status_errors(unsigned long addr,
|
|||
pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT |
|
||||
PCI_STATUS_SIG_TARGET_ABORT |
|
||||
PCI_STATUS_REC_MASTER_ABORT, 1);
|
||||
printk("\n");
|
||||
pr_cont("\n");
|
||||
|
||||
cmd |= PCI_STATUS_REC_TARGET_ABORT;
|
||||
}
|
||||
|
@ -143,7 +143,7 @@ unsigned int pcibios_handle_status_errors(unsigned long addr,
|
|||
printk(KERN_DEBUG "PCI: parity error detected: ");
|
||||
pcibios_report_status(PCI_STATUS_PARITY |
|
||||
PCI_STATUS_DETECTED_PARITY, 1);
|
||||
printk("\n");
|
||||
pr_cont("\n");
|
||||
|
||||
cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY;
|
||||
|
||||
|
|
|
@ -1,78 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/types.h>
|
||||
#include <cpu/irq.h>
|
||||
#include "pci-sh5.h"
|
||||
|
||||
int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
int result = -1;
|
||||
|
||||
/* The complication here is that the PCI IRQ lines from the Cayman's 2
|
||||
5V slots get into the CPU via a different path from the IRQ lines
|
||||
from the 3 3.3V slots. Thus, we have to detect whether the card's
|
||||
interrupts go via the 5V or 3.3V path, i.e. the 'bridge swizzling'
|
||||
at the point where we cross from 5V to 3.3V is not the normal case.
|
||||
|
||||
The added complication is that we don't know that the 5V slots are
|
||||
always bus 2, because a card containing a PCI-PCI bridge may be
|
||||
plugged into a 3.3V slot, and this changes the bus numbering.
|
||||
|
||||
Also, the Cayman has an intermediate PCI bus that goes a custom
|
||||
expansion board header (and to the secondary bridge). This bus has
|
||||
never been used in practice.
|
||||
|
||||
The 1ary onboard PCI-PCI bridge is device 3 on bus 0
|
||||
The 2ary onboard PCI-PCI bridge is device 0 on the 2ary bus of
|
||||
the 1ary bridge.
|
||||
*/
|
||||
|
||||
struct slot_pin {
|
||||
int slot;
|
||||
int pin;
|
||||
} path[4];
|
||||
int i=0;
|
||||
|
||||
while (dev->bus->number > 0) {
|
||||
|
||||
slot = path[i].slot = PCI_SLOT(dev->devfn);
|
||||
pin = path[i].pin = pci_swizzle_interrupt_pin(dev, pin);
|
||||
dev = dev->bus->self;
|
||||
i++;
|
||||
if (i > 3) panic("PCI path to root bus too long!\n");
|
||||
}
|
||||
|
||||
slot = PCI_SLOT(dev->devfn);
|
||||
/* This is the slot on bus 0 through which the device is eventually
|
||||
reachable. */
|
||||
|
||||
/* Now work back up. */
|
||||
if ((slot < 3) || (i == 0)) {
|
||||
/* Bus 0 (incl. PCI-PCI bridge itself) : perform the final
|
||||
swizzle now. */
|
||||
result = IRQ_INTA + pci_swizzle_interrupt_pin(dev, pin) - 1;
|
||||
} else {
|
||||
i--;
|
||||
slot = path[i].slot;
|
||||
pin = path[i].pin;
|
||||
if (slot > 0) {
|
||||
panic("PCI expansion bus device found - not handled!\n");
|
||||
} else {
|
||||
if (i > 0) {
|
||||
/* 5V slots */
|
||||
i--;
|
||||
slot = path[i].slot;
|
||||
pin = path[i].pin;
|
||||
/* 'pin' was swizzled earlier wrt slot, don't do it again. */
|
||||
result = IRQ_P2INTA + (pin - 1);
|
||||
} else {
|
||||
/* IRQ for 2ary PCI-PCI bridge : unused */
|
||||
result = -1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
|
@ -148,7 +148,7 @@ static irqreturn_t sh7780_pci_serr_irq(int irq, void *dev_id)
|
|||
|
||||
printk(KERN_DEBUG "PCI: system error received: ");
|
||||
pcibios_report_status(PCI_STATUS_SIG_SYSTEM_ERROR, 1);
|
||||
printk("\n");
|
||||
pr_cont("\n");
|
||||
|
||||
/* Deassert SERR */
|
||||
__raw_writel(SH4_PCIINTM_SDIM, hose->reg_base + SH4_PCIINTM);
|
||||
|
@ -179,7 +179,7 @@ static int __init sh7780_pci_setup_irqs(struct pci_channel *hose)
|
|||
ret = request_irq(hose->serr_irq, sh7780_pci_serr_irq, 0,
|
||||
"PCI SERR interrupt", hose);
|
||||
if (unlikely(ret)) {
|
||||
printk(KERN_ERR "PCI: Failed hooking SERR IRQ\n");
|
||||
pr_err("PCI: Failed hooking SERR IRQ\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -250,7 +250,7 @@ static int __init sh7780_pci_init(void)
|
|||
const char *type;
|
||||
int ret, i;
|
||||
|
||||
printk(KERN_NOTICE "PCI: Starting initialization.\n");
|
||||
pr_notice("PCI: Starting initialization.\n");
|
||||
|
||||
chan->reg_base = 0xfe040000;
|
||||
|
||||
|
@ -270,7 +270,7 @@ static int __init sh7780_pci_init(void)
|
|||
|
||||
id = __raw_readw(chan->reg_base + PCI_VENDOR_ID);
|
||||
if (id != PCI_VENDOR_ID_RENESAS) {
|
||||
printk(KERN_ERR "PCI: Unknown vendor ID 0x%04x.\n", id);
|
||||
pr_err("PCI: Unknown vendor ID 0x%04x.\n", id);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
|
@ -281,14 +281,13 @@ static int __init sh7780_pci_init(void)
|
|||
(id == PCI_DEVICE_ID_RENESAS_SH7785) ? "SH7785" :
|
||||
NULL;
|
||||
if (unlikely(!type)) {
|
||||
printk(KERN_ERR "PCI: Found an unsupported Renesas host "
|
||||
"controller, device id 0x%04x.\n", id);
|
||||
pr_err("PCI: Found an unsupported Renesas host controller, device id 0x%04x.\n",
|
||||
id);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
printk(KERN_NOTICE "PCI: Found a Renesas %s host "
|
||||
"controller, revision %d.\n", type,
|
||||
__raw_readb(chan->reg_base + PCI_REVISION_ID));
|
||||
pr_notice("PCI: Found a Renesas %s host controller, revision %d.\n",
|
||||
type, __raw_readb(chan->reg_base + PCI_REVISION_ID));
|
||||
|
||||
/*
|
||||
* Now throw it in to register initialization mode and
|
||||
|
@ -395,9 +394,9 @@ static int __init sh7780_pci_init(void)
|
|||
|
||||
sh7780_pci66_init(chan);
|
||||
|
||||
printk(KERN_NOTICE "PCI: Running at %dMHz.\n",
|
||||
(__raw_readw(chan->reg_base + PCI_STATUS) & PCI_STATUS_66MHZ) ?
|
||||
66 : 33);
|
||||
pr_notice("PCI: Running at %dMHz.\n",
|
||||
(__raw_readw(chan->reg_base + PCI_STATUS) & PCI_STATUS_66MHZ)
|
||||
? 66 : 33);
|
||||
|
||||
return 0;
|
||||
|
||||
|
|
|
@ -120,8 +120,7 @@ int register_pci_controller(struct pci_channel *hose)
|
|||
* Do not panic here but later - this might happen before console init.
|
||||
*/
|
||||
if (!hose->io_map_base) {
|
||||
printk(KERN_WARNING
|
||||
"registering PCI controller with io_map_base unset\n");
|
||||
pr_warn("registering PCI controller with io_map_base unset\n");
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -145,7 +144,7 @@ out:
|
|||
for (--i; i >= 0; i--)
|
||||
release_resource(&hose->resources[i]);
|
||||
|
||||
printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
|
||||
pr_warn("Skipping PCI bus scan due to resource conflict\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
@ -213,8 +212,8 @@ pcibios_bus_report_status_early(struct pci_channel *hose,
|
|||
pci_devfn, PCI_STATUS,
|
||||
status & status_mask);
|
||||
if (warn)
|
||||
printk("(%02x:%02x: %04X) ", current_bus,
|
||||
pci_devfn, status);
|
||||
pr_cont("(%02x:%02x: %04X) ", current_bus, pci_devfn,
|
||||
status);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -249,7 +248,7 @@ pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
|
|||
pci_write_config_word(dev, PCI_STATUS, status & status_mask);
|
||||
|
||||
if (warn)
|
||||
printk("(%s: %04X) ", pci_name(dev), status);
|
||||
pr_cont("(%s: %04X) ", pci_name(dev), status);
|
||||
}
|
||||
|
||||
list_for_each_entry(dev, &bus->devices, bus_list)
|
||||
|
|
|
@ -1,7 +1,6 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef __ASM_ADC_H
|
||||
#define __ASM_ADC_H
|
||||
#ifdef __KERNEL__
|
||||
/*
|
||||
* Copyright (C) 2004 Andriy Skulysh
|
||||
*/
|
||||
|
@ -10,5 +9,4 @@
|
|||
|
||||
int adc_single(unsigned int channel);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_ADC_H */
|
||||
|
|
|
@ -7,8 +7,6 @@
|
|||
#ifndef __ASM_SH_ADDRSPACE_H
|
||||
#define __ASM_SH_ADDRSPACE_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <cpu/addrspace.h>
|
||||
|
||||
/* If this CPU supports segmentation, hook up the helpers */
|
||||
|
@ -62,5 +60,4 @@
|
|||
#define P3_ADDR_MAX P4SEG
|
||||
#endif
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_SH_ADDRSPACE_H */
|
||||
|
|
|
@ -2,8 +2,6 @@
|
|||
#ifndef __ASM_SH_BITOPS_H
|
||||
#define __ASM_SH_BITOPS_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#ifndef _LINUX_BITOPS_H
|
||||
#error only <linux/bitops.h> can be included directly
|
||||
#endif
|
||||
|
@ -71,6 +69,4 @@ static inline unsigned long __ffs(unsigned long word)
|
|||
#include <asm-generic/bitops/__fls.h>
|
||||
#include <asm-generic/bitops/fls64.h>
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* __ASM_SH_BITOPS_H */
|
||||
|
|
|
@ -8,7 +8,6 @@
|
|||
*/
|
||||
#ifndef __ASM_SH_CACHE_H
|
||||
#define __ASM_SH_CACHE_H
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <cpu/cache.h>
|
||||
|
@ -44,5 +43,4 @@ struct cache_info {
|
|||
unsigned long flags;
|
||||
};
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_SH_CACHE_H */
|
||||
|
|
|
@ -2,8 +2,6 @@
|
|||
#ifndef __ASM_SH_CACHEFLUSH_H
|
||||
#define __ASM_SH_CACHEFLUSH_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <linux/mm.h>
|
||||
|
||||
/*
|
||||
|
@ -109,5 +107,4 @@ static inline void *sh_cacheop_vaddr(void *vaddr)
|
|||
return vaddr;
|
||||
}
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_SH_CACHEFLUSH_H */
|
||||
|
|
|
@ -6,7 +6,6 @@
|
|||
*/
|
||||
#ifndef __ASM_SH_DMA_H
|
||||
#define __ASM_SH_DMA_H
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/wait.h>
|
||||
|
@ -144,5 +143,4 @@ extern int isa_dma_bridge_buggy;
|
|||
#define isa_dma_bridge_buggy (0)
|
||||
#endif
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_SH_DMA_H */
|
||||
|
|
|
@ -90,7 +90,6 @@ typedef struct user_fpu_struct elf_fpregset_t;
|
|||
#endif
|
||||
#define ELF_ARCH EM_SH
|
||||
|
||||
#ifdef __KERNEL__
|
||||
/*
|
||||
* This is used to ensure we don't load something for the wrong architecture.
|
||||
*/
|
||||
|
@ -209,5 +208,4 @@ do { \
|
|||
NEW_AUX_ENT(AT_L2_CACHESHAPE, l2_cache_shape); \
|
||||
} while (0)
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_SH_ELF_H */
|
||||
|
|
|
@ -6,9 +6,7 @@
|
|||
*/
|
||||
#ifndef __ASM_SH_FREQ_H
|
||||
#define __ASM_SH_FREQ_H
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <cpu/freq.h>
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_SH_FREQ_H */
|
||||
|
|
|
@ -2,8 +2,6 @@
|
|||
#ifndef __ASM_SH_FUTEX_H
|
||||
#define __ASM_SH_FUTEX_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <linux/futex.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <asm/errno.h>
|
||||
|
@ -71,5 +69,4 @@ static inline int arch_futex_atomic_op_inuser(int op, u32 oparg, int *oval,
|
|||
return ret;
|
||||
}
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_SH_FUTEX_H */
|
||||
|
|
|
@ -21,10 +21,8 @@
|
|||
#include <linux/pgtable.h>
|
||||
#include <asm-generic/iomap.h>
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#define __IO_PREFIX generic
|
||||
#include <asm/io_generic.h>
|
||||
#include <asm/io_trapped.h>
|
||||
#include <asm-generic/pci_iomap.h>
|
||||
#include <mach/mangle-port.h>
|
||||
|
||||
|
@ -244,125 +242,38 @@ unsigned long long poke_real_address_q(unsigned long long addr,
|
|||
#define phys_to_virt(address) (__va(address))
|
||||
#endif
|
||||
|
||||
/*
|
||||
* On 32-bit SH, we traditionally have the whole physical address space
|
||||
* mapped at all times (as MIPS does), so "ioremap()" and "iounmap()" do
|
||||
* not need to do anything but place the address in the proper segment.
|
||||
* This is true for P1 and P2 addresses, as well as some P3 ones.
|
||||
* However, most of the P3 addresses and newer cores using extended
|
||||
* addressing need to map through page tables, so the ioremap()
|
||||
* implementation becomes a bit more complicated.
|
||||
*
|
||||
* See arch/sh/mm/ioremap.c for additional notes on this.
|
||||
*
|
||||
* We cheat a bit and always return uncachable areas until we've fixed
|
||||
* the drivers to handle caching properly.
|
||||
*
|
||||
* On the SH-5 the concept of segmentation in the 1:1 PXSEG sense simply
|
||||
* doesn't exist, so everything must go through page tables.
|
||||
*/
|
||||
#ifdef CONFIG_MMU
|
||||
void iounmap(void __iomem *addr);
|
||||
void __iomem *__ioremap_caller(phys_addr_t offset, unsigned long size,
|
||||
pgprot_t prot, void *caller);
|
||||
void iounmap(void __iomem *addr);
|
||||
|
||||
static inline void __iomem *
|
||||
__ioremap(phys_addr_t offset, unsigned long size, pgprot_t prot)
|
||||
{
|
||||
return __ioremap_caller(offset, size, prot, __builtin_return_address(0));
|
||||
}
|
||||
|
||||
static inline void __iomem *
|
||||
__ioremap_29bit(phys_addr_t offset, unsigned long size, pgprot_t prot)
|
||||
{
|
||||
#ifdef CONFIG_29BIT
|
||||
phys_addr_t last_addr = offset + size - 1;
|
||||
|
||||
/*
|
||||
* For P1 and P2 space this is trivial, as everything is already
|
||||
* mapped. Uncached access for P1 addresses are done through P2.
|
||||
* In the P3 case or for addresses outside of the 29-bit space,
|
||||
* mapping must be done by the PMB or by using page tables.
|
||||
*/
|
||||
if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) {
|
||||
u64 flags = pgprot_val(prot);
|
||||
|
||||
/*
|
||||
* Anything using the legacy PTEA space attributes needs
|
||||
* to be kicked down to page table mappings.
|
||||
*/
|
||||
if (unlikely(flags & _PAGE_PCC_MASK))
|
||||
return NULL;
|
||||
if (unlikely(flags & _PAGE_CACHABLE))
|
||||
return (void __iomem *)P1SEGADDR(offset);
|
||||
|
||||
return (void __iomem *)P2SEGADDR(offset);
|
||||
}
|
||||
|
||||
/* P4 above the store queues are always mapped. */
|
||||
if (unlikely(offset >= P3_ADDR_MAX))
|
||||
return (void __iomem *)P4SEGADDR(offset);
|
||||
#endif
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static inline void __iomem *
|
||||
__ioremap_mode(phys_addr_t offset, unsigned long size, pgprot_t prot)
|
||||
{
|
||||
void __iomem *ret;
|
||||
|
||||
ret = __ioremap_trapped(offset, size);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = __ioremap_29bit(offset, size, prot);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
return __ioremap(offset, size, prot);
|
||||
}
|
||||
#else
|
||||
#define __ioremap(offset, size, prot) ((void __iomem *)(offset))
|
||||
#define __ioremap_mode(offset, size, prot) ((void __iomem *)(offset))
|
||||
static inline void iounmap(void __iomem *addr) {}
|
||||
#endif /* CONFIG_MMU */
|
||||
|
||||
static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size)
|
||||
{
|
||||
return __ioremap_mode(offset, size, PAGE_KERNEL_NOCACHE);
|
||||
return __ioremap_caller(offset, size, PAGE_KERNEL_NOCACHE,
|
||||
__builtin_return_address(0));
|
||||
}
|
||||
|
||||
static inline void __iomem *
|
||||
ioremap_cache(phys_addr_t offset, unsigned long size)
|
||||
{
|
||||
return __ioremap_mode(offset, size, PAGE_KERNEL);
|
||||
return __ioremap_caller(offset, size, PAGE_KERNEL,
|
||||
__builtin_return_address(0));
|
||||
}
|
||||
#define ioremap_cache ioremap_cache
|
||||
|
||||
#ifdef CONFIG_HAVE_IOREMAP_PROT
|
||||
static inline void __iomem *
|
||||
ioremap_prot(phys_addr_t offset, unsigned long size, unsigned long flags)
|
||||
static inline void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,
|
||||
unsigned long flags)
|
||||
{
|
||||
return __ioremap_mode(offset, size, __pgprot(flags));
|
||||
return __ioremap_caller(offset, size, __pgprot(flags),
|
||||
__builtin_return_address(0));
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_HAVE_IOREMAP_PROT */
|
||||
|
||||
#ifdef CONFIG_IOREMAP_FIXED
|
||||
extern void __iomem *ioremap_fixed(phys_addr_t, unsigned long, pgprot_t);
|
||||
extern int iounmap_fixed(void __iomem *);
|
||||
extern void ioremap_fixed_init(void);
|
||||
#else
|
||||
static inline void __iomem *
|
||||
ioremap_fixed(phys_addr_t phys_addr, unsigned long size, pgprot_t prot)
|
||||
{
|
||||
BUG();
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static inline void ioremap_fixed_init(void) { }
|
||||
static inline int iounmap_fixed(void __iomem *addr) { return -EINVAL; }
|
||||
#endif
|
||||
#else /* CONFIG_MMU */
|
||||
#define iounmap(addr) do { } while (0)
|
||||
#define ioremap(offset, size) ((void __iomem *)(unsigned long)(offset))
|
||||
#endif /* CONFIG_MMU */
|
||||
|
||||
#define ioremap_uc ioremap
|
||||
|
||||
|
@ -381,6 +292,4 @@ static inline int iounmap_fixed(void __iomem *addr) { return -EINVAL; }
|
|||
int valid_phys_addr_range(phys_addr_t addr, size_t size);
|
||||
int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* __ASM_SH_IO_H */
|
||||
|
|
|
@ -12,8 +12,7 @@ enum die_val {
|
|||
};
|
||||
|
||||
/* arch/sh/kernel/dumpstack.c */
|
||||
extern void printk_address(unsigned long address, int reliable,
|
||||
const char *loglvl);
|
||||
extern void printk_address(unsigned long address, int reliable);
|
||||
extern void dump_mem(const char *str, const char *loglvl,
|
||||
unsigned long bottom, unsigned long top);
|
||||
|
||||
|
|
|
@ -8,7 +8,6 @@
|
|||
#ifndef __ASM_SH_MMU_CONTEXT_H
|
||||
#define __ASM_SH_MMU_CONTEXT_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#include <cpu/mmu_context.h>
|
||||
#include <asm/tlbflush.h>
|
||||
#include <linux/uaccess.h>
|
||||
|
@ -177,5 +176,4 @@ static inline void disable_mmu(void)
|
|||
#define disable_mmu() do { } while (0)
|
||||
#endif
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_SH_MMU_CONTEXT_H */
|
||||
|
|
|
@ -2,8 +2,6 @@
|
|||
#ifndef __ASM_SH_MMZONE_H
|
||||
#define __ASM_SH_MMZONE_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#ifdef CONFIG_NEED_MULTIPLE_NODES
|
||||
#include <linux/numa.h>
|
||||
|
||||
|
@ -44,5 +42,4 @@ void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
|
|||
/* arch/sh/mm/init.c */
|
||||
void __init allocate_pgdat(unsigned int nid);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_SH_MMZONE_H */
|
||||
|
|
|
@ -2,8 +2,6 @@
|
|||
#ifndef __ASM_SH_PCI_H
|
||||
#define __ASM_SH_PCI_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
/* Can be used to override the logic in pci_scan_bus for skipping
|
||||
already-configured bus numbers - to be used for buggy BIOSes
|
||||
or architectures with incomplete PCI setup by the loader */
|
||||
|
@ -96,6 +94,4 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
|
|||
return channel ? 15 : 14;
|
||||
}
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_SH_PCI_H */
|
||||
|
||||
|
|
|
@ -8,7 +8,6 @@
|
|||
|
||||
#ifndef __ASM_SH_PROCESSOR_32_H
|
||||
#define __ASM_SH_PROCESSOR_32_H
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/linkage.h>
|
||||
|
@ -203,5 +202,4 @@ static inline void prefetchw(const void *x)
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_SH_PROCESSOR_32_H */
|
||||
|
|
|
@ -112,8 +112,8 @@ typedef struct uart_reg {
|
|||
#define FCR_RFRES 0x0200 /* Receiver FIFO reset */
|
||||
#define FCR_TFRES 0x0400 /* Transmitter FIFO reset */
|
||||
#define FCR_DMA 0x0800 /* DMA mode select */
|
||||
#define FCR_RTL 0x4000 /* Receiver triger (LSB) */
|
||||
#define FCR_RTM 0x8000 /* Receiver triger (MSB) */
|
||||
#define FCR_RTL 0x4000 /* Receiver trigger (LSB) */
|
||||
#define FCR_RTM 0x8000 /* Receiver trigger (MSB) */
|
||||
|
||||
/* Line Control Register */
|
||||
|
||||
|
|
|
@ -2,7 +2,6 @@
|
|||
#ifndef __ASM_SH_SPARSEMEM_H
|
||||
#define __ASM_SH_SPARSEMEM_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
/*
|
||||
* SECTION_SIZE_BITS 2^N: how big each section will be
|
||||
* MAX_PHYSMEM_BITS 2^N: how much physical address space we have
|
||||
|
@ -10,6 +9,4 @@
|
|||
#define SECTION_SIZE_BITS 26
|
||||
#define MAX_PHYSMEM_BITS 32
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_SH_SPARSEMEM_H */
|
||||
|
|
|
@ -12,8 +12,6 @@
|
|||
|
||||
struct stacktrace_ops {
|
||||
void (*address)(void *data, unsigned long address, int reliable);
|
||||
/* On negative return stop dumping */
|
||||
int (*stack)(void *data, char *name);
|
||||
};
|
||||
|
||||
void dump_trace(struct task_struct *tsk, struct pt_regs *regs,
|
||||
|
|
|
@ -2,8 +2,6 @@
|
|||
#ifndef __ASM_SH_STRING_H
|
||||
#define __ASM_SH_STRING_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
/*
|
||||
* Copyright (C) 1999 Niibe Yutaka
|
||||
* But consider these trivial functions to be public domain.
|
||||
|
@ -101,6 +99,4 @@ extern void *memchr(const void *__s, int __c, size_t __n);
|
|||
#define __HAVE_ARCH_STRLEN
|
||||
extern size_t strlen(const char *);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* __ASM_SH_STRING_H */
|
||||
|
|
|
@ -40,10 +40,7 @@ static inline void syscall_set_return_value(struct task_struct *task,
|
|||
struct pt_regs *regs,
|
||||
int error, long val)
|
||||
{
|
||||
if (error)
|
||||
regs->regs[0] = -error;
|
||||
else
|
||||
regs->regs[0] = val;
|
||||
regs->regs[0] = (long) error ?: val;
|
||||
}
|
||||
|
||||
static inline void syscall_get_arguments(struct task_struct *task,
|
||||
|
|
|
@ -2,8 +2,6 @@
|
|||
#ifndef __ASM_SH_SYSCALLS_32_H
|
||||
#define __ASM_SH_SYSCALLS_32_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/types.h>
|
||||
|
@ -26,5 +24,4 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs);
|
|||
asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned int save_r0,
|
||||
unsigned long thread_info_flags);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_SH_SYSCALLS_32_H */
|
||||
|
|
|
@ -10,8 +10,6 @@
|
|||
* Copyright (C) 2002 David Howells (dhowells@redhat.com)
|
||||
* - Incorporating suggestions made by Linus Torvalds and Dave Miller
|
||||
*/
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <asm/page.h>
|
||||
|
||||
/*
|
||||
|
@ -170,7 +168,4 @@ static inline unsigned int get_thread_fault_code(void)
|
|||
}
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* __ASM_SH_THREAD_INFO_H */
|
||||
|
|
|
@ -26,6 +26,9 @@ do { \
|
|||
case 4: \
|
||||
__get_user_asm(x, ptr, retval, "l"); \
|
||||
break; \
|
||||
case 8: \
|
||||
__get_user_u64(x, ptr, retval); \
|
||||
break; \
|
||||
default: \
|
||||
__get_user_unknown(); \
|
||||
break; \
|
||||
|
@ -66,6 +69,56 @@ do { \
|
|||
|
||||
extern void __get_user_unknown(void);
|
||||
|
||||
#if defined(CONFIG_CPU_LITTLE_ENDIAN)
|
||||
#define __get_user_u64(x, addr, err) \
|
||||
({ \
|
||||
__asm__ __volatile__( \
|
||||
"1:\n\t" \
|
||||
"mov.l %2,%R1\n\t" \
|
||||
"mov.l %T2,%S1\n\t" \
|
||||
"2:\n" \
|
||||
".section .fixup,\"ax\"\n" \
|
||||
"3:\n\t" \
|
||||
"mov #0,%R1\n\t" \
|
||||
"mov #0,%S1\n\t" \
|
||||
"mov.l 4f, %0\n\t" \
|
||||
"jmp @%0\n\t" \
|
||||
" mov %3, %0\n\t" \
|
||||
".balign 4\n" \
|
||||
"4: .long 2b\n\t" \
|
||||
".previous\n" \
|
||||
".section __ex_table,\"a\"\n\t" \
|
||||
".long 1b, 3b\n\t" \
|
||||
".long 1b + 2, 3b\n\t" \
|
||||
".previous" \
|
||||
:"=&r" (err), "=&r" (x) \
|
||||
:"m" (__m(addr)), "i" (-EFAULT), "0" (err)); })
|
||||
#else
|
||||
#define __get_user_u64(x, addr, err) \
|
||||
({ \
|
||||
__asm__ __volatile__( \
|
||||
"1:\n\t" \
|
||||
"mov.l %2,%S1\n\t" \
|
||||
"mov.l %T2,%R1\n\t" \
|
||||
"2:\n" \
|
||||
".section .fixup,\"ax\"\n" \
|
||||
"3:\n\t" \
|
||||
"mov #0,%S1\n\t" \
|
||||
"mov #0,%R1\n\t" \
|
||||
"mov.l 4f, %0\n\t" \
|
||||
"jmp @%0\n\t" \
|
||||
" mov %3, %0\n\t" \
|
||||
".balign 4\n" \
|
||||
"4: .long 2b\n\t" \
|
||||
".previous\n" \
|
||||
".section __ex_table,\"a\"\n\t" \
|
||||
".long 1b, 3b\n\t" \
|
||||
".long 1b + 2, 3b\n\t" \
|
||||
".previous" \
|
||||
:"=&r" (err), "=&r" (x) \
|
||||
:"m" (__m(addr)), "i" (-EFAULT), "0" (err)); })
|
||||
#endif
|
||||
|
||||
#define __put_user_size(x,ptr,size,retval) \
|
||||
do { \
|
||||
retval = 0; \
|
||||
|
|
|
@ -8,7 +8,6 @@
|
|||
*/
|
||||
#ifndef __ASM_SH_WATCHDOG_H
|
||||
#define __ASM_SH_WATCHDOG_H
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/io.h>
|
||||
|
@ -157,5 +156,4 @@ static inline void sh_wdt_write_csr(__u8 val)
|
|||
__raw_writew((WTCSR_HIGH << 8) | (__u16)val, WTCSR);
|
||||
}
|
||||
#endif /* CONFIG_CPU_SUBTYPE_SH7785 || CONFIG_CPU_SUBTYPE_SH7780 */
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_SH_WATCHDOG_H */
|
||||
|
|
|
@ -47,5 +47,3 @@ obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o
|
|||
obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o
|
||||
obj-$(CONFIG_DMA_NONCOHERENT) += dma-coherent.o
|
||||
obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
|
||||
|
||||
ccflags-y := -Werror
|
||||
|
|
|
@ -376,148 +376,148 @@ static void print_sh_insn(u32 memaddr, u16 insn)
|
|||
}
|
||||
|
||||
ok:
|
||||
printk("%-8s ", op->name);
|
||||
pr_cont("%-8s ", op->name);
|
||||
lastsp = (op->arg[0] == A_END);
|
||||
disp_pc = 0;
|
||||
for (n = 0; n < 6 && op->arg[n] != A_END; n++) {
|
||||
if (n && op->arg[1] != A_END)
|
||||
printk(", ");
|
||||
pr_cont(", ");
|
||||
switch (op->arg[n]) {
|
||||
case A_IMM:
|
||||
printk("#%d", (char)(imm));
|
||||
pr_cont("#%d", (char)(imm));
|
||||
break;
|
||||
case A_R0:
|
||||
printk("r0");
|
||||
pr_cont("r0");
|
||||
break;
|
||||
case A_REG_N:
|
||||
printk("r%d", rn);
|
||||
pr_cont("r%d", rn);
|
||||
break;
|
||||
case A_INC_N:
|
||||
printk("@r%d+", rn);
|
||||
pr_cont("@r%d+", rn);
|
||||
break;
|
||||
case A_DEC_N:
|
||||
printk("@-r%d", rn);
|
||||
pr_cont("@-r%d", rn);
|
||||
break;
|
||||
case A_IND_N:
|
||||
printk("@r%d", rn);
|
||||
pr_cont("@r%d", rn);
|
||||
break;
|
||||
case A_DISP_REG_N:
|
||||
printk("@(%d,r%d)", imm, rn);
|
||||
pr_cont("@(%d,r%d)", imm, rn);
|
||||
break;
|
||||
case A_REG_M:
|
||||
printk("r%d", rm);
|
||||
pr_cont("r%d", rm);
|
||||
break;
|
||||
case A_INC_M:
|
||||
printk("@r%d+", rm);
|
||||
pr_cont("@r%d+", rm);
|
||||
break;
|
||||
case A_DEC_M:
|
||||
printk("@-r%d", rm);
|
||||
pr_cont("@-r%d", rm);
|
||||
break;
|
||||
case A_IND_M:
|
||||
printk("@r%d", rm);
|
||||
pr_cont("@r%d", rm);
|
||||
break;
|
||||
case A_DISP_REG_M:
|
||||
printk("@(%d,r%d)", imm, rm);
|
||||
pr_cont("@(%d,r%d)", imm, rm);
|
||||
break;
|
||||
case A_REG_B:
|
||||
printk("r%d_bank", rb);
|
||||
pr_cont("r%d_bank", rb);
|
||||
break;
|
||||
case A_DISP_PC:
|
||||
disp_pc = 1;
|
||||
disp_pc_addr = imm + 4 + (memaddr & relmask);
|
||||
printk("%08x <%pS>", disp_pc_addr,
|
||||
pr_cont("%08x <%pS>", disp_pc_addr,
|
||||
(void *)disp_pc_addr);
|
||||
break;
|
||||
case A_IND_R0_REG_N:
|
||||
printk("@(r0,r%d)", rn);
|
||||
pr_cont("@(r0,r%d)", rn);
|
||||
break;
|
||||
case A_IND_R0_REG_M:
|
||||
printk("@(r0,r%d)", rm);
|
||||
pr_cont("@(r0,r%d)", rm);
|
||||
break;
|
||||
case A_DISP_GBR:
|
||||
printk("@(%d,gbr)",imm);
|
||||
pr_cont("@(%d,gbr)", imm);
|
||||
break;
|
||||
case A_R0_GBR:
|
||||
printk("@(r0,gbr)");
|
||||
pr_cont("@(r0,gbr)");
|
||||
break;
|
||||
case A_BDISP12:
|
||||
case A_BDISP8:
|
||||
printk("%08x", imm + memaddr);
|
||||
pr_cont("%08x", imm + memaddr);
|
||||
break;
|
||||
case A_SR:
|
||||
printk("sr");
|
||||
pr_cont("sr");
|
||||
break;
|
||||
case A_GBR:
|
||||
printk("gbr");
|
||||
pr_cont("gbr");
|
||||
break;
|
||||
case A_VBR:
|
||||
printk("vbr");
|
||||
pr_cont("vbr");
|
||||
break;
|
||||
case A_SSR:
|
||||
printk("ssr");
|
||||
pr_cont("ssr");
|
||||
break;
|
||||
case A_SPC:
|
||||
printk("spc");
|
||||
pr_cont("spc");
|
||||
break;
|
||||
case A_MACH:
|
||||
printk("mach");
|
||||
pr_cont("mach");
|
||||
break;
|
||||
case A_MACL:
|
||||
printk("macl");
|
||||
pr_cont("macl");
|
||||
break;
|
||||
case A_PR:
|
||||
printk("pr");
|
||||
pr_cont("pr");
|
||||
break;
|
||||
case A_SGR:
|
||||
printk("sgr");
|
||||
pr_cont("sgr");
|
||||
break;
|
||||
case A_DBR:
|
||||
printk("dbr");
|
||||
pr_cont("dbr");
|
||||
break;
|
||||
case FD_REG_N:
|
||||
case F_REG_N:
|
||||
printk("fr%d", rn);
|
||||
pr_cont("fr%d", rn);
|
||||
break;
|
||||
case F_REG_M:
|
||||
printk("fr%d", rm);
|
||||
pr_cont("fr%d", rm);
|
||||
break;
|
||||
case DX_REG_N:
|
||||
if (rn & 1) {
|
||||
printk("xd%d", rn & ~1);
|
||||
pr_cont("xd%d", rn & ~1);
|
||||
break;
|
||||
}
|
||||
/* else, fall through */
|
||||
case D_REG_N:
|
||||
printk("dr%d", rn);
|
||||
pr_cont("dr%d", rn);
|
||||
break;
|
||||
case DX_REG_M:
|
||||
if (rm & 1) {
|
||||
printk("xd%d", rm & ~1);
|
||||
pr_cont("xd%d", rm & ~1);
|
||||
break;
|
||||
}
|
||||
/* else, fall through */
|
||||
case D_REG_M:
|
||||
printk("dr%d", rm);
|
||||
pr_cont("dr%d", rm);
|
||||
break;
|
||||
case FPSCR_M:
|
||||
case FPSCR_N:
|
||||
printk("fpscr");
|
||||
pr_cont("fpscr");
|
||||
break;
|
||||
case FPUL_M:
|
||||
case FPUL_N:
|
||||
printk("fpul");
|
||||
pr_cont("fpul");
|
||||
break;
|
||||
case F_FR0:
|
||||
printk("fr0");
|
||||
pr_cont("fr0");
|
||||
break;
|
||||
case V_REG_N:
|
||||
printk("fv%d", rn*4);
|
||||
pr_cont("fv%d", rn*4);
|
||||
break;
|
||||
case V_REG_M:
|
||||
printk("fv%d", rm*4);
|
||||
pr_cont("fv%d", rm*4);
|
||||
break;
|
||||
case XMTRX_M4:
|
||||
printk("xmtrx");
|
||||
pr_cont("xmtrx");
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
|
@ -532,7 +532,7 @@ static void print_sh_insn(u32 memaddr, u16 insn)
|
|||
else
|
||||
__get_user(val, (u32 *)disp_pc_addr);
|
||||
|
||||
printk(" ! %08x <%pS>", val, (void *)val);
|
||||
pr_cont(" ! %08x <%pS>", val, (void *)val);
|
||||
}
|
||||
|
||||
return;
|
||||
|
@ -541,7 +541,7 @@ static void print_sh_insn(u32 memaddr, u16 insn)
|
|||
|
||||
}
|
||||
|
||||
printk(".word 0x%x%x%x%x", nibs[0], nibs[1], nibs[2], nibs[3]);
|
||||
pr_info(".word 0x%x%x%x%x", nibs[0], nibs[1], nibs[2], nibs[3]);
|
||||
}
|
||||
|
||||
void show_code(struct pt_regs *regs)
|
||||
|
@ -552,20 +552,21 @@ void show_code(struct pt_regs *regs)
|
|||
if (regs->pc & 0x1)
|
||||
return;
|
||||
|
||||
printk("Code:\n");
|
||||
pr_info("Code:\n");
|
||||
|
||||
for (i = -3 ; i < 6 ; i++) {
|
||||
unsigned short insn;
|
||||
|
||||
if (__get_user(insn, pc + i)) {
|
||||
printk(" (Bad address in pc)\n");
|
||||
pr_err(" (Bad address in pc)\n");
|
||||
break;
|
||||
}
|
||||
|
||||
printk("%s%08lx: ", (i ? " ": "->"), (unsigned long)(pc + i));
|
||||
pr_info("%s%08lx: ", (i ? " " : "->"),
|
||||
(unsigned long)(pc + i));
|
||||
print_sh_insn((unsigned long)(pc + i), insn);
|
||||
printk("\n");
|
||||
pr_cont("\n");
|
||||
}
|
||||
|
||||
printk("\n");
|
||||
pr_info("\n");
|
||||
}
|
||||
|
|
|
@ -3,60 +3,13 @@
|
|||
* Copyright (C) 2004 - 2007 Paul Mundt
|
||||
*/
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/dma-noncoherent.h>
|
||||
#include <linux/module.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/addrspace.h>
|
||||
|
||||
void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
||||
gfp_t gfp, unsigned long attrs)
|
||||
void arch_dma_prep_coherent(struct page *page, size_t size)
|
||||
{
|
||||
void *ret, *ret_nocache;
|
||||
int order = get_order(size);
|
||||
|
||||
gfp |= __GFP_ZERO;
|
||||
|
||||
ret = (void *)__get_free_pages(gfp, order);
|
||||
if (!ret)
|
||||
return NULL;
|
||||
|
||||
/*
|
||||
* Pages from the page allocator may have data present in
|
||||
* cache. So flush the cache before using uncached memory.
|
||||
*/
|
||||
arch_sync_dma_for_device(virt_to_phys(ret), size,
|
||||
DMA_BIDIRECTIONAL);
|
||||
|
||||
ret_nocache = (void __force *)ioremap(virt_to_phys(ret), size);
|
||||
if (!ret_nocache) {
|
||||
free_pages((unsigned long)ret, order);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
split_page(pfn_to_page(virt_to_phys(ret) >> PAGE_SHIFT), order);
|
||||
|
||||
*dma_handle = virt_to_phys(ret);
|
||||
if (!WARN_ON(!dev))
|
||||
*dma_handle -= PFN_PHYS(dev->dma_pfn_offset);
|
||||
|
||||
return ret_nocache;
|
||||
}
|
||||
|
||||
void arch_dma_free(struct device *dev, size_t size, void *vaddr,
|
||||
dma_addr_t dma_handle, unsigned long attrs)
|
||||
{
|
||||
int order = get_order(size);
|
||||
unsigned long pfn = (dma_handle >> PAGE_SHIFT);
|
||||
int k;
|
||||
|
||||
if (!WARN_ON(!dev))
|
||||
pfn += dev->dma_pfn_offset;
|
||||
|
||||
for (k = 0; k < (1 << order); k++)
|
||||
__free_pages(pfn_to_page(pfn + k), 0);
|
||||
|
||||
iounmap(vaddr);
|
||||
__flush_purge_region(page_address(page), size);
|
||||
}
|
||||
|
||||
void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
|
||||
|
|
|
@ -16,8 +16,8 @@
|
|||
#include <asm/unwinder.h>
|
||||
#include <asm/stacktrace.h>
|
||||
|
||||
void dump_mem(const char *str, const char *loglvl,
|
||||
unsigned long bottom, unsigned long top)
|
||||
void dump_mem(const char *str, const char *loglvl, unsigned long bottom,
|
||||
unsigned long top)
|
||||
{
|
||||
unsigned long p;
|
||||
int i;
|
||||
|
@ -31,22 +31,22 @@ void dump_mem(const char *str, const char *loglvl,
|
|||
unsigned int val;
|
||||
|
||||
if (p < bottom || p >= top)
|
||||
printk("%s ", loglvl);
|
||||
pr_cont(" ");
|
||||
else {
|
||||
if (__get_user(val, (unsigned int __user *)p)) {
|
||||
printk("%s\n", loglvl);
|
||||
pr_cont("\n");
|
||||
return;
|
||||
}
|
||||
printk("%s%08x ", loglvl, val);
|
||||
pr_cont("%08x ", val);
|
||||
}
|
||||
}
|
||||
printk("%s\n", loglvl);
|
||||
pr_cont("\n");
|
||||
}
|
||||
}
|
||||
|
||||
void printk_address(unsigned long address, int reliable, const char *loglvl)
|
||||
void printk_address(unsigned long address, int reliable)
|
||||
{
|
||||
printk("%s [<%p>] %s%pS\n", loglvl, (void *) address,
|
||||
pr_cont(" [<%px>] %s%pS\n", (void *) address,
|
||||
reliable ? "" : "? ", (void *) address);
|
||||
}
|
||||
|
||||
|
@ -107,22 +107,16 @@ stack_reader_dump(struct task_struct *task, struct pt_regs *regs,
|
|||
}
|
||||
}
|
||||
|
||||
static int print_trace_stack(void *data, char *name)
|
||||
{
|
||||
printk("%s <%s> ", (char *)data, name);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Print one address/symbol entries per line.
|
||||
*/
|
||||
static void print_trace_address(void *data, unsigned long addr, int reliable)
|
||||
{
|
||||
printk_address(addr, reliable, (char *)data);
|
||||
printk("%s", (char *)data);
|
||||
printk_address(addr, reliable);
|
||||
}
|
||||
|
||||
static const struct stacktrace_ops print_trace_ops = {
|
||||
.stack = print_trace_stack,
|
||||
.address = print_trace_address,
|
||||
};
|
||||
|
||||
|
@ -136,7 +130,7 @@ void show_trace(struct task_struct *tsk, unsigned long *sp,
|
|||
|
||||
unwind_stack(tsk, regs, sp, &print_trace_ops, (void *)loglvl);
|
||||
|
||||
printk("%s\n", loglvl);
|
||||
pr_cont("\n");
|
||||
|
||||
if (!tsk)
|
||||
tsk = current;
|
||||
|
|
|
@ -178,34 +178,6 @@ syscall_exit_work:
|
|||
bra resume_userspace
|
||||
nop
|
||||
|
||||
.align 2
|
||||
syscall_trace_entry:
|
||||
! Yes it is traced.
|
||||
mov r15, r4
|
||||
mov.l 7f, r11 ! Call do_syscall_trace_enter which notifies
|
||||
jsr @r11 ! superior (will chomp R[0-7])
|
||||
nop
|
||||
mov.l r0, @(OFF_R0,r15) ! Save return value
|
||||
! Reload R0-R4 from kernel stack, where the
|
||||
! parent may have modified them using
|
||||
! ptrace(POKEUSR). (Note that R0-R2 are
|
||||
! reloaded from the kernel stack by syscall_call
|
||||
! below, so don't need to be reloaded here.)
|
||||
! This allows the parent to rewrite system calls
|
||||
! and args on the fly.
|
||||
mov.l @(OFF_R4,r15), r4 ! arg0
|
||||
mov.l @(OFF_R5,r15), r5
|
||||
mov.l @(OFF_R6,r15), r6
|
||||
mov.l @(OFF_R7,r15), r7 ! arg3
|
||||
mov.l @(OFF_R3,r15), r3 ! syscall_nr
|
||||
!
|
||||
mov.l 6f, r10 ! Number of syscalls
|
||||
cmp/hs r10, r3
|
||||
bf syscall_call
|
||||
mov #-ENOSYS, r0
|
||||
bra syscall_exit
|
||||
mov.l r0, @(OFF_R0,r15) ! Return value
|
||||
|
||||
__restore_all:
|
||||
mov #OFF_SR, r0
|
||||
mov.l @(r0,r15), r0 ! get status register
|
||||
|
@ -388,6 +360,37 @@ syscall_exit:
|
|||
bf syscall_exit_work
|
||||
bra __restore_all
|
||||
nop
|
||||
|
||||
.align 2
|
||||
syscall_trace_entry:
|
||||
! Yes it is traced.
|
||||
mov r15, r4
|
||||
mov.l 7f, r11 ! Call do_syscall_trace_enter which notifies
|
||||
jsr @r11 ! superior (will chomp R[0-7])
|
||||
nop
|
||||
cmp/eq #-1, r0
|
||||
bt syscall_exit
|
||||
mov.l r0, @(OFF_R0,r15) ! Save return value
|
||||
! Reload R0-R4 from kernel stack, where the
|
||||
! parent may have modified them using
|
||||
! ptrace(POKEUSR). (Note that R0-R2 are
|
||||
! reloaded from the kernel stack by syscall_call
|
||||
! below, so don't need to be reloaded here.)
|
||||
! This allows the parent to rewrite system calls
|
||||
! and args on the fly.
|
||||
mov.l @(OFF_R4,r15), r4 ! arg0
|
||||
mov.l @(OFF_R5,r15), r5
|
||||
mov.l @(OFF_R6,r15), r6
|
||||
mov.l @(OFF_R7,r15), r7 ! arg3
|
||||
mov.l @(OFF_R3,r15), r3 ! syscall_nr
|
||||
!
|
||||
mov.l 6f, r10 ! Number of syscalls
|
||||
cmp/hs r10, r3
|
||||
bf syscall_call
|
||||
mov #-ENOSYS, r0
|
||||
bra syscall_exit
|
||||
mov.l r0, @(OFF_R0,r15) ! Return value
|
||||
|
||||
.align 2
|
||||
#if !defined(CONFIG_CPU_SH2)
|
||||
1: .long TRA
|
||||
|
|
|
@ -102,7 +102,6 @@ int register_trapped_io(struct trapped_io *tiop)
|
|||
pr_warn("unable to install trapped io filter\n");
|
||||
return -1;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(register_trapped_io);
|
||||
|
||||
void __iomem *match_trapped_io_handler(struct list_head *list,
|
||||
unsigned long offset,
|
||||
|
@ -131,7 +130,6 @@ void __iomem *match_trapped_io_handler(struct list_head *list,
|
|||
spin_unlock_irqrestore(&trapped_lock, flags);
|
||||
return NULL;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(match_trapped_io_handler);
|
||||
|
||||
static struct trapped_io *lookup_tiop(unsigned long address)
|
||||
{
|
||||
|
|
|
@ -7,6 +7,7 @@
|
|||
*/
|
||||
#include <linux/module.h>
|
||||
#include <linux/io.h>
|
||||
#include <asm/io_trapped.h>
|
||||
|
||||
unsigned long sh_io_port_base __read_mostly = -1;
|
||||
EXPORT_SYMBOL(sh_io_port_base);
|
||||
|
|
|
@ -65,10 +65,10 @@ static int __init early_parse_mv(char *from)
|
|||
|
||||
mvp = get_mv_byname(mv_name);
|
||||
if (unlikely(!mvp)) {
|
||||
printk("Available vectors:\n\n\t'%s', ", sh_mv.mv_name);
|
||||
pr_info("Available vectors:\n\n\t'%s', ", sh_mv.mv_name);
|
||||
for_each_mv(mvp)
|
||||
printk("'%s', ", mvp->mv_name);
|
||||
printk("\n\n");
|
||||
pr_cont("'%s', ", mvp->mv_name);
|
||||
pr_cont("\n\n");
|
||||
panic("Failed to select machvec '%s' -- halting.\n",
|
||||
mv_name);
|
||||
} else
|
||||
|
@ -105,7 +105,7 @@ void __init sh_mv_setup(void)
|
|||
sh_mv = *(struct sh_machine_vector *)&__machvec_start;
|
||||
}
|
||||
|
||||
printk(KERN_NOTICE "Booting machvec: %s\n", get_system_type());
|
||||
pr_notice("Booting machvec: %s\n", get_system_type());
|
||||
|
||||
/*
|
||||
* Manually walk the vec, fill in anything that the board hasn't yet
|
||||
|
|
|
@ -11,11 +11,6 @@
|
|||
#include <asm/unwinder.h>
|
||||
#include <asm/ptrace.h>
|
||||
|
||||
static int callchain_stack(void *data, char *name)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void callchain_address(void *data, unsigned long addr, int reliable)
|
||||
{
|
||||
struct perf_callchain_entry_ctx *entry = data;
|
||||
|
@ -25,7 +20,6 @@ static void callchain_address(void *data, unsigned long addr, int reliable)
|
|||
}
|
||||
|
||||
static const struct stacktrace_ops callchain_ops = {
|
||||
.stack = callchain_stack,
|
||||
.address = callchain_address,
|
||||
};
|
||||
|
||||
|
|
|
@ -30,33 +30,29 @@
|
|||
|
||||
void show_regs(struct pt_regs * regs)
|
||||
{
|
||||
printk("\n");
|
||||
pr_info("\n");
|
||||
show_regs_print_info(KERN_DEFAULT);
|
||||
|
||||
printk("PC is at %pS\n", (void *)instruction_pointer(regs));
|
||||
printk("PR is at %pS\n", (void *)regs->pr);
|
||||
pr_info("PC is at %pS\n", (void *)instruction_pointer(regs));
|
||||
pr_info("PR is at %pS\n", (void *)regs->pr);
|
||||
|
||||
printk("PC : %08lx SP : %08lx SR : %08lx ",
|
||||
regs->pc, regs->regs[15], regs->sr);
|
||||
pr_info("PC : %08lx SP : %08lx SR : %08lx ", regs->pc,
|
||||
regs->regs[15], regs->sr);
|
||||
#ifdef CONFIG_MMU
|
||||
printk("TEA : %08x\n", __raw_readl(MMU_TEA));
|
||||
pr_cont("TEA : %08x\n", __raw_readl(MMU_TEA));
|
||||
#else
|
||||
printk("\n");
|
||||
pr_cont("\n");
|
||||
#endif
|
||||
|
||||
printk("R0 : %08lx R1 : %08lx R2 : %08lx R3 : %08lx\n",
|
||||
regs->regs[0],regs->regs[1],
|
||||
regs->regs[2],regs->regs[3]);
|
||||
printk("R4 : %08lx R5 : %08lx R6 : %08lx R7 : %08lx\n",
|
||||
regs->regs[4],regs->regs[5],
|
||||
regs->regs[6],regs->regs[7]);
|
||||
printk("R8 : %08lx R9 : %08lx R10 : %08lx R11 : %08lx\n",
|
||||
regs->regs[8],regs->regs[9],
|
||||
regs->regs[10],regs->regs[11]);
|
||||
printk("R12 : %08lx R13 : %08lx R14 : %08lx\n",
|
||||
regs->regs[12],regs->regs[13],
|
||||
regs->regs[14]);
|
||||
printk("MACH: %08lx MACL: %08lx GBR : %08lx PR : %08lx\n",
|
||||
pr_info("R0 : %08lx R1 : %08lx R2 : %08lx R3 : %08lx\n",
|
||||
regs->regs[0], regs->regs[1], regs->regs[2], regs->regs[3]);
|
||||
pr_info("R4 : %08lx R5 : %08lx R6 : %08lx R7 : %08lx\n",
|
||||
regs->regs[4], regs->regs[5], regs->regs[6], regs->regs[7]);
|
||||
pr_info("R8 : %08lx R9 : %08lx R10 : %08lx R11 : %08lx\n",
|
||||
regs->regs[8], regs->regs[9], regs->regs[10], regs->regs[11]);
|
||||
pr_info("R12 : %08lx R13 : %08lx R14 : %08lx\n",
|
||||
regs->regs[12], regs->regs[13], regs->regs[14]);
|
||||
pr_info("MACH: %08lx MACL: %08lx GBR : %08lx PR : %08lx\n",
|
||||
regs->mach, regs->macl, regs->gbr, regs->pr);
|
||||
|
||||
show_trace(NULL, (unsigned long *)regs->regs[15], regs, KERN_DEFAULT);
|
||||
|
|
|
@ -457,8 +457,6 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
|
|||
{
|
||||
long ret = 0;
|
||||
|
||||
secure_computing_strict(regs->regs[0]);
|
||||
|
||||
if (test_thread_flag(TIF_SYSCALL_TRACE) &&
|
||||
tracehook_report_syscall_entry(regs))
|
||||
/*
|
||||
|
@ -468,6 +466,9 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
|
|||
*/
|
||||
ret = -1L;
|
||||
|
||||
if (secure_computing() == -1)
|
||||
return -1;
|
||||
|
||||
if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
|
||||
trace_sys_enter(regs, regs->regs[0]);
|
||||
|
||||
|
|
|
@ -15,11 +15,6 @@
|
|||
#include <asm/ptrace.h>
|
||||
#include <asm/stacktrace.h>
|
||||
|
||||
static int save_stack_stack(void *data, char *name)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Save stack-backtrace addresses into a stack_trace buffer.
|
||||
*/
|
||||
|
@ -40,7 +35,6 @@ static void save_stack_address(void *data, unsigned long addr, int reliable)
|
|||
}
|
||||
|
||||
static const struct stacktrace_ops save_stack_ops = {
|
||||
.stack = save_stack_stack,
|
||||
.address = save_stack_address,
|
||||
};
|
||||
|
||||
|
@ -73,7 +67,6 @@ save_stack_address_nosched(void *data, unsigned long addr, int reliable)
|
|||
}
|
||||
|
||||
static const struct stacktrace_ops save_stack_ops_nosched = {
|
||||
.stack = save_stack_stack,
|
||||
.address = save_stack_address_nosched,
|
||||
};
|
||||
|
||||
|
|
|
@ -30,5 +30,3 @@ memset-$(CONFIG_CPU_SH4) := memset-sh4.o
|
|||
lib-$(CONFIG_MMU) += copy_page.o __clear_user.o
|
||||
lib-$(CONFIG_MCOUNT) += mcount.o
|
||||
lib-y += $(memcpy-y) $(memset-y) $(udivsi3-y)
|
||||
|
||||
ccflags-y := -Werror
|
||||
|
|
|
@ -29,7 +29,6 @@ void __delay(unsigned long loops)
|
|||
: "0" (loops)
|
||||
: "t");
|
||||
}
|
||||
EXPORT_SYMBOL(__delay);
|
||||
|
||||
inline void __const_udelay(unsigned long xloops)
|
||||
{
|
||||
|
|
|
@ -43,5 +43,3 @@ obj-$(CONFIG_UNCACHED_MAPPING) += uncached.o
|
|||
obj-$(CONFIG_HAVE_SRAM_POOL) += sram.o
|
||||
|
||||
GCOV_PROFILE_pmb.o := n
|
||||
|
||||
ccflags-y := -Werror
|
||||
|
|
|
@ -57,8 +57,6 @@ int __init platform_resource_setup_memory(struct platform_device *pdev,
|
|||
return -ENOMEM;
|
||||
}
|
||||
|
||||
memset(buf, 0, memsize);
|
||||
|
||||
r->flags = IORESOURCE_MEM;
|
||||
r->start = dma_handle;
|
||||
r->end = r->start + memsize - 1;
|
||||
|
|
|
@ -208,13 +208,12 @@ show_fault_oops(struct pt_regs *regs, unsigned long address)
|
|||
if (!oops_may_print())
|
||||
return;
|
||||
|
||||
printk(KERN_ALERT "PC:");
|
||||
pr_alert("BUG: unable to handle kernel %s at %08lx\n",
|
||||
address < PAGE_SIZE ? "NULL pointer dereference"
|
||||
: "paging request",
|
||||
address);
|
||||
pr_alert("PC:");
|
||||
printk_address(regs->pc, 1, KERN_ALERT);
|
||||
printk_address(regs->pc, 1);
|
||||
|
||||
show_pte(NULL, address);
|
||||
}
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
#include <asm/cache.h>
|
||||
#include <asm/pgalloc.h>
|
||||
#include <linux/sizes.h>
|
||||
#include "ioremap.h"
|
||||
|
||||
pgd_t swapper_pg_dir[PTRS_PER_PGD];
|
||||
|
||||
|
|
|
@ -18,12 +18,59 @@
|
|||
#include <linux/mm.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/io.h>
|
||||
#include <asm/io_trapped.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/pgalloc.h>
|
||||
#include <asm/addrspace.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/tlbflush.h>
|
||||
#include <asm/mmu.h>
|
||||
#include "ioremap.h"
|
||||
|
||||
/*
|
||||
* On 32-bit SH, we traditionally have the whole physical address space mapped
|
||||
* at all times (as MIPS does), so "ioremap()" and "iounmap()" do not need to do
|
||||
* anything but place the address in the proper segment. This is true for P1
|
||||
* and P2 addresses, as well as some P3 ones. However, most of the P3 addresses
|
||||
* and newer cores using extended addressing need to map through page tables, so
|
||||
* the ioremap() implementation becomes a bit more complicated.
|
||||
*/
|
||||
#ifdef CONFIG_29BIT
|
||||
static void __iomem *
|
||||
__ioremap_29bit(phys_addr_t offset, unsigned long size, pgprot_t prot)
|
||||
{
|
||||
phys_addr_t last_addr = offset + size - 1;
|
||||
|
||||
/*
|
||||
* For P1 and P2 space this is trivial, as everything is already
|
||||
* mapped. Uncached access for P1 addresses are done through P2.
|
||||
* In the P3 case or for addresses outside of the 29-bit space,
|
||||
* mapping must be done by the PMB or by using page tables.
|
||||
*/
|
||||
if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) {
|
||||
u64 flags = pgprot_val(prot);
|
||||
|
||||
/*
|
||||
* Anything using the legacy PTEA space attributes needs
|
||||
* to be kicked down to page table mappings.
|
||||
*/
|
||||
if (unlikely(flags & _PAGE_PCC_MASK))
|
||||
return NULL;
|
||||
if (unlikely(flags & _PAGE_CACHABLE))
|
||||
return (void __iomem *)P1SEGADDR(offset);
|
||||
|
||||
return (void __iomem *)P2SEGADDR(offset);
|
||||
}
|
||||
|
||||
/* P4 above the store queues are always mapped. */
|
||||
if (unlikely(offset >= P3_ADDR_MAX))
|
||||
return (void __iomem *)P4SEGADDR(offset);
|
||||
|
||||
return NULL;
|
||||
}
|
||||
#else
|
||||
#define __ioremap_29bit(offset, size, prot) NULL
|
||||
#endif /* CONFIG_29BIT */
|
||||
|
||||
/*
|
||||
* Remap an arbitrary physical address space into the kernel virtual
|
||||
|
@ -42,6 +89,14 @@ __ioremap_caller(phys_addr_t phys_addr, unsigned long size,
|
|||
unsigned long offset, last_addr, addr, orig_addr;
|
||||
void __iomem *mapped;
|
||||
|
||||
mapped = __ioremap_trapped(phys_addr, size);
|
||||
if (mapped)
|
||||
return mapped;
|
||||
|
||||
mapped = __ioremap_29bit(phys_addr, size, pgprot);
|
||||
if (mapped)
|
||||
return mapped;
|
||||
|
||||
/* Don't allow wraparound or zero size */
|
||||
last_addr = phys_addr + size - 1;
|
||||
if (!size || last_addr < phys_addr)
|
||||
|
|
|
@ -0,0 +1,23 @@
|
|||
#ifndef _SH_MM_IORMEMAP_H
|
||||
#define _SH_MM_IORMEMAP_H 1
|
||||
|
||||
#ifdef CONFIG_IOREMAP_FIXED
|
||||
void __iomem *ioremap_fixed(phys_addr_t, unsigned long, pgprot_t);
|
||||
int iounmap_fixed(void __iomem *);
|
||||
void ioremap_fixed_init(void);
|
||||
#else
|
||||
static inline void __iomem *
|
||||
ioremap_fixed(phys_addr_t phys_addr, unsigned long size, pgprot_t prot)
|
||||
{
|
||||
BUG();
|
||||
return NULL;
|
||||
}
|
||||
static inline void ioremap_fixed_init(void)
|
||||
{
|
||||
}
|
||||
static inline int iounmap_fixed(void __iomem *addr)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
#endif /* CONFIG_IOREMAP_FIXED */
|
||||
#endif /* _SH_MM_IORMEMAP_H */
|
|
@ -23,6 +23,7 @@
|
|||
#include <asm/tlbflush.h>
|
||||
#include <asm/mmu.h>
|
||||
#include <asm/mmu_context.h>
|
||||
#include "ioremap.h"
|
||||
|
||||
struct ioremap_map {
|
||||
void __iomem *addr;
|
||||
|
|
|
@ -2,8 +2,6 @@
|
|||
#include <linux/mm.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#define PGALLOC_GFP GFP_KERNEL | __GFP_ZERO
|
||||
|
||||
static struct kmem_cache *pgd_cachep;
|
||||
#if PAGETABLE_LEVELS > 2
|
||||
static struct kmem_cache *pmd_cachep;
|
||||
|
@ -13,6 +11,7 @@ void pgd_ctor(void *x)
|
|||
{
|
||||
pgd_t *pgd = x;
|
||||
|
||||
memset(pgd, 0, USER_PTRS_PER_PGD * sizeof(pgd_t));
|
||||
memcpy(pgd + USER_PTRS_PER_PGD,
|
||||
swapper_pg_dir + USER_PTRS_PER_PGD,
|
||||
(PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
|
||||
|
@ -32,7 +31,7 @@ void pgtable_cache_init(void)
|
|||
|
||||
pgd_t *pgd_alloc(struct mm_struct *mm)
|
||||
{
|
||||
return kmem_cache_alloc(pgd_cachep, PGALLOC_GFP);
|
||||
return kmem_cache_alloc(pgd_cachep, GFP_KERNEL);
|
||||
}
|
||||
|
||||
void pgd_free(struct mm_struct *mm, pgd_t *pgd)
|
||||
|
@ -48,7 +47,7 @@ void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
|
|||
|
||||
pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
|
||||
{
|
||||
return kmem_cache_alloc(pmd_cachep, PGALLOC_GFP);
|
||||
return kmem_cache_alloc(pmd_cachep, GFP_KERNEL | __GFP_ZERO);
|
||||
}
|
||||
|
||||
void pmd_free(struct mm_struct *mm, pmd_t *pmd)
|
||||
|
|
|
@ -19,12 +19,6 @@
|
|||
#include <asm/sections.h>
|
||||
#include <asm/stacktrace.h>
|
||||
|
||||
static int backtrace_stack(void *data, char *name)
|
||||
{
|
||||
/* Yes, we want all stacks */
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void backtrace_address(void *data, unsigned long addr, int reliable)
|
||||
{
|
||||
unsigned int *depth = data;
|
||||
|
@ -34,7 +28,6 @@ static void backtrace_address(void *data, unsigned long addr, int reliable)
|
|||
}
|
||||
|
||||
static struct stacktrace_ops backtrace_ops = {
|
||||
.stack = backtrace_stack,
|
||||
.address = backtrace_address,
|
||||
};
|
||||
|
||||
|
|
|
@ -46,7 +46,6 @@ X3PROTO SH_X3PROTO
|
|||
MAGICPANELR2 SH_MAGIC_PANEL_R2
|
||||
R2D_PLUS RTS7751R2D_PLUS
|
||||
R2D_1 RTS7751R2D_1
|
||||
CAYMAN SH_CAYMAN
|
||||
SDK7780 SH_SDK7780
|
||||
MIGOR SH_MIGOR
|
||||
RSK7201 SH_RSK7201
|
||||
|
|
|
@ -14,6 +14,7 @@ config UML
|
|||
select HAVE_FUTEX_CMPXCHG if FUTEX
|
||||
select HAVE_DEBUG_KMEMLEAK
|
||||
select HAVE_DEBUG_BUGVERBOSE
|
||||
select NO_DMA
|
||||
select GENERIC_IRQ_SHOW
|
||||
select GENERIC_CPU_DEVICES
|
||||
select GENERIC_CLOCKEVENTS
|
||||
|
@ -167,9 +168,6 @@ config MMAPPER
|
|||
This driver allows a host file to be used as emulated IO memory inside
|
||||
UML.
|
||||
|
||||
config NO_DMA
|
||||
def_bool y
|
||||
|
||||
config PGTABLE_LEVELS
|
||||
int
|
||||
default 3 if 3_LEVEL_PGTABLES
|
||||
|
|
|
@ -21,8 +21,6 @@
|
|||
#elif defined(__arm__)
|
||||
/* defined in include/asm-arm/arch-xxx/irqs.h */
|
||||
#include <asm/irq.h>
|
||||
#elif defined(CONFIG_SH_CAYMAN)
|
||||
#include <asm/irq.h>
|
||||
#elif defined(CONFIG_PPC)
|
||||
extern int of_i8042_kbd_irq;
|
||||
extern int of_i8042_aux_irq;
|
||||
|
|
|
@ -1,5 +1,8 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
|
||||
config NO_DMA
|
||||
bool
|
||||
|
||||
config HAS_DMA
|
||||
bool
|
||||
depends on !NO_DMA
|
||||
|
|
|
@ -133,6 +133,8 @@ struct seccomp_data {
|
|||
# define __NR_seccomp 348
|
||||
# elif defined(__xtensa__)
|
||||
# define __NR_seccomp 337
|
||||
# elif defined(__sh__)
|
||||
# define __NR_seccomp 372
|
||||
# else
|
||||
# warning "seccomp syscall number unknown for this architecture"
|
||||
# define __NR_seccomp 0xffff
|
||||
|
@ -1719,6 +1721,10 @@ TEST_F(TRACE_poke, getpid_runs_normally)
|
|||
* a2 of the current window which is not fixed.
|
||||
*/
|
||||
#define SYSCALL_RET(reg) a[(reg).windowbase * 4 + 2]
|
||||
#elif defined(__sh__)
|
||||
# define ARCH_REGS struct pt_regs
|
||||
# define SYSCALL_NUM gpr[3]
|
||||
# define SYSCALL_RET gpr[0]
|
||||
#else
|
||||
# error "Do not know how to find your architecture's registers and syscalls"
|
||||
#endif
|
||||
|
@ -1791,7 +1797,7 @@ void change_syscall(struct __test_metadata *_metadata,
|
|||
|
||||
#if defined(__x86_64__) || defined(__i386__) || defined(__powerpc__) || \
|
||||
defined(__s390__) || defined(__hppa__) || defined(__riscv) || \
|
||||
defined(__xtensa__) || defined(__csky__)
|
||||
defined(__xtensa__) || defined(__csky__) || defined(__sh__)
|
||||
{
|
||||
regs.SYSCALL_NUM = syscall;
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue