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drm/radeon/kms: properly set num banks for fusion asics 

Needed by userspace for 2D tiled buffer alignment

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Alex Deucher 2011-05-20 12:35:22 -04:00 committed by Dave Airlie
parent ac89af1e10
commit 5bfa487955
1 changed files with 6 additions and 2 deletions
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8
drivers/gpu/drm/radeon/evergreen.c
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@ -1933,8 +1933,12 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
rdev->config.evergreen.tile_config |= (3 << 0);
break;
}
rdev->config.evergreen.tile_config |=
((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4;
/* num banks is 8 on all fusion asics */
if (rdev->flags & RADEON_IS_IGP)
rdev->config.evergreen.tile_config |= 8 << 4;
else
rdev->config.evergreen.tile_config |=
((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4;
rdev->config.evergreen.tile_config |=
((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT) << 8;
rdev->config.evergreen.tile_config |=