Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: ARM: 5965/1: Fix soft lockup in at91 udc driver ARM: 6006/1: ARM: Use the correct NOP size in memmove for Thumb-2 kernel builds ARM: 6005/1: arm: kprobes: fix register corruption with jprobes ARM: 6003/1: removing compilation warning from pl061.h ARM: 6001/1: removing compilation warning comming from clkdev.h ARM: 6000/1: removing compilation warning comming from <asm/irq.h> ARM: 5999/1: Including device.h and resource.h header files in linux/amba/bus.h ARM: 5997/1: ARM: Correct the VFPv3 detection ARM: 5996/1: ARM: Change the mandatory barriers implementation (4/4) ARM: 5995/1: ARM: Add L2x0 outer_sync() support (3/4) ARM: 5994/1: ARM: Add outer_cache_fns.sync function pointer (2/4) ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4)
This commit is contained in:
commit
5e11611a5d
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@ -15,6 +15,7 @@
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#include <asm/glue.h>
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#include <asm/shmparam.h>
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#include <asm/cachetype.h>
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#include <asm/outercache.h>
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#define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
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@ -219,12 +220,6 @@ struct cpu_cache_fns {
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void (*dma_flush_range)(const void *, const void *);
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};
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struct outer_cache_fns {
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void (*inv_range)(unsigned long, unsigned long);
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void (*clean_range)(unsigned long, unsigned long);
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void (*flush_range)(unsigned long, unsigned long);
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};
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/*
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* Select the calling method
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*/
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@ -281,37 +276,6 @@ extern void dmac_flush_range(const void *, const void *);
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#endif
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#ifdef CONFIG_OUTER_CACHE
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extern struct outer_cache_fns outer_cache;
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static inline void outer_inv_range(unsigned long start, unsigned long end)
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{
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if (outer_cache.inv_range)
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outer_cache.inv_range(start, end);
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}
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static inline void outer_clean_range(unsigned long start, unsigned long end)
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{
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if (outer_cache.clean_range)
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outer_cache.clean_range(start, end);
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}
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static inline void outer_flush_range(unsigned long start, unsigned long end)
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{
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if (outer_cache.flush_range)
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outer_cache.flush_range(start, end);
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}
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#else
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static inline void outer_inv_range(unsigned long start, unsigned long end)
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{ }
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static inline void outer_clean_range(unsigned long start, unsigned long end)
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{ }
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static inline void outer_flush_range(unsigned long start, unsigned long end)
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{ }
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#endif
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/*
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* Copy user data from/to a page which is mapped into a different
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* processes address space. Really, we want to allow our "user
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@ -13,6 +13,7 @@
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#define __ASM_CLKDEV_H
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struct clk;
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struct device;
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struct clk_lookup {
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struct list_head node;
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@ -17,6 +17,7 @@
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#ifndef __ASSEMBLY__
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struct irqaction;
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struct pt_regs;
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extern void migrate_irqs(void);
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extern void asm_do_IRQ(unsigned int, struct pt_regs *);
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@ -0,0 +1,75 @@
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/*
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* arch/arm/include/asm/outercache.h
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*
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* Copyright (C) 2010 ARM Ltd.
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* Written by Catalin Marinas <catalin.marinas@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ASM_OUTERCACHE_H
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#define __ASM_OUTERCACHE_H
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struct outer_cache_fns {
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void (*inv_range)(unsigned long, unsigned long);
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void (*clean_range)(unsigned long, unsigned long);
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void (*flush_range)(unsigned long, unsigned long);
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#ifdef CONFIG_OUTER_CACHE_SYNC
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void (*sync)(void);
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#endif
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};
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#ifdef CONFIG_OUTER_CACHE
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extern struct outer_cache_fns outer_cache;
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static inline void outer_inv_range(unsigned long start, unsigned long end)
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{
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if (outer_cache.inv_range)
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outer_cache.inv_range(start, end);
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}
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static inline void outer_clean_range(unsigned long start, unsigned long end)
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{
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if (outer_cache.clean_range)
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outer_cache.clean_range(start, end);
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}
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static inline void outer_flush_range(unsigned long start, unsigned long end)
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{
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if (outer_cache.flush_range)
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outer_cache.flush_range(start, end);
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}
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#else
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static inline void outer_inv_range(unsigned long start, unsigned long end)
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{ }
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static inline void outer_clean_range(unsigned long start, unsigned long end)
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{ }
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static inline void outer_flush_range(unsigned long start, unsigned long end)
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{ }
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#endif
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#ifdef CONFIG_OUTER_CACHE_SYNC
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static inline void outer_sync(void)
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{
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if (outer_cache.sync)
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outer_cache.sync();
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}
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#else
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static inline void outer_sync(void)
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{ }
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#endif
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#endif /* __ASM_OUTERCACHE_H */
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@ -60,6 +60,8 @@
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#include <linux/linkage.h>
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#include <linux/irqflags.h>
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#include <asm/outercache.h>
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#define __exception __attribute__((section(".exception.text")))
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struct thread_info;
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#define dmb() __asm__ __volatile__ ("" : : : "memory")
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#endif
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#if __LINUX_ARM_ARCH__ >= 7 || defined(CONFIG_SMP)
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#define mb() dmb()
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#ifdef CONFIG_ARCH_HAS_BARRIERS
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#include <mach/barriers.h>
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#elif __LINUX_ARM_ARCH__ >= 7 || defined(CONFIG_SMP)
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#define mb() do { dsb(); outer_sync(); } while (0)
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#define rmb() dmb()
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#define wmb() dmb()
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#define wmb() mb()
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#else
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#define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
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#define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
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#define smp_rmb() barrier()
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#define smp_wmb() barrier()
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#else
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#define smp_mb() mb()
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#define smp_rmb() rmb()
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#define smp_wmb() wmb()
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#define smp_mb() dmb()
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#define smp_rmb() dmb()
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#define smp_wmb() dmb()
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#endif
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#define read_barrier_depends() do { } while(0)
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@ -393,6 +393,14 @@ void __kprobes jprobe_return(void)
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/*
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* Setup an empty pt_regs. Fill SP and PC fields as
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* they're needed by longjmp_break_handler.
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*
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* We allocate some slack between the original SP and start of
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* our fabricated regs. To be precise we want to have worst case
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* covered which is STMFD with all 16 regs so we allocate 2 *
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* sizeof(struct_pt_regs)).
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*
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* This is to prevent any simulated instruction from writing
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* over the regs when they are accessing the stack.
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*/
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"sub sp, %0, %1 \n\t"
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"ldr r0, ="__stringify(JPROBE_MAGIC_ADDR)"\n\t"
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"ldmia sp, {r0 - pc} \n\t"
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:
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: "r" (kcb->jprobe_saved_regs.ARM_sp),
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"I" (sizeof(struct pt_regs)),
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"I" (sizeof(struct pt_regs) * 2),
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"J" (offsetof(struct pt_regs, ARM_sp)),
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"J" (offsetof(struct pt_regs, ARM_pc)),
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"J" (offsetof(struct pt_regs, ARM_cpsr))
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rsb ip, ip, #32
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addne pc, pc, ip @ C is always clear here
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b 7f
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6: nop
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6: W(nop)
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W(ldr) r3, [r1, #-4]!
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W(ldr) r4, [r1, #-4]!
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W(ldr) r5, [r1, #-4]!
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add pc, pc, ip
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nop
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nop
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W(nop)
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W(str) r3, [r0, #-4]!
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W(str) r4, [r0, #-4]!
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W(str) r5, [r0, #-4]!
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config OUTER_CACHE
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bool
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config OUTER_CACHE_SYNC
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bool
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help
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The outer cache has a outer_cache_fns.sync function pointer
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that can be used to drain the write buffer of the outer cache.
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config CACHE_FEROCEON_L2
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bool "Enable the Feroceon L2 cache controller"
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depends on ARCH_KIRKWOOD || ARCH_MV78XX0
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REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || ARCH_NOMADIK || ARCH_OMAP4
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default y
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select OUTER_CACHE
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select OUTER_CACHE_SYNC
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help
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This option enables the L2x0 PrimeCell.
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int
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default 6 if ARM_L1_CACHE_SHIFT_6
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default 5
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config ARCH_HAS_BARRIERS
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bool
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help
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This option allows the use of custom mandatory barriers
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included via the mach/barriers.h file.
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}
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#endif
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static void l2x0_cache_sync(void)
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{
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unsigned long flags;
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spin_lock_irqsave(&l2x0_lock, flags);
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cache_sync();
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spin_unlock_irqrestore(&l2x0_lock, flags);
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}
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static inline void l2x0_inv_all(void)
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{
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unsigned long flags;
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outer_cache.inv_range = l2x0_inv_range;
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outer_cache.clean_range = l2x0_clean_range;
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outer_cache.flush_range = l2x0_flush_range;
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outer_cache.sync = l2x0_cache_sync;
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printk(KERN_INFO "L2X0 cache controller enabled\n");
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}
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*/
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elf_hwcap |= HWCAP_VFP;
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#ifdef CONFIG_VFPv3
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if (VFP_arch >= 3) {
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if (VFP_arch >= 2) {
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elf_hwcap |= HWCAP_VFPv3;
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/*
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{
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struct at91_udc *udc = _udc;
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u32 rescans = 5;
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int disable_clock = 0;
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if (!udc->clocked) {
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clk_on(udc);
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disable_clock = 1;
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}
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while (rescans--) {
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u32 status;
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}
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}
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if (disable_clock)
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clk_off(udc);
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return IRQ_HANDLED;
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}
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@ -14,6 +14,9 @@
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#ifndef ASMARM_AMBA_H
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#define ASMARM_AMBA_H
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#include <linux/device.h>
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#include <linux/resource.h>
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#define AMBA_NR_IRQS 2
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struct amba_device {
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@ -1,3 +1,5 @@
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#include <linux/types.h>
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/* platform data for the PL061 GPIO driver */
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struct pl061_platform_data {
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