fbdev: sh_mipi_dsi: add set_dot_clock() for each platform
Dot clock of SH MIPI are depends on each platform board. This patch adds set_dot_clock() function for it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
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08750617ba
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5e47431aab
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@ -321,6 +321,36 @@ static struct resource mipidsi0_resources[] = {
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},
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},
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};
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};
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#define DSI0PHYCR 0xe615006c
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static int sh_mipi_set_dot_clock(struct platform_device *pdev,
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void __iomem *base,
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int enable)
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{
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struct clk *pck;
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int ret;
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pck = clk_get(&pdev->dev, "dsip_clk");
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if (IS_ERR(pck)) {
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ret = PTR_ERR(pck);
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goto sh_mipi_set_dot_clock_pck_err;
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}
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if (enable) {
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clk_set_rate(pck, clk_round_rate(pck, 24000000));
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__raw_writel(0x2a809010, DSI0PHYCR);
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clk_enable(pck);
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} else {
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clk_disable(pck);
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}
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ret = 0;
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clk_put(pck);
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sh_mipi_set_dot_clock_pck_err:
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return ret;
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}
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static struct sh_mipi_dsi_info mipidsi0_info = {
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static struct sh_mipi_dsi_info mipidsi0_info = {
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.data_format = MIPI_RGB888,
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.data_format = MIPI_RGB888,
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.lcd_chan = &lcdc0_info.ch[0],
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.lcd_chan = &lcdc0_info.ch[0],
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@ -329,6 +359,7 @@ static struct sh_mipi_dsi_info mipidsi0_info = {
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.clksrc = 1,
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.clksrc = 1,
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.flags = SH_MIPI_DSI_HSABM |
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.flags = SH_MIPI_DSI_HSABM |
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SH_MIPI_DSI_SYNC_PULSES_MODE,
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SH_MIPI_DSI_SYNC_PULSES_MODE,
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.set_dot_clock = sh_mipi_set_dot_clock,
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};
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};
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static struct platform_device mipidsi0_device = {
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static struct platform_device mipidsi0_device = {
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@ -476,8 +507,6 @@ static void __init ag5evm_map_io(void)
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shmobile_setup_console();
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shmobile_setup_console();
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}
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}
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#define DSI0PHYCR 0xe615006c
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static void __init ag5evm_init(void)
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static void __init ag5evm_init(void)
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{
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{
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sh73a0_pinmux_init();
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sh73a0_pinmux_init();
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@ -558,9 +587,6 @@ static void __init ag5evm_init(void)
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gpio_direction_output(GPIO_PORT235, 0);
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gpio_direction_output(GPIO_PORT235, 0);
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lcd_backlight_reset();
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lcd_backlight_reset();
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/* MIPI-DSI clock setup */
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__raw_writel(0x2a809010, DSI0PHYCR);
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/* enable SDHI0 on CN15 [SD I/F] */
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/* enable SDHI0 on CN15 [SD I/F] */
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gpio_request(GPIO_FN_SDHICD0, NULL);
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gpio_request(GPIO_FN_SDHICD0, NULL);
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gpio_request(GPIO_FN_SDHIWP0, NULL);
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gpio_request(GPIO_FN_SDHIWP0, NULL);
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@ -564,6 +564,30 @@ static struct platform_device keysc_device = {
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};
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};
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/* MIPI-DSI */
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/* MIPI-DSI */
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#define PHYCTRL 0x0070
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static int sh_mipi_set_dot_clock(struct platform_device *pdev,
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void __iomem *base,
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int enable)
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{
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struct clk *pck = clk_get(&pdev->dev, "dsip_clk");
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void __iomem *phy = base + PHYCTRL;
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if (IS_ERR(pck))
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return PTR_ERR(pck);
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if (enable) {
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clk_set_rate(pck, clk_round_rate(pck, 24000000));
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iowrite32(ioread32(phy) | (0xb << 8), phy);
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clk_enable(pck);
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} else {
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clk_disable(pck);
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}
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clk_put(pck);
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return 0;
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}
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static struct resource mipidsi0_resources[] = {
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static struct resource mipidsi0_resources[] = {
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[0] = {
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[0] = {
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.start = 0xffc60000,
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.start = 0xffc60000,
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@ -583,6 +607,7 @@ static struct sh_mipi_dsi_info mipidsi0_info = {
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.lane = 2,
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.lane = 2,
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.vsynw_offset = 17,
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.vsynw_offset = 17,
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.flags = SH_MIPI_DSI_SYNC_PULSES_MODE,
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.flags = SH_MIPI_DSI_SYNC_PULSES_MODE,
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.set_dot_clock = sh_mipi_set_dot_clock,
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};
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};
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static struct platform_device mipidsi0_device = {
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static struct platform_device mipidsi0_device = {
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@ -53,7 +53,6 @@ struct sh_mipi {
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void __iomem *base;
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void __iomem *base;
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void __iomem *linkbase;
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void __iomem *linkbase;
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struct clk *dsit_clk;
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struct clk *dsit_clk;
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struct clk *dsip_clk;
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struct device *dev;
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struct device *dev;
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void *next_board_data;
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void *next_board_data;
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@ -307,8 +306,8 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
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/* DSI-Tx bias on */
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/* DSI-Tx bias on */
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iowrite32(0x00000001, base + PHYCTRL);
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iowrite32(0x00000001, base + PHYCTRL);
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udelay(200);
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udelay(200);
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/* Deassert resets, power on, set multiplier */
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/* Deassert resets, power on */
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iowrite32(0x03070b01, base + PHYCTRL);
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iowrite32(0x03070001, base + PHYCTRL);
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/* setup l-bridge */
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/* setup l-bridge */
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@ -421,6 +420,9 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
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if (!res || !res2 || idx >= ARRAY_SIZE(mipi_dsi) || !pdata)
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if (!res || !res2 || idx >= ARRAY_SIZE(mipi_dsi) || !pdata)
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return -ENODEV;
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return -ENODEV;
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if (!pdata->set_dot_clock)
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return -EINVAL;
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mutex_lock(&array_lock);
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mutex_lock(&array_lock);
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if (idx < 0)
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if (idx < 0)
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for (idx = 0; idx < ARRAY_SIZE(mipi_dsi) && mipi_dsi[idx]; idx++)
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for (idx = 0; idx < ARRAY_SIZE(mipi_dsi) && mipi_dsi[idx]; idx++)
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@ -481,34 +483,10 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
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dev_dbg(&pdev->dev, "DSI-T clk %lu -> %lu\n", f_current, rate);
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dev_dbg(&pdev->dev, "DSI-T clk %lu -> %lu\n", f_current, rate);
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mipi->dsip_clk = clk_get(&pdev->dev, "dsip_clk");
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if (IS_ERR(mipi->dsip_clk)) {
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ret = PTR_ERR(mipi->dsip_clk);
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goto eclkpget;
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}
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f_current = clk_get_rate(mipi->dsip_clk);
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/* Between 10 and 50MHz */
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rate = clk_round_rate(mipi->dsip_clk, 24000000);
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if (rate > 0 && rate != f_current)
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ret = clk_set_rate(mipi->dsip_clk, rate);
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else
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ret = rate;
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if (ret < 0)
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goto esetprate;
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dev_dbg(&pdev->dev, "DSI-P clk %lu -> %lu\n", f_current, rate);
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msleep(10);
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ret = clk_enable(mipi->dsit_clk);
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ret = clk_enable(mipi->dsit_clk);
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if (ret < 0)
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if (ret < 0)
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goto eclkton;
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goto eclkton;
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ret = clk_enable(mipi->dsip_clk);
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if (ret < 0)
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goto eclkpon;
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mipi_dsi[idx] = mipi;
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mipi_dsi[idx] = mipi;
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pm_runtime_enable(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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@ -518,6 +496,10 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
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if (ret < 0)
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if (ret < 0)
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goto emipisetup;
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goto emipisetup;
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ret = pdata->set_dot_clock(pdev, mipi->base, 1);
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if (ret < 0)
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goto emipisetup;
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mutex_unlock(&array_lock);
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mutex_unlock(&array_lock);
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platform_set_drvdata(pdev, mipi);
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platform_set_drvdata(pdev, mipi);
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@ -537,13 +519,8 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
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emipisetup:
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emipisetup:
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mipi_dsi[idx] = NULL;
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mipi_dsi[idx] = NULL;
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pm_runtime_disable(&pdev->dev);
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pm_runtime_disable(&pdev->dev);
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clk_disable(mipi->dsip_clk);
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eclkpon:
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clk_disable(mipi->dsit_clk);
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clk_disable(mipi->dsit_clk);
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eclkton:
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eclkton:
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esetprate:
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clk_put(mipi->dsip_clk);
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eclkpget:
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esettrate:
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esettrate:
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clk_put(mipi->dsit_clk);
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clk_put(mipi->dsit_clk);
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eclktget:
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eclktget:
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@ -594,10 +571,10 @@ static int __exit sh_mipi_remove(struct platform_device *pdev)
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pdata->lcd_chan->board_cfg.board_data = NULL;
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pdata->lcd_chan->board_cfg.board_data = NULL;
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pm_runtime_disable(&pdev->dev);
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pm_runtime_disable(&pdev->dev);
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clk_disable(mipi->dsip_clk);
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clk_disable(mipi->dsit_clk);
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clk_disable(mipi->dsit_clk);
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clk_put(mipi->dsit_clk);
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clk_put(mipi->dsit_clk);
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clk_put(mipi->dsip_clk);
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pdata->set_dot_clock(pdev, mipi->base, 0);
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iounmap(mipi->linkbase);
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iounmap(mipi->linkbase);
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if (res2)
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if (res2)
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release_mem_region(res2->start, resource_size(res2));
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release_mem_region(res2->start, resource_size(res2));
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@ -48,6 +48,9 @@ struct sh_mipi_dsi_info {
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unsigned long flags;
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unsigned long flags;
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u32 clksrc;
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u32 clksrc;
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unsigned int vsynw_offset;
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unsigned int vsynw_offset;
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int (*set_dot_clock)(struct platform_device *pdev,
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void __iomem *base,
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int enable);
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};
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};
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#endif
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#endif
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