mtd: atmel_nand: enable Nand Flash Controller (NFC) write via sram
This patch enable writing nand flash via NFC SRAM. It will minimize the CPU overhead. The SRAM write only support ECC_NONE and ECC_HW with PMECC. To enable this NFC write by SRAM feature, you can add a string in dts under NFC driver node. This driver has been tested on SAMA5D3X-EK with JFFS2, YAFFS2, UBIFS and mtd-utils. Here is part of mtd_speedtest (writing test) result, compare with non-NFC writing, it reduces %65 cpu load with loss %12 speed. - commands use to test: # insmod /mnt/mtd_speedtest.ko dev=2 & # top -n 30 -d 1 | grep speedtest - test result: ================================================= mtd_speedtest: MTD device: 2 mtd_speedtest: MTD device size 41943040, eraseblock size 131072, page size 2048, count of eraseblocks 320, pages per eraseblock 64, OOB size 64 mtd_speedtest: testing eraseblock write speed 509 495 root D 1164 0% 7% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 8% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root R 1164 0% 5% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: eraseblock write speed is 5194 KiB/s mtd_speedtest: testing page write speed 509 495 root D 1164 0% 32% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 27% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 25% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 30% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: page write speed is 5024 KiB/s Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This commit is contained in:
Josh Wu
David Woodhouse
parent
1ae9c092ef
commit
6054d4d563
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@ -36,6 +36,8 @@ Optional properties:
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- reg : should specify the address and size used for NFC command registers,
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NFC registers and NFC Sram. NFC Sram address and size can be absent
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if don't want to use it.
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- Optional properties:
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- atmel,write-by-sram: boolean to enable NFC write by sram.
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Examples:
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nand0: nand@40000000,0 {
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@ -94,12 +94,14 @@ struct atmel_nfc {
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void __iomem *sram_bank0;
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dma_addr_t sram_bank0_phys;
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bool use_nfc_sram;
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bool write_by_sram;
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bool is_initialized;
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struct completion comp_nfc;
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/* Point to the sram bank which include readed data via NFC */
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void __iomem *data_in_sram;
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bool will_write_sram;
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};
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static struct atmel_nfc nand_nfc;
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@ -261,6 +263,16 @@ static void memcpy32_fromio(void *trg, const void __iomem *src, size_t size)
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*t++ = readl_relaxed(s++);
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}
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static void memcpy32_toio(void __iomem *trg, const void *src, int size)
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{
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int i;
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u32 __iomem *t = trg;
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const u32 *s = src;
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for (i = 0; i < (size >> 2); i++)
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writel_relaxed(*s++, t++);
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}
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/*
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* Minimal-overhead PIO for data access.
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*/
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@ -382,7 +394,11 @@ static int atmel_nand_dma_op(struct mtd_info *mtd, void *buf, int len,
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dma_dst_addr = phys_addr;
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} else {
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dma_src_addr = phys_addr;
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dma_dst_addr = host->io_phys;
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if (nfc && nfc->write_by_sram)
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dma_dst_addr = nfc_sram_phys(host);
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else
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dma_dst_addr = host->io_phys;
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}
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tx = dma_dev->device_prep_dma_memcpy(host->dma_chan, dma_dst_addr,
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@ -954,9 +970,10 @@ static int atmel_nand_pmecc_write_page(struct mtd_info *mtd,
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int i, j;
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unsigned long end_time;
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pmecc_enable(host, NAND_ECC_WRITE);
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chip->write_buf(mtd, (u8 *)buf, mtd->writesize);
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if (!host->nfc || !host->nfc->write_by_sram) {
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pmecc_enable(host, NAND_ECC_WRITE);
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chip->write_buf(mtd, (u8 *)buf, mtd->writesize);
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}
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end_time = jiffies + msecs_to_jiffies(PMECC_MAX_TIMEOUT_MS);
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while ((pmecc_readl_relaxed(host->ecc, SR) & PMECC_SR_BUSY)) {
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@ -1798,6 +1815,8 @@ static void nfc_nand_command(struct mtd_info *mtd, unsigned int command,
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case NAND_CMD_SEQIN:
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case NAND_CMD_RNDIN:
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nfcwr = NFCADDR_CMD_NFCWR;
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if (host->nfc->will_write_sram && command == NAND_CMD_SEQIN)
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dataen = NFCADDR_CMD_DATAEN;
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break;
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default:
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break;
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@ -1842,6 +1861,68 @@ static void nfc_nand_command(struct mtd_info *mtd, unsigned int command,
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}
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}
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static int nfc_sram_write_page(struct mtd_info *mtd, struct nand_chip *chip,
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uint32_t offset, int data_len, const uint8_t *buf,
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int oob_required, int page, int cached, int raw)
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{
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int cfg, len;
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int status = 0;
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struct atmel_nand_host *host = chip->priv;
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void __iomem *sram = host->nfc->sram_bank0 + nfc_get_sram_off(host);
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/* Subpage write is not supported */
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if (offset || (data_len < mtd->writesize))
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return -EINVAL;
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cfg = nfc_readl(host->nfc->hsmc_regs, CFG);
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len = mtd->writesize;
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if (unlikely(raw)) {
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len += mtd->oobsize;
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nfc_writel(host->nfc->hsmc_regs, CFG, cfg | NFC_CFG_WSPARE);
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} else
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nfc_writel(host->nfc->hsmc_regs, CFG, cfg & ~NFC_CFG_WSPARE);
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/* Copy page data to sram that will write to nand via NFC */
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if (use_dma) {
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if (atmel_nand_dma_op(mtd, (void *)buf, len, 0) != 0)
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/* Fall back to use cpu copy */
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memcpy32_toio(sram, buf, len);
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} else {
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memcpy32_toio(sram, buf, len);
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}
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if (chip->ecc.mode == NAND_ECC_HW && host->has_pmecc)
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/*
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* When use NFC sram, need set up PMECC before send
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* NAND_CMD_SEQIN command. Since when the nand command
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* is sent, nfc will do transfer from sram and nand.
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*/
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pmecc_enable(host, NAND_ECC_WRITE);
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host->nfc->will_write_sram = true;
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chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
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host->nfc->will_write_sram = false;
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if (likely(!raw))
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/* Need to write ecc into oob */
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status = chip->ecc.write_page(mtd, chip, buf, oob_required);
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if (status < 0)
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return status;
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chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
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status = chip->waitfunc(mtd, chip);
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if ((status & NAND_STATUS_FAIL) && (chip->errstat))
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status = chip->errstat(mtd, chip, FL_WRITING, status, page);
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if (status & NAND_STATUS_FAIL)
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return -EIO;
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return 0;
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}
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static int nfc_sram_init(struct mtd_info *mtd)
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{
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struct nand_chip *chip = mtd->priv;
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@ -1884,10 +1965,20 @@ static int nfc_sram_init(struct mtd_info *mtd)
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nfc_writel(host->nfc->hsmc_regs, CFG, cfg_nfc);
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host->nfc->will_write_sram = false;
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nfc_set_sram_bank(host, 0);
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dev_info(host->dev, "Using NFC Sram read\n");
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/* Use Write page with NFC SRAM only for PMECC or ECC NONE. */
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if (host->nfc->write_by_sram) {
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if ((chip->ecc.mode == NAND_ECC_HW && host->has_pmecc) ||
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chip->ecc.mode == NAND_ECC_NONE)
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chip->write_page = nfc_sram_write_page;
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else
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host->nfc->write_by_sram = false;
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}
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dev_info(host->dev, "Using NFC Sram read %s\n",
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host->nfc->write_by_sram ? "and write" : "");
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return 0;
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}
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@ -2147,6 +2238,11 @@ static int atmel_nand_nfc_probe(struct platform_device *pdev)
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} else {
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nfc->use_nfc_sram = true;
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nfc->sram_bank0_phys = (dma_addr_t)nfc_sram->start;
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if (pdev->dev.of_node)
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nfc->write_by_sram = of_property_read_bool(
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pdev->dev.of_node,
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"atmel,write-by-sram");
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}
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}
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