[BNX2]: Re-structure the 2.5G Serdes code.
Add some common procedures to handle enabling and disabling 2.5G. Add some missing code to resolve flow control. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -898,6 +898,86 @@ bnx2_set_mac_link(struct bnx2 *bp)
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return 0;
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}
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static int
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bnx2_test_and_enable_2g5(struct bnx2 *bp)
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{
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u32 up1;
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int ret = 1;
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if (!(bp->phy_flags & PHY_2_5G_CAPABLE_FLAG))
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return 0;
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if (bp->autoneg & AUTONEG_SPEED)
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bp->advertising |= ADVERTISED_2500baseX_Full;
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bnx2_read_phy(bp, bp->mii_up1, &up1);
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if (!(up1 & BCM5708S_UP1_2G5)) {
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up1 |= BCM5708S_UP1_2G5;
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bnx2_write_phy(bp, bp->mii_up1, up1);
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ret = 0;
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}
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return ret;
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}
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static int
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bnx2_test_and_disable_2g5(struct bnx2 *bp)
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{
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u32 up1;
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int ret = 0;
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if (!(bp->phy_flags & PHY_2_5G_CAPABLE_FLAG))
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return 0;
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bnx2_read_phy(bp, bp->mii_up1, &up1);
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if (up1 & BCM5708S_UP1_2G5) {
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up1 &= ~BCM5708S_UP1_2G5;
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bnx2_write_phy(bp, bp->mii_up1, up1);
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ret = 1;
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}
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return ret;
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}
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static void
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bnx2_enable_forced_2g5(struct bnx2 *bp)
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{
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u32 bmcr;
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if (!(bp->phy_flags & PHY_2_5G_CAPABLE_FLAG))
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return;
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if (CHIP_NUM(bp) == CHIP_NUM_5708) {
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bnx2_read_phy(bp, bp->mii_bmcr, &bmcr);
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bmcr |= BCM5708S_BMCR_FORCE_2500;
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}
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if (bp->autoneg & AUTONEG_SPEED) {
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bmcr &= ~BMCR_ANENABLE;
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if (bp->req_duplex == DUPLEX_FULL)
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bmcr |= BMCR_FULLDPLX;
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}
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bnx2_write_phy(bp, bp->mii_bmcr, bmcr);
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}
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static void
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bnx2_disable_forced_2g5(struct bnx2 *bp)
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{
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u32 bmcr;
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if (!(bp->phy_flags & PHY_2_5G_CAPABLE_FLAG))
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return;
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if (CHIP_NUM(bp) == CHIP_NUM_5708) {
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bnx2_read_phy(bp, bp->mii_bmcr, &bmcr);
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bmcr &= ~BCM5708S_BMCR_FORCE_2500;
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}
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if (bp->autoneg & AUTONEG_SPEED)
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bmcr |= BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_ANRESTART;
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bnx2_write_phy(bp, bp->mii_bmcr, bmcr);
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}
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static int
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bnx2_set_link(struct bnx2 *bp)
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{
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@ -941,17 +1021,9 @@ bnx2_set_link(struct bnx2 *bp)
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}
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else {
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if ((bp->phy_flags & PHY_SERDES_FLAG) &&
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(bp->autoneg & AUTONEG_SPEED)) {
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(bp->autoneg & AUTONEG_SPEED))
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bnx2_disable_forced_2g5(bp);
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u32 bmcr;
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bnx2_read_phy(bp, MII_BMCR, &bmcr);
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bmcr &= ~BCM5708S_BMCR_FORCE_2500;
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if (!(bmcr & BMCR_ANENABLE)) {
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bnx2_write_phy(bp, MII_BMCR, bmcr |
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BMCR_ANENABLE);
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}
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}
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bp->phy_flags &= ~PHY_PARALLEL_DETECT_FLAG;
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bp->link_up = 0;
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}
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@ -1026,34 +1098,32 @@ bnx2_phy_get_pause_adv(struct bnx2 *bp)
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static int
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bnx2_setup_serdes_phy(struct bnx2 *bp)
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{
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u32 adv, bmcr, up1;
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u32 adv, bmcr;
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u32 new_adv = 0;
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if (!(bp->autoneg & AUTONEG_SPEED)) {
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u32 new_bmcr;
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int force_link_down = 0;
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if (bp->req_line_speed == SPEED_2500) {
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if (!bnx2_test_and_enable_2g5(bp))
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force_link_down = 1;
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} else if (bp->req_line_speed == SPEED_1000) {
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if (bnx2_test_and_disable_2g5(bp))
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force_link_down = 1;
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}
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bnx2_read_phy(bp, bp->mii_adv, &adv);
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adv &= ~(ADVERTISE_1000XFULL | ADVERTISE_1000XHALF);
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bnx2_read_phy(bp, bp->mii_bmcr, &bmcr);
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new_bmcr = bmcr & ~(BMCR_ANENABLE | BCM5708S_BMCR_FORCE_2500);
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new_bmcr = bmcr & ~BMCR_ANENABLE;
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new_bmcr |= BMCR_SPEED1000;
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if (bp->req_line_speed == SPEED_2500) {
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if (CHIP_NUM(bp) == CHIP_NUM_5708) {
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if (bp->req_line_speed == SPEED_2500)
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new_bmcr |= BCM5708S_BMCR_FORCE_2500;
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bnx2_read_phy(bp, BCM5708S_UP1, &up1);
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if (!(up1 & BCM5708S_UP1_2G5)) {
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up1 |= BCM5708S_UP1_2G5;
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bnx2_write_phy(bp, BCM5708S_UP1, up1);
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force_link_down = 1;
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}
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} else if (CHIP_NUM(bp) == CHIP_NUM_5708) {
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bnx2_read_phy(bp, BCM5708S_UP1, &up1);
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if (up1 & BCM5708S_UP1_2G5) {
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up1 &= ~BCM5708S_UP1_2G5;
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bnx2_write_phy(bp, BCM5708S_UP1, up1);
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force_link_down = 1;
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}
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else
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new_bmcr = bmcr & ~BCM5708S_BMCR_FORCE_2500;
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}
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if (bp->req_duplex == DUPLEX_FULL) {
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@ -1080,15 +1150,14 @@ bnx2_setup_serdes_phy(struct bnx2 *bp)
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}
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bnx2_write_phy(bp, bp->mii_adv, adv);
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bnx2_write_phy(bp, bp->mii_bmcr, new_bmcr);
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} else {
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bnx2_resolve_flow_ctrl(bp);
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bnx2_set_mac_link(bp);
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}
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return 0;
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}
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if (bp->phy_flags & PHY_2_5G_CAPABLE_FLAG) {
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bnx2_read_phy(bp, BCM5708S_UP1, &up1);
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up1 |= BCM5708S_UP1_2G5;
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bnx2_write_phy(bp, BCM5708S_UP1, up1);
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}
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bnx2_test_and_enable_2g5(bp);
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if (bp->advertising & ADVERTISED_1000baseT_Full)
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new_adv |= ADVERTISE_1000XFULL;
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@ -1122,6 +1191,9 @@ bnx2_setup_serdes_phy(struct bnx2 *bp)
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bp->current_interval = SERDES_AN_TIMEOUT;
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bp->serdes_an_pending = 1;
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mod_timer(&bp->timer, jiffies + bp->current_interval);
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} else {
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bnx2_resolve_flow_ctrl(bp);
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bnx2_set_mac_link(bp);
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}
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return 0;
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@ -4300,16 +4372,11 @@ bnx2_5708_serdes_timer(struct bnx2 *bp)
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u32 bmcr;
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bnx2_read_phy(bp, bp->mii_bmcr, &bmcr);
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if (bmcr & BMCR_ANENABLE) {
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bmcr &= ~BMCR_ANENABLE;
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bmcr |= BMCR_FULLDPLX | BCM5708S_BMCR_FORCE_2500;
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bnx2_write_phy(bp, MII_BMCR, bmcr);
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bnx2_enable_forced_2g5(bp);
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bp->current_interval = SERDES_FORCED_TIMEOUT;
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} else {
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bmcr &= ~(BMCR_FULLDPLX | BCM5708S_BMCR_FORCE_2500);
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bmcr |= BMCR_ANENABLE;
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bnx2_write_phy(bp, MII_BMCR, bmcr);
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bnx2_disable_forced_2g5(bp);
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bp->serdes_an_pending = 2;
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bp->current_interval = bp->timer_interval;
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}
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@ -4778,6 +4845,8 @@ bnx2_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
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if (bp->phy_flags & PHY_SERDES_FLAG) {
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cmd->supported |= SUPPORTED_1000baseT_Full |
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SUPPORTED_FIBRE;
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if (bp->phy_flags & PHY_2_5G_CAPABLE_FLAG)
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cmd->supported |= SUPPORTED_2500baseX_Full;
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cmd->port = PORT_FIBRE;
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}
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