mmc: sdhci: pxav3: controller needs 32 bit ADMA addressing
Enable the quirk. (Best used in conjunction with patch downgrading ADMA to SDMA when transfer is not aligned.) Signed-off-by: Philip Rakity <prakity@marvell.com> Acked-by: Zhangfei Gao <zhangfei.gao@marvell.com> Signed-off-by: Chris Ball <cjb@laptop.org>
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@ -195,7 +195,8 @@ static int __devinit sdhci_pxav3_probe(struct platform_device *pdev)
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clk_enable(clk);
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host->quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
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| SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC;
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| SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
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| SDHCI_QUIRK_32BIT_ADMA_SIZE;
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/* enable 1/8V DDR capable */
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host->mmc->caps |= MMC_CAP_1_8V_DDR;
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