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mmc: sdhci: pxav3: controller needs 32 bit ADMA addressing 

Enable the quirk.

(Best used in conjunction with patch downgrading ADMA to SDMA when
transfer is not aligned.)

Signed-off-by: Philip Rakity <prakity@marvell.com>
Acked-by: Zhangfei Gao <zhangfei.gao@marvell.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
This commit is contained in:
Philip Rakity 2011-07-11 14:47:54 -07:00 committed by Chris Ball
parent 78869618a8
commit 606a15e475
1 changed files with 2 additions and 1 deletions
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3
drivers/mmc/host/sdhci-pxav3.c
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@ -195,7 +195,8 @@ static int __devinit sdhci_pxav3_probe(struct platform_device *pdev)
clk_enable(clk);
host->quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
| SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC;
| SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
| SDHCI_QUIRK_32BIT_ADMA_SIZE;
/* enable 1/8V DDR capable */
host->mmc->caps |= MMC_CAP_1_8V_DDR;