gpu: ipu-cpmem: Add ipu_cpmem_dump()
Adds ipu_cpmem_dump() which dumps a channel's cpmem to debug. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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@ -674,6 +674,69 @@ int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct ipu_image *image)
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}
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EXPORT_SYMBOL_GPL(ipu_cpmem_set_image);
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void ipu_cpmem_dump(struct ipuv3_channel *ch)
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{
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struct ipu_ch_param __iomem *p = ipu_get_cpmem(ch);
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struct ipu_soc *ipu = ch->ipu;
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int chno = ch->num;
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dev_dbg(ipu->dev, "ch %d word 0 - %08X %08X %08X %08X %08X\n", chno,
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readl(&p->word[0].data[0]),
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readl(&p->word[0].data[1]),
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readl(&p->word[0].data[2]),
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readl(&p->word[0].data[3]),
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readl(&p->word[0].data[4]));
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dev_dbg(ipu->dev, "ch %d word 1 - %08X %08X %08X %08X %08X\n", chno,
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readl(&p->word[1].data[0]),
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readl(&p->word[1].data[1]),
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readl(&p->word[1].data[2]),
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readl(&p->word[1].data[3]),
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readl(&p->word[1].data[4]));
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dev_dbg(ipu->dev, "PFS 0x%x, ",
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ipu_ch_param_read_field(ch, IPU_FIELD_PFS));
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dev_dbg(ipu->dev, "BPP 0x%x, ",
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ipu_ch_param_read_field(ch, IPU_FIELD_BPP));
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dev_dbg(ipu->dev, "NPB 0x%x\n",
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ipu_ch_param_read_field(ch, IPU_FIELD_NPB));
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dev_dbg(ipu->dev, "FW %d, ",
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ipu_ch_param_read_field(ch, IPU_FIELD_FW));
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dev_dbg(ipu->dev, "FH %d, ",
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ipu_ch_param_read_field(ch, IPU_FIELD_FH));
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dev_dbg(ipu->dev, "EBA0 0x%x\n",
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ipu_ch_param_read_field(ch, IPU_FIELD_EBA0) << 3);
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dev_dbg(ipu->dev, "EBA1 0x%x\n",
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ipu_ch_param_read_field(ch, IPU_FIELD_EBA1) << 3);
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dev_dbg(ipu->dev, "Stride %d\n",
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ipu_ch_param_read_field(ch, IPU_FIELD_SL));
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dev_dbg(ipu->dev, "scan_order %d\n",
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ipu_ch_param_read_field(ch, IPU_FIELD_SO));
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dev_dbg(ipu->dev, "uv_stride %d\n",
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ipu_ch_param_read_field(ch, IPU_FIELD_SLUV));
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dev_dbg(ipu->dev, "u_offset 0x%x\n",
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ipu_ch_param_read_field(ch, IPU_FIELD_UBO) << 3);
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dev_dbg(ipu->dev, "v_offset 0x%x\n",
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ipu_ch_param_read_field(ch, IPU_FIELD_VBO) << 3);
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dev_dbg(ipu->dev, "Width0 %d+1, ",
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ipu_ch_param_read_field(ch, IPU_FIELD_WID0));
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dev_dbg(ipu->dev, "Width1 %d+1, ",
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ipu_ch_param_read_field(ch, IPU_FIELD_WID1));
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dev_dbg(ipu->dev, "Width2 %d+1, ",
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ipu_ch_param_read_field(ch, IPU_FIELD_WID2));
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dev_dbg(ipu->dev, "Width3 %d+1, ",
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ipu_ch_param_read_field(ch, IPU_FIELD_WID3));
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dev_dbg(ipu->dev, "Offset0 %d, ",
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ipu_ch_param_read_field(ch, IPU_FIELD_OFS0));
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dev_dbg(ipu->dev, "Offset1 %d, ",
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ipu_ch_param_read_field(ch, IPU_FIELD_OFS1));
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dev_dbg(ipu->dev, "Offset2 %d, ",
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ipu_ch_param_read_field(ch, IPU_FIELD_OFS2));
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dev_dbg(ipu->dev, "Offset3 %d\n",
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ipu_ch_param_read_field(ch, IPU_FIELD_OFS3));
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}
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EXPORT_SYMBOL_GPL(ipu_cpmem_dump);
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int ipu_cpmem_init(struct ipu_soc *ipu, struct device *dev, unsigned long base)
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{
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struct ipu_cpmem *cpmem;
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@ -211,6 +211,7 @@ void ipu_cpmem_set_yuv_planar(struct ipuv3_channel *ch,
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u32 pixel_format, int stride, int height);
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int ipu_cpmem_set_fmt(struct ipuv3_channel *ch, u32 drm_fourcc);
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int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct ipu_image *image);
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void ipu_cpmem_dump(struct ipuv3_channel *ch);
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/*
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* IPU Display Controller (dc) functions
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