korina: do tx at the right position
Triggering TX before the write to the DMA status mask register leads to transferring packets with maximum payload no matter what the actual packet size is. While here, also trigger RX scheduling after writing the DMA status mask register, like it was in the original driver before it was sent upstream. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Acked-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -330,13 +330,13 @@ static irqreturn_t korina_rx_dma_interrupt(int irq, void *dev_id)
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dmas = readl(&lp->rx_dma_regs->dmas);
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if (dmas & (DMA_STAT_DONE | DMA_STAT_HALT | DMA_STAT_ERR)) {
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netif_rx_schedule(&lp->napi);
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dmasm = readl(&lp->rx_dma_regs->dmasm);
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writel(dmasm | (DMA_STAT_DONE |
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DMA_STAT_HALT | DMA_STAT_ERR),
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&lp->rx_dma_regs->dmasm);
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netif_rx_schedule(&lp->napi);
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if (dmas & DMA_STAT_ERR)
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printk(KERN_ERR DRV_NAME "%s: DMA error\n", dev->name);
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@ -623,12 +623,12 @@ korina_tx_dma_interrupt(int irq, void *dev_id)
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dmas = readl(&lp->tx_dma_regs->dmas);
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if (dmas & (DMA_STAT_FINI | DMA_STAT_ERR)) {
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korina_tx(dev);
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dmasm = readl(&lp->tx_dma_regs->dmasm);
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writel(dmasm | (DMA_STAT_FINI | DMA_STAT_ERR),
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&lp->tx_dma_regs->dmasm);
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korina_tx(dev);
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if (lp->tx_chain_status == desc_filled &&
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(readl(&(lp->tx_dma_regs->dmandptr)) == 0)) {
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writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]),
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