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openrisc: fix possible deadlock scenario during timer sync 

OpenRISC borrows its timer sync logic from MIPS, Matt helped to review
the OpenRISC implementation and noted that we may suffer the same
deadlock case that MIPS has faced. The case being:

  "the MIPS timer synchronization code contained the possibility of
  deadlock. If you mark a CPU online before it goes into the synchronize
  loop, then the boot CPU can schedule a different thread and send IPIs to
  all "online" CPUs. It gets stuck waiting for the secondary to ack it's
  IPI, since this secondary CPU has not enabled IRQs yet, and is stuck
  waiting for the master to synchronise with it.  The system then
  deadlocks."

Fix this by moving set_cpu_online() to after timer sync.

Reported-by: Matt Redfearn <matt.redfearn@mips.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
This commit is contained in:
Stafford Horne 2017-11-03 12:22:27 +09:00
parent afa8380881
commit 610f01b9a8
1 changed files with 1 additions and 1 deletions
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2
arch/openrisc/kernel/smp.c
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@ -127,10 +127,10 @@ asmlinkage __init void secondary_start_kernel(void)
/*
* OK, now it's safe to let the boot CPU continue
*/
set_cpu_online(cpu, true);
complete(&cpu_running);
synchronise_count_slave(cpu);
set_cpu_online(cpu, true);
local_irq_enable();