OpenRISC: Miscellaneous
Adds README file, TODO list, and a couple of other pieces that didn't seem to fit into any other patch. Signed-off-by: Jonas Bonn <jonas@southpole.se> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
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OpenRISC Linux
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==============
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This is a port of Linux to the OpenRISC class of microprocessors; the initial
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target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k).
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For information about OpenRISC processors and ongoing development:
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website http://openrisc.net
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For more information about Linux on OpenRISC, please contact South Pole AB.
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email: info@southpole.se
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website: http://southpole.se
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http://southpoleconsulting.com
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---------------------------------------------------------------------
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Build instructions for OpenRISC toolchain and Linux
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===================================================
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In order to build and run Linux for OpenRISC, you'll need at least a basic
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toolchain and, perhaps, the architectural simulator. Steps to get these bits
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in place are outlined here.
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1) The toolchain can be obtained from openrisc.net. Instructions for building
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a toolchain can be found at:
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http://openrisc.net/toolchain-build.html
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2) or1ksim (optional)
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or1ksim is the architectural simulator which will allow you to actually run
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your OpenRISC Linux kernel if you don't have an OpenRISC processor at hand.
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git clone git://openrisc.net/jonas/or1ksim-svn
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cd or1ksim
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./configure --prefix=$OPENRISC_PREFIX
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make
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make install
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3) Linux kernel
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Build the kernel as usual
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make ARCH=openrisc defconfig
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make ARCH=openrisc
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4) Run in architectural simulator
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Grab the or1ksim platform configuration file (from the or1ksim source) and
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together with your freshly built vmlinux, run your kernel with the following
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incantation:
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sim -f arch/openrisc/or1ksim.cfg vmlinux
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---------------------------------------------------------------------
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Terminology
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===========
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In the code, the following particles are used on symbols to limit the scope
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to more or less specific processor implementations:
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openrisc: the OpenRISC class of processors
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or1k: the OpenRISC 1000 family of processors
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or1200: the OpenRISC 1200 processor
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---------------------------------------------------------------------
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History
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========
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18. 11. 2003 Matjaz Breskvar (phoenix@bsemi.com)
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initial port of linux to OpenRISC/or32 architecture.
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all the core stuff is implemented and seams usable.
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08. 12. 2003 Matjaz Breskvar (phoenix@bsemi.com)
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complete change of TLB miss handling.
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rewrite of exceptions handling.
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fully functional sash-3.6 in default initrd.
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a much improved version with changes all around.
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10. 04. 2004 Matjaz Breskvar (phoenix@bsemi.com)
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alot of bugfixes all over.
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ethernet support, functional http and telnet servers.
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running many standard linux apps.
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26. 06. 2004 Matjaz Breskvar (phoenix@bsemi.com)
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port to 2.6.x
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30. 11. 2004 Matjaz Breskvar (phoenix@bsemi.com)
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lots of bugfixes and enhancments.
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added opencores framebuffer driver.
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09. 10. 2010 Jonas Bonn (jonas@southpole.se)
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major rewrite to bring up to par with upstream Linux 2.6.36
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The OpenRISC Linux port is fully functional and has been tracking upstream
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since 2.6.35. There are, however, remaining items to be completed within
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the coming months. Here's a list of known-to-be-less-than-stellar items
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that are due for investigation shortly, i.e. our TODO list:
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-- Implement the rest of the DMA API... dma_map_sg, etc.
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-- Consolidate usage of memblock and bootmem... move everything over to
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memblock.
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-- Finish the renaming cleanup... there are references to or32 in the code
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which was an older name for the architecture. The name we've settled on is
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or1k and this change is slowly trickling through the stack. For the time
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being, or32 is equivalent to or1k.
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-- Implement optimized version of memcpy and memset
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/*
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* OpenRISC asm-offsets.c
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*
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* Linux architectural port borrowing liberally from similar works of
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* others. All original copyrights apply as per the original source
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* declaration.
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*
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* Modifications for the OpenRISC architecture:
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* Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
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* Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* This program is used to generate definitions needed by
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* assembly language modules.
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*
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* We use the technique used in the OSF Mach kernel code:
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* generate asm statements containing #defines,
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* compile this file to assembler, and then extract the
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* #defines from the assembly-language output.
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*/
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/ptrace.h>
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#include <linux/mman.h>
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#include <linux/mm.h>
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#include <linux/io.h>
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#include <linux/thread_info.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/processor.h>
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#define DEFINE(sym, val) \
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asm volatile("\n->" #sym " %0 " #val : : "i" (val))
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#define BLANK() asm volatile("\n->" : : )
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int main(void)
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{
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/* offsets into the task_struct */
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DEFINE(TASK_STATE, offsetof(struct task_struct, state));
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DEFINE(TASK_FLAGS, offsetof(struct task_struct, flags));
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DEFINE(TASK_PTRACE, offsetof(struct task_struct, ptrace));
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DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
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DEFINE(TASK_MM, offsetof(struct task_struct, mm));
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DEFINE(TASK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
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/* offsets into thread_info */
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DEFINE(TI_TASK, offsetof(struct thread_info, task));
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DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
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DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
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DEFINE(TI_KSP, offsetof(struct thread_info, ksp));
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DEFINE(PT_SIZE, sizeof(struct pt_regs));
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/* Interrupt register frame */
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DEFINE(STACK_FRAME_OVERHEAD, STACK_FRAME_OVERHEAD);
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DEFINE(INT_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
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DEFINE(NUM_USER_SEGMENTS, TASK_SIZE >> 28);
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return 0;
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}
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/*
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* OpenRISC or32_ksyms.c
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*
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* Linux architectural port borrowing liberally from similar works of
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* others. All original copyrights apply as per the original source
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* declaration.
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*
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* Modifications for the OpenRISC architecture:
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* Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
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* Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/elfcore.h>
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#include <linux/sched.h>
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#include <linux/in6.h>
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#include <linux/interrupt.h>
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#include <linux/vmalloc.h>
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#include <linux/semaphore.h>
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#include <asm/processor.h>
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#include <asm/uaccess.h>
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#include <asm/checksum.h>
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#include <asm/io.h>
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#include <asm/hardirq.h>
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#include <asm/delay.h>
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#include <asm/pgalloc.h>
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#define DECLARE_EXPORT(name) extern void name(void); EXPORT_SYMBOL(name)
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/* compiler generated symbols */
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DECLARE_EXPORT(__udivsi3);
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DECLARE_EXPORT(__divsi3);
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DECLARE_EXPORT(__umodsi3);
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DECLARE_EXPORT(__modsi3);
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DECLARE_EXPORT(__muldi3);
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DECLARE_EXPORT(__ashrdi3);
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DECLARE_EXPORT(__ashldi3);
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DECLARE_EXPORT(__lshrdi3);
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EXPORT_SYMBOL(__copy_tofrom_user);
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