ASoC: rt5682: optimize the power consumption

Some settings should set to default value after the calibration.
This patch also disables the 25MHz and 1MHz clock power when the jack unplugged.
The JD is triggered by JDH, therefore this patch removes JDL setting.

Signed-off-by: Shuming Fan <shumingf@realtek.com>
Link: https://lore.kernel.org/r/20200717070228.28660-1-shumingf@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Shuming Fan 2020-07-17 15:02:28 +08:00 committed by Mark Brown
parent ca00e66c1b
commit 6301adf942
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
3 changed files with 11 additions and 5 deletions

View File

@ -232,7 +232,7 @@ static int rt5682_i2c_probe(struct i2c_client *i2c,
regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1,
RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK,
RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X);
regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0380);
regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080);
regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1,
RT5682_GP4_PIN_MASK | RT5682_GP5_PIN_MASK,
RT5682_GP4_PIN_ADCDAT1 | RT5682_GP5_PIN_DACDAT1);

View File

@ -431,7 +431,7 @@ static int rt5682_io_init(struct device *dev, struct sdw_slave *slave)
regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1,
RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK,
RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X);
regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0380);
regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080);
regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000);
regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8,
RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA);

View File

@ -963,6 +963,9 @@ int rt5682_headset_detect(struct snd_soc_component *component, int jack_insert)
RT5682_HP_CHARGE_PUMP_1,
RT5682_OSW_L_MASK | RT5682_OSW_R_MASK,
RT5682_OSW_L_EN | RT5682_OSW_R_EN);
snd_soc_component_update_bits(component, RT5682_MICBIAS_2,
RT5682_PWR_CLK25M_MASK | RT5682_PWR_CLK1M_MASK,
RT5682_PWR_CLK25M_PU | RT5682_PWR_CLK1M_PU);
} else {
rt5682_enable_push_button_irq(component, false);
snd_soc_component_update_bits(component, RT5682_CBJ_CTRL_1,
@ -976,6 +979,9 @@ int rt5682_headset_detect(struct snd_soc_component *component, int jack_insert)
RT5682_PWR_VREF2 | RT5682_PWR_MB, 0);
snd_soc_component_update_bits(component, RT5682_PWR_ANLG_3,
RT5682_PWR_CBJ, 0);
snd_soc_component_update_bits(component, RT5682_MICBIAS_2,
RT5682_PWR_CLK25M_MASK | RT5682_PWR_CLK1M_MASK,
RT5682_PWR_CLK25M_PD | RT5682_PWR_CLK1M_PD);
rt5682->jack_type = 0;
}
@ -1023,8 +1029,7 @@ static int rt5682_set_jack_detect(struct snd_soc_component *component,
RT5682_POW_ANA, RT5682_POW_IRQ |
RT5682_POW_JDH | RT5682_POW_ANA);
regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2,
RT5682_PWR_JDH | RT5682_PWR_JDL,
RT5682_PWR_JDH | RT5682_PWR_JDL);
RT5682_PWR_JDH, RT5682_PWR_JDH);
regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2,
RT5682_JD1_EN_MASK | RT5682_JD1_POL_MASK,
RT5682_JD1_EN | RT5682_JD1_POL_NOR);
@ -3024,13 +3029,14 @@ void rt5682_calibrate(struct rt5682_priv *rt5682)
dev_err(rt5682->component->dev, "HP Calibration Failure\n");
/* restore settings */
regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0x02af);
regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0x002f);
regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080);
regmap_write(rt5682->regmap, RT5682_GLB_CLK, 0x0000);
regmap_write(rt5682->regmap, RT5682_PWR_DIG_1, 0x0000);
regmap_write(rt5682->regmap, RT5682_CHOP_DAC, 0x2000);
regmap_write(rt5682->regmap, RT5682_CALIB_ADC_CTRL, 0x2005);
regmap_write(rt5682->regmap, RT5682_STO1_ADC_MIXER, 0xc0c4);
regmap_write(rt5682->regmap, RT5682_CAL_REC, 0x0c0c);
mutex_unlock(&rt5682->calibrate_mutex);
}