MIPS: Remove useless parentheses

Based on the spatch

@@
expression e;
@@
- return (e);
+ return e;

with heavy hand editing because some of the changes are either whitespace
or identation only or result in excessivly long lines.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2014-10-21 14:12:49 +02:00
parent 5d01410fe4
commit 635c990706
18 changed files with 42 additions and 46 deletions

View File

@ -263,7 +263,7 @@ static unsigned int detect_memory_size(void)
if (BCMCPU_IS_6345()) {
val = bcm_sdram_readl(SDRAM_MBASE_REG);
return (val * 8 * 1024 * 1024);
return val * 8 * 1024 * 1024;
}
if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {

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@ -140,7 +140,7 @@ static inline unsigned long cpu_get_fpu_id(void)
*/
static inline int __cpu_has_fpu(void)
{
return ((cpu_get_fpu_id() & FPIR_IMP_MASK) != FPIR_IMP_NONE);
return (cpu_get_fpu_id() & FPIR_IMP_MASK) != FPIR_IMP_NONE;
}
static inline unsigned long cpu_get_msa_id(void)

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@ -98,7 +98,7 @@ unsigned int gic_get_timer_pending(void)
GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), 0);
GICREAD(GIC_REG(VPE_OTHER, GIC_VPE_PEND), vpe_pending);
return (vpe_pending & GIC_VPE_PEND_TIMER_MSK);
return vpe_pending & GIC_VPE_PEND_TIMER_MSK;
}
void gic_bind_eic_interrupt(int irq, int set)

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@ -187,21 +187,21 @@ static inline int is_ra_save_ins(union mips_instruction *ip)
*/
if (mm_insn_16bit(ip->halfword[0])) {
mmi.word = (ip->halfword[0] << 16);
return ((mmi.mm16_r5_format.opcode == mm_swsp16_op &&
mmi.mm16_r5_format.rt == 31) ||
(mmi.mm16_m_format.opcode == mm_pool16c_op &&
mmi.mm16_m_format.func == mm_swm16_op));
return (mmi.mm16_r5_format.opcode == mm_swsp16_op &&
mmi.mm16_r5_format.rt == 31) ||
(mmi.mm16_m_format.opcode == mm_pool16c_op &&
mmi.mm16_m_format.func == mm_swm16_op);
}
else {
mmi.halfword[0] = ip->halfword[1];
mmi.halfword[1] = ip->halfword[0];
return ((mmi.mm_m_format.opcode == mm_pool32b_op &&
mmi.mm_m_format.rd > 9 &&
mmi.mm_m_format.base == 29 &&
mmi.mm_m_format.func == mm_swm32_func) ||
(mmi.i_format.opcode == mm_sw32_op &&
mmi.i_format.rs == 29 &&
mmi.i_format.rt == 31));
return (mmi.mm_m_format.opcode == mm_pool32b_op &&
mmi.mm_m_format.rd > 9 &&
mmi.mm_m_format.base == 29 &&
mmi.mm_m_format.func == mm_swm32_func) ||
(mmi.i_format.opcode == mm_sw32_op &&
mmi.i_format.rs == 29 &&
mmi.i_format.rt == 31);
}
#else
/* sw / sd $ra, offset($sp) */
@ -233,7 +233,7 @@ static inline int is_jump_ins(union mips_instruction *ip)
if (ip->r_format.opcode != mm_pool32a_op ||
ip->r_format.func != mm_pool32axf_op)
return 0;
return (((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op);
return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
#else
if (ip->j_format.opcode == j_op)
return 1;
@ -260,13 +260,13 @@ static inline int is_sp_move_ins(union mips_instruction *ip)
union mips_instruction mmi;
mmi.word = (ip->halfword[0] << 16);
return ((mmi.mm16_r3_format.opcode == mm_pool16d_op &&
mmi.mm16_r3_format.simmediate && mm_addiusp_func) ||
(mmi.mm16_r5_format.opcode == mm_pool16d_op &&
mmi.mm16_r5_format.rt == 29));
return (mmi.mm16_r3_format.opcode == mm_pool16d_op &&
mmi.mm16_r3_format.simmediate && mm_addiusp_func) ||
(mmi.mm16_r5_format.opcode == mm_pool16d_op &&
mmi.mm16_r5_format.rt == 29);
}
return (ip->mm_i_format.opcode == mm_addiu32_op &&
ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29);
return ip->mm_i_format.opcode == mm_addiu32_op &&
ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29;
#else
/* addiu/daddiu sp,sp,-imm */
if (ip->i_format.rs != 29 || ip->i_format.rt != 29)

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@ -37,7 +37,7 @@ int gpio_get_value(unsigned gpio)
val = LOONGSON_GPIODATA;
spin_unlock(&gpio_lock);
return ((val & mask) != 0);
return (val & mask) != 0;
}
EXPORT_SYMBOL(gpio_get_value);

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@ -38,7 +38,7 @@ int ieee754dp_isnan(union ieee754dp x)
static inline int ieee754dp_issnan(union ieee754dp x)
{
assert(ieee754dp_isnan(x));
return ((DPMANT(x) & DP_MBIT(DP_FBITS-1)) == DP_MBIT(DP_FBITS-1));
return (DPMANT(x) & DP_MBIT(DP_FBITS - 1)) == DP_MBIT(DP_FBITS - 1);
}

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@ -38,7 +38,7 @@ int ieee754sp_isnan(union ieee754sp x)
static inline int ieee754sp_issnan(union ieee754sp x)
{
assert(ieee754sp_isnan(x));
return (SPMANT(x) & SP_MBIT(SP_FBITS-1));
return SPMANT(x) & SP_MBIT(SP_FBITS - 1);
}

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@ -81,7 +81,7 @@ static inline int __init r5k_sc_probe(void)
unsigned long config = read_c0_config();
if (config & CONF_SC)
return(0);
return 0;
scache_size = (512 * 1024) << ((config & R5K_CONF_SS) >> 20);

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@ -469,7 +469,7 @@ static int bcm63xx_pcie_can_access(struct pci_bus *bus, int devfn)
{
switch (bus->number) {
case PCIE_BUS_BRIDGE:
return (PCI_SLOT(devfn) == 0);
return PCI_SLOT(devfn) == 0;
case PCIE_BUS_DEVICE:
if (PCI_SLOT(devfn) == 0)
return bcm_pcie_readl(PCIE_DLSTATUS_REG)

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@ -295,7 +295,7 @@ char *prom_getenv(char *env_name)
while (*var) {
if (strncmp(env_name, *var, i) == 0) {
return (*var + strlen(env_name) + 1);
return *var + strlen(env_name) + 1;
}
var++;
}

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@ -79,7 +79,7 @@ static inline void rb532_set_bit(unsigned bitval,
*/
static inline int rb532_get_bit(unsigned offset, void __iomem *ioaddr)
{
return (readl(ioaddr) & (1 << offset));
return readl(ioaddr) & (1 << offset);
}
/*

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@ -24,14 +24,12 @@ EXPORT_SYMBOL(sgimc);
static inline unsigned long get_bank_addr(unsigned int memconfig)
{
return ((memconfig & SGIMC_MCONFIG_BASEADDR) <<
((sgimc->systemid & SGIMC_SYSID_MASKREV) >= 5 ? 24 : 22));
return (memconfig & SGIMC_MCONFIG_BASEADDR) << ((sgimc->systemid & SGIMC_SYSID_MASKREV) >= 5 ? 24 : 22);
}
static inline unsigned long get_bank_size(unsigned int memconfig)
{
return ((memconfig & SGIMC_MCONFIG_RMASK) + 0x0100) <<
((sgimc->systemid & SGIMC_SYSID_MASKREV) >= 5 ? 16 : 14);
return ((memconfig & SGIMC_MCONFIG_RMASK) + 0x0100) << ((sgimc->systemid & SGIMC_SYSID_MASKREV) >= 5 ? 16 : 14);
}
static inline unsigned int get_bank_config(int bank)

View File

@ -338,7 +338,7 @@ static int check_microtlb(u32 hi, u32 lo, unsigned long vaddr)
PHYS_TO_XKSEG_UNCACHED(pte);
a = (a & 0x3f) << 6; /* PFN */
a += vaddr & ((1 << pgsz) - 1);
return (cpu_err_addr == a);
return cpu_err_addr == a;
}
}
}
@ -351,7 +351,7 @@ static int check_vdma_memaddr(void)
u32 a = sgimc->maddronly;
if (!(sgimc->dma_ctrl & 0x100)) /* Xlate-bit clear ? */
return (cpu_err_addr == a);
return cpu_err_addr == a;
if (check_microtlb(sgimc->dtlb_hi0, sgimc->dtlb_lo0, a) ||
check_microtlb(sgimc->dtlb_hi1, sgimc->dtlb_lo1, a) ||
@ -367,7 +367,7 @@ static int check_vdma_gioaddr(void)
if (gio_err_stat & GIO_ERRMASK) {
u32 a = sgimc->gio_dma_trans;
a = (sgimc->gmaddronly & ~a) | (sgimc->gio_dma_sbits & a);
return (gio_err_addr == a);
return gio_err_addr == a;
}
return 0;
}

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@ -125,8 +125,7 @@ unsigned long node_getfirstfree(cnodeid_t cnode)
#endif
offset = PAGE_ALIGN((unsigned long)(&_end)) - loadbase;
if ((cnode == 0) || (cpu_isset(cnode, ktext_repmask)))
return (TO_NODE(nasid, offset) >> PAGE_SHIFT);
return TO_NODE(nasid, offset) >> PAGE_SHIFT;
else
return (KDM_TO_PHYS(PAGE_ALIGN(SYMMON_STK_ADDR(nasid, 0))) >>
PAGE_SHIFT);
return KDM_TO_PHYS(PAGE_ALIGN(SYMMON_STK_ADDR(nasid, 0))) >> PAGE_SHIFT;
}

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@ -42,8 +42,7 @@ static int fine_mode;
static int is_fine_dirmode(void)
{
return (((LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_REGIONSIZE_MASK)
>> NSRI_REGIONSIZE_SHFT) & REGIONSIZE_FINE);
return ((LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_REGIONSIZE_MASK) >> NSRI_REGIONSIZE_SHFT) & REGIONSIZE_FINE;
}
static hubreg_t get_region(cnodeid_t cnode)
@ -288,7 +287,7 @@ static unsigned long __init slot_psize_compute(cnodeid_t node, int slot)
if (size <= 128) {
if (slot % 4 == 0) {
size <<= 20; /* size in bytes */
return(size >> PAGE_SHIFT);
return size >> PAGE_SHIFT;
} else
return 0;
} else {

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@ -109,7 +109,7 @@ static int m41t81_read(uint8_t addr)
return -1;
}
return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff);
return __raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff;
}
static int m41t81_write(uint8_t addr, int b)
@ -229,5 +229,5 @@ int m41t81_probe(void)
tmp = m41t81_read(M41T81REG_SC);
m41t81_write(M41T81REG_SC, tmp & 0x7f);
return (m41t81_read(M41T81REG_SC) != -1);
return m41t81_read(M41T81REG_SC) != -1;
}

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@ -84,7 +84,7 @@ static int xicor_read(uint8_t addr)
return -1;
}
return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff);
return __raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff;
}
static int xicor_write(uint8_t addr, int b)
@ -206,5 +206,5 @@ unsigned long xicor_get_time(void)
int xicor_probe(void)
{
return (xicor_read(X1241REG_SC) != -1);
return xicor_read(X1241REG_SC) != -1;
}

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@ -76,7 +76,7 @@ int swarm_be_handler(struct pt_regs *regs, int is_fixup)
printk("DBE physical address: %010Lx\n",
__read_64bit_c0_register($26, 1));
}
return (is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL);
return is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL;
}
enum swarm_rtc_type {