cpm2: Fix race condition in CPM2 GPIO library.

The CPM2 GPIO library code uses the non thread-safe clrbits32/setbits32
macros. This patch protects them with a spinlock.

Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Laurent Pinchart 2008-08-19 14:20:23 +02:00 committed by Kumar Gala
parent 61a4e9e91d
commit 639d64456e
1 changed files with 36 additions and 21 deletions

View File

@ -254,7 +254,35 @@ static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
return !!(in_be32(&iop->dat) & pin_mask); return !!(in_be32(&iop->dat) & pin_mask);
} }
static void __cpm2_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask,
int value)
{
struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
struct cpm2_ioports __iomem *iop = mm_gc->regs;
if (value)
cpm2_gc->cpdata |= pin_mask;
else
cpm2_gc->cpdata &= ~pin_mask;
out_be32(&iop->dat, cpm2_gc->cpdata);
}
static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value) static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
{
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
unsigned long flags;
u32 pin_mask = 1 << (31 - gpio);
spin_lock_irqsave(&cpm2_gc->lock, flags);
__cpm2_gpio32_set(mm_gc, pin_mask, value);
spin_unlock_irqrestore(&cpm2_gc->lock, flags);
}
static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
{ {
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc); struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
@ -264,27 +292,10 @@ static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
spin_lock_irqsave(&cpm2_gc->lock, flags); spin_lock_irqsave(&cpm2_gc->lock, flags);
if (value) setbits32(&iop->dir, pin_mask);
cpm2_gc->cpdata |= pin_mask; __cpm2_gpio32_set(mm_gc, pin_mask, val);
else
cpm2_gc->cpdata &= ~pin_mask;
out_be32(&iop->dat, cpm2_gc->cpdata);
spin_unlock_irqrestore(&cpm2_gc->lock, flags); spin_unlock_irqrestore(&cpm2_gc->lock, flags);
}
static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
{
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
struct cpm2_ioports __iomem *iop = mm_gc->regs;
u32 pin_mask;
pin_mask = 1 << (31 - gpio);
setbits32(&iop->dir, pin_mask);
cpm2_gpio32_set(gc, gpio, val);
return 0; return 0;
} }
@ -292,13 +303,17 @@ static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio) static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
{ {
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
struct cpm2_ioports __iomem *iop = mm_gc->regs; struct cpm2_ioports __iomem *iop = mm_gc->regs;
u32 pin_mask; unsigned long flags;
u32 pin_mask = 1 << (31 - gpio);
pin_mask = 1 << (31 - gpio); spin_lock_irqsave(&cpm2_gc->lock, flags);
clrbits32(&iop->dir, pin_mask); clrbits32(&iop->dir, pin_mask);
spin_unlock_irqrestore(&cpm2_gc->lock, flags);
return 0; return 0;
} }