diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c index 33b194b0454d..c2894c5b71ea 100644 --- a/arch/sh/boards/board-sh7785lcr.c +++ b/arch/sh/boards/board-sh7785lcr.c @@ -24,6 +24,7 @@ #include #include #include +#include /* * NOTE: This board has 2 physical memory maps. @@ -320,6 +321,26 @@ static void __init sh7785lcr_setup(char **cmdline_p) writel(0x000307c2, sm501_reg); } +/* Return the board specific boot mode pin configuration */ +static int sh7785lcr_mode_pins(void) +{ + int value = 0; + + /* These are the factory default settings of S1 and S2. + * If you change these dip switches then you will need to + * adjust the values below as well. + */ + value |= 1 << MODE_PIN_MODE4; /* Clock Mode 16 */ + value |= 1 << MODE_PIN_MODE5; /* 32-bit Area0 bus width */ + value |= 1 << MODE_PIN_MODE6; /* 32-bit Area0 bus width */ + value |= 1 << MODE_PIN_MODE7; /* Area 0 SRAM interface [fixed] */ + value |= 1 << MODE_PIN_MODE8; /* Little Endian */ + value |= 1 << MODE_PIN_MODE9; /* Master Mode */ + value |= 1 << MODE_PIN_MODE14; /* No PLL step-up */ + + return value; +} + /* * The Machine Vector */ @@ -328,5 +349,6 @@ static struct sh_machine_vector mv_sh7785lcr __initmv = { .mv_setup = sh7785lcr_setup, .mv_clk_init = sh7785lcr_clk_init, .mv_init_irq = init_sh7785lcr_IRQ, + .mv_mode_pins = sh7785lcr_mode_pins, };