mfd: asic3: add asic3_set_register common operation
Used to configure single bits of the SDHWCTRL_SDCONF and EXTCF_RESET/SELECT registers needed for DS1WM, MMC/SDIO and PCMCIA functionality. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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@ -52,6 +52,21 @@ static inline u32 asic3_read_register(struct asic3 *asic,
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(reg >> asic->bus_shift));
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}
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void asic3_set_register(struct asic3 *asic, u32 reg, u32 bits, bool set)
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{
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unsigned long flags;
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u32 val;
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spin_lock_irqsave(&asic->lock, flags);
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val = asic3_read_register(asic, reg);
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if (set)
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val |= bits;
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else
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val &= ~bits;
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asic3_write_register(asic, reg, val);
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spin_unlock_irqrestore(&asic->lock, flags);
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}
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/* IRQs */
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#define MAX_ASIC_ISR_LOOPS 20
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#define ASIC3_GPIO_BASE_INCR \
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@ -227,8 +227,8 @@ struct asic3_platform_data {
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/* Basic control of the SD ASIC */
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#define ASIC3_SDHWCTRL_Base 0x0E00
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#define ASIC3_SDHWCTRL_SDConf 0x00
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#define ASIC3_SDHWCTRL_BASE 0x0E00
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#define ASIC3_SDHWCTRL_SDCONF 0x00
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#define ASIC3_SDHWCTRL_SUSPEND (1 << 0) /* 1=suspend all SD operations */
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#define ASIC3_SDHWCTRL_CLKSEL (1 << 1) /* 1=SDICK, 0=HCLK */
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@ -242,10 +242,10 @@ struct asic3_platform_data {
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/* SD card power supply ctrl 1=enable */
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#define ASIC3_SDHWCTRL_SDPWR (1 << 6)
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#define ASIC3_EXTCF_Base 0x1100
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#define ASIC3_EXTCF_BASE 0x1100
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#define ASIC3_EXTCF_Select 0x00
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#define ASIC3_EXTCF_Reset 0x04
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#define ASIC3_EXTCF_SELECT 0x00
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#define ASIC3_EXTCF_RESET 0x04
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#define ASIC3_EXTCF_SMOD0 (1 << 0) /* slot number of mode 0 */
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#define ASIC3_EXTCF_SMOD1 (1 << 1) /* slot number of mode 1 */
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