From fcfbb6f144065f301f60555e5475434f2956eeb8 Mon Sep 17 00:00:00 2001 From: Chris Paterson Date: Thu, 8 Jun 2017 11:08:14 +0100 Subject: [PATCH 1/5] ARM: debug-ll: Add support for r8a7743 Enable low-level debugging support for RZ/G1M (r8a7743). RZ/G1M uses SCIF0 for the debug console, like most of the R-Car Gen2 SoCs. Signed-off-by: Chris Paterson Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/Kconfig.debug | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 447629d89884..003502eb5642 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -896,12 +896,13 @@ choice via SCIF2 on Renesas R-Car H1 (R8A7779). config DEBUG_RCAR_GEN2_SCIF0 - bool "Kernel low-level debugging messages via SCIF0 on R8A7790/R8A7791/R8A7792/R8A7793" - depends on ARCH_R8A7790 || ARCH_R8A7791 || ARCH_R8A7792 || ARCH_R8A7793 + bool "Kernel low-level debugging messages via SCIF0 on R-Car Gen2 and RZ/G1" + depends on ARCH_R8A7743 || ARCH_R8A7790 || ARCH_R8A7791 || \ + ARCH_R8A7792 || ARCH_R8A7793 help Say Y here if you want kernel low-level debugging support - via SCIF0 on Renesas R-Car H2 (R8A7790), M2-W (R8A7791), V2H - (R8A7792), or M2-N (R8A7793). + via SCIF0 on Renesas RZ/G1M (R8A7743), R-Car H2 (R8A7790), + M2-W (R8A7791), V2H (R8A7792), or M2-N (R8A7793). config DEBUG_RCAR_GEN2_SCIF2 bool "Kernel low-level debugging messages via SCIF2 on R8A7794" From 816756962b15f469d467b09beeb702af015c55cc Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 4 Jul 2017 17:41:36 +0200 Subject: [PATCH 2/5] ARM: shmobile: rcar-gen2: Obtain jump stub region from DT Add support for obtaining from DT the SRAM region to store the jump stub for CPU core bringup, according to the renesas,smp-sram DT bindings. If no region is specified in DT, the code falls back to hardcoded ICRAM1 as before, to maintain backwards compatibility. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/pm-rcar-gen2.c | 33 ++++++++++++++++++++++++--- 1 file changed, 30 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c b/arch/arm/mach-shmobile/pm-rcar-gen2.c index 0178da7ace82..e5f215c8b218 100644 --- a/arch/arm/mach-shmobile/pm-rcar-gen2.c +++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c @@ -11,7 +11,9 @@ */ #include +#include #include +#include #include #include #include @@ -69,8 +71,9 @@ void __init rcar_gen2_pm_init(void) struct device_node *np, *cpus; bool has_a7 = false; bool has_a15 = false; - phys_addr_t boot_vector_addr = ICRAM1; + struct resource res; u32 syscier = 0; + int error; if (once++) return; @@ -91,14 +94,38 @@ void __init rcar_gen2_pm_init(void) else if (of_machine_is_compatible("renesas,r8a7791")) syscier = 0x00111003; + np = of_find_compatible_node(NULL, NULL, "renesas,smp-sram"); + if (!np) { + /* No smp-sram in DT, fall back to hardcoded address */ + res = (struct resource)DEFINE_RES_MEM(ICRAM1, + shmobile_boot_size); + goto map; + } + + error = of_address_to_resource(np, 0, &res); + if (error) { + pr_err("Failed to get smp-sram address: %d\n", error); + return; + } + +map: /* RAM for jump stub, because BAR requires 256KB aligned address */ - p = ioremap_nocache(boot_vector_addr, shmobile_boot_size); + if (res.start & (256 * 1024 - 1) || + resource_size(&res) < shmobile_boot_size) { + pr_err("Invalid smp-sram region\n"); + return; + } + + p = ioremap(res.start, resource_size(&res)); + if (!p) + return; + memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size); iounmap(p); /* setup reset vectors */ p = ioremap_nocache(RST, 0x63); - bar = phys_to_sbar(boot_vector_addr); + bar = phys_to_sbar(res.start); if (has_a15) { writel_relaxed(bar, p + CA15BAR); writel_relaxed(bar | SBAR_BAREN, p + CA15BAR); From cdcdfaad8a25f53a5bb01c04e1eff33e453dab30 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 12 Jul 2017 12:39:32 +0200 Subject: [PATCH 3/5] ARM: shmobile: rcar-gen2: Add support for CPG/MSSR bindings When using the new CPG/MSSR bindings, there is no longer a "renesas,rcar-gen2-cpg-clocks" node, and the code to obtain the external clock crystal frequency falls back to a default of 20 MHz. While this is correct for all upstream R-Car Gen2 and RZ/G1 boards, this is not necessarily the case for out-of-tree third party boards. Add support for finding the external clock crystal oscillator on RZ/G1M, and on R-Car H2, M2-W, and M2-N using the new CPG/MSSR bindings, through the corresponding "renesas,r8a77xx-cpg-mssr" nodes. Note that this is not needed on R-Car V2H and E2, and on RZ/G1E, as on those SoCs the arch_timer and generic counter clock is derived from the ZS clock instead. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-rcar-gen2.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index a6e74f481dea..3bd505da3172 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -29,17 +29,29 @@ #include "common.h" #include "rcar-gen2.h" +static const struct of_device_id cpg_matches[] __initconst = { + { .compatible = "renesas,rcar-gen2-cpg-clocks", }, + { .compatible = "renesas,r8a7743-cpg-mssr", .data = "extal" }, + { .compatible = "renesas,r8a7790-cpg-mssr", .data = "extal" }, + { .compatible = "renesas,r8a7791-cpg-mssr", .data = "extal" }, + { .compatible = "renesas,r8a7793-cpg-mssr", .data = "extal" }, + { /* sentinel */ } +}; + static unsigned int __init get_extal_freq(void) { + const struct of_device_id *match; struct device_node *cpg, *extal; u32 freq = 20000000; + int idx = 0; - cpg = of_find_compatible_node(NULL, NULL, - "renesas,rcar-gen2-cpg-clocks"); + cpg = of_find_matching_node_and_match(NULL, cpg_matches, &match); if (!cpg) return freq; - extal = of_parse_phandle(cpg, "clocks", 0); + if (match->data) + idx = of_property_match_string(cpg, "clock-names", match->data); + extal = of_parse_phandle(cpg, "clocks", idx); of_node_put(cpg); if (!extal) return freq; From cd66fa4e0203fed9d8af6e1596ff8a68ede7fb1d Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 18 Jul 2017 15:30:15 +0200 Subject: [PATCH 4/5] ARM: shmobile: rcar-gen2: Correct arch timer frequency on RZ/G1E According to the datasheet, the frequency of the ARM architecture timer on RZ/G1E depends on the frequency of the ZS clock, just like on R-Car E2 and V2H. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-rcar-gen2.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index 3bd505da3172..7ab1690fab82 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -70,7 +70,8 @@ void __init rcar_gen2_timer_init(void) void __iomem *base; u32 freq; - if (of_machine_is_compatible("renesas,r8a7792") || + if (of_machine_is_compatible("renesas,r8a7745") || + of_machine_is_compatible("renesas,r8a7792") || of_machine_is_compatible("renesas,r8a7794")) { freq = 260000000 / 8; /* ZS / 8 */ /* CNTVOFF has to be initialized either from non-secure From 84a1e84b95bb7b2596821578c3acc38d4e6e7a59 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 17 Jul 2017 15:24:28 +0200 Subject: [PATCH 5/5] ARM: shmobile: Remove ARCH_SHMOBILE_MULTI The migration from ARCH_SHMOBILE_MULTI to ARCH_RENESAS has been completed in v4.12 by commit 9ed2d4bc5c0c244d ("ARM: dts: renesas: Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS"), so the ARCH_SHMOBILE_MULTI symbol can be removed. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Kconfig | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index ad7d604ff001..280e7312a9e1 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -1,9 +1,6 @@ config ARCH_SHMOBILE bool -config ARCH_SHMOBILE_MULTI - bool - config PM_RMOBILE bool select PM @@ -34,7 +31,6 @@ menuconfig ARCH_RENESAS depends on ARCH_MULTI_V7 && MMU select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE select ARCH_SHMOBILE - select ARCH_SHMOBILE_MULTI select ARM_GIC select GPIOLIB select HAVE_ARM_SCU if SMP