ARM: SoC device tree updates for 5.1
This is a smaller update than the past few times, but with just over
500 non-merge changesets still dwarfes the rest of the SoC tree.
Three new SoC platforms get added, each one a follow-up to an existing
product, and added here in combination with a reference platform:
- Renesas RZ/A2M (R7S9210) 32-bit Cortex-A9 Real-time imaging processor
https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rza/rza2m.html
- Renesas RZ/G2E (r8a774c0) 64-bit Cortex-A53 SoC "for
Rich Graphics Applications".
https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rzg/rzg2e.html
- NXP i.MX8QuadXPlus 64-bit Cortex-A35 SoC
https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-8-processors/i.mx-8x-family-arm-cortex-a35-3d-graphics-4k-video-dsp-error-correcting-code-on-ddr:i.MX8X
These are actual commercial products we now support with an in-kernel
device tree source file:
- Bosch Guardian is a product made by Bosch Power
Tools GmbH, based on the Texas Instruments AM335x chip
- Winterland IceBoard is a Texas Instruments AM3874 based
machine used in telescopes at the south pole and elsewhere, see commit
d031773169 for some pointers:
- Inspur on5263m5 is an x86 server platform with an Aspeed
ast2500 baseboard management controller. This is for running on
the BMC.
- Zodiac Digital Tapping Unit, apparently a kind of ethernet
switch used in airplanes.
- Phicomm K3 is a WiFi router based on Broadcom bcm47094
- Methode Electronics uDPU FTTdp distribution point unit
- X96 Max, a generic TV box based on Amlogic G12a (S905X2)
- NVIDIA Shield TV (Darcy) based on Tegra210
And then there are several new SBC, evaluation, development or modular
systems that we add:
- Three new Rockchips rk3399 based boards:
- FriendlyElec NanoPC-T4 and NanoPi M4
- Radxa ROCK Pi 4
- Five new i.MX6 family SoM modules and boards for industrial
products:
- Logic PD i.MX6QD SoM and evaluation baseboad
- Y Soft IOTA Draco/Hydra/Ursa family boards based on i.MX6DL
- Phytec phyCORE i.MX6 UltraLite SoM and evaluation module
- MYIR Tech MYD-LPC4357 development based on the NXP lpc4357
microcontroller
- Chameleon96, an Intel/Altera Cyclone5 based FPGA development
system in 96boards form factor
- Arm Fixed Virtual Platforms(FVP) Base RevC, a purely
virtual platform for corresponding to the latest "fast model"
- Another Raspberry Pi variant: Model 3 A+, supported both
in 32-bit and 64-bit mode.
- Oxalis Evalkit V100 based on NXP Layerscape LS1012a,
in 96Boards enterprise form factor
- Elgin RV1108 R1 development board based on 32-bit Rockchips RV1108
For already supported boards and SoCs, we often add support for new
devices after merging the drivers. This time, the largest changes include
updates for
- STMicroelectronics stm32mp1, which was now formally
launched last week
- Qualcomm Snapdragon 845, a high-end phone and low-end laptop chip
- Action Semi S700
- TI AM654x, their recently merged 64-bit SoC from the OMAP family
- Various Amlogic Meson SoCs
- Mediatek MT2712
- NVIDIA Tegra186 and Tegra210
- The ancient NXP lpc32xx family
- Samsung s5pv210, used in some older mobile phones
Many other chips see smaller updates and bugfixes beyond that.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC device tree updates from Arnd Bergmann:
"This is a smaller update than the past few times, but with just over
500 non-merge changesets still dwarfes the rest of the SoC tree.
Three new SoC platforms get added, each one a follow-up to an existing
product, and added here in combination with a reference platform:
- Renesas RZ/A2M (R7S9210) 32-bit Cortex-A9 Real-time imaging
processor:
https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rza/rza2m.html
- Renesas RZ/G2E (r8a774c0) 64-bit Cortex-A53 SoC "for Rich Graphics
Applications":
https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rzg/rzg2e.html
- NXP i.MX8QuadXPlus 64-bit Cortex-A35 SoC:
https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-8-processors/i.mx-8x-family-arm-cortex-a35-3d-graphics-4k-video-dsp-error-correcting-code-on-ddr:i.MX8X
These are actual commercial products we now support with an in-kernel
device tree source file:
- Bosch Guardian is a product made by Bosch Power Tools GmbH, based
on the Texas Instruments AM335x chip
- Winterland IceBoard is a Texas Instruments AM3874 based machine
used in telescopes at the south pole and elsewhere, see commit
d031773169 for some pointers:
- Inspur on5263m5 is an x86 server platform with an Aspeed ast2500
baseboard management controller. This is for running on the BMC.
- Zodiac Digital Tapping Unit, apparently a kind of ethernet switch
used in airplanes.
- Phicomm K3 is a WiFi router based on Broadcom bcm47094
- Methode Electronics uDPU FTTdp distribution point unit
- X96 Max, a generic TV box based on Amlogic G12a (S905X2)
- NVIDIA Shield TV (Darcy) based on Tegra210
And then there are several new SBC, evaluation, development or modular
systems that we add:
- Three new Rockchips rk3399 based boards:
- FriendlyElec NanoPC-T4 and NanoPi M4
- Radxa ROCK Pi 4
- Five new i.MX6 family SoM modules and boards for industrial
products:
- Logic PD i.MX6QD SoM and evaluation baseboad
- Y Soft IOTA Draco/Hydra/Ursa family boards based on i.MX6DL
- Phytec phyCORE i.MX6 UltraLite SoM and evaluation module
- MYIR Tech MYD-LPC4357 development based on the NXP lpc4357
microcontroller
- Chameleon96, an Intel/Altera Cyclone5 based FPGA development system
in 96boards form factor
- Arm Fixed Virtual Platforms(FVP) Base RevC, a purely virtual
platform for corresponding to the latest "fast model"
- Another Raspberry Pi variant: Model 3 A+, supported both in 32-bit
and 64-bit mode.
- Oxalis Evalkit V100 based on NXP Layerscape LS1012a, in 96Boards
enterprise form factor
- Elgin RV1108 R1 development board based on 32-bit Rockchips RV1108
For already supported boards and SoCs, we often add support for new
devices after merging the drivers. This time, the largest changes
include updates for
- STMicroelectronics stm32mp1, which was now formally launched last
week
- Qualcomm Snapdragon 845, a high-end phone and low-end laptop chip
- Action Semi S700
- TI AM654x, their recently merged 64-bit SoC from the OMAP family
- Various Amlogic Meson SoCs
- Mediatek MT2712
- NVIDIA Tegra186 and Tegra210
- The ancient NXP lpc32xx family
- Samsung s5pv210, used in some older mobile phones
Many other chips see smaller updates and bugfixes beyond that"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (506 commits)
ARM: dts: exynos: Fix max voltage for buck8 regulator on Odroid XU3/XU4
dt-bindings: net: ti: deprecate cpsw-phy-sel bindings
ARM: dts: am335x: switch to use phy-gmii-sel
ARM: dts: am4372: switch to use phy-gmii-sel
ARM: dts: dm814x: switch to use phy-gmii-sel
ARM: dts: dra7: switch to use phy-gmii-sel
arch: arm: dts: kirkwood-rd88f6281: Remove disabled marvell,dsa reference
ARM: dts: exynos: Add support for secondary DAI to Odroid XU4
ARM: dts: exynos: Add support for secondary DAI to Odroid XU3
ARM: dts: exynos: Disable ARM PMU on Odroid XU3-lite
ARM: dts: exynos: Add stdout path property to Arndale board
ARM: dts: exynos: Add minimal clkout parameters to Exynos3250 PMU
ARM: dts: exynos: Enable ADC on Odroid HC1
arm64: dts: sprd: Remove wildcard compatible string
arm64: dts: sprd: Add SC27XX fuel gauge device
arm64: dts: sprd: Add SC2731 charger device
arm64: dts: sprd: Add ADC calibration support
arm64: dts: sprd: Remove PMIC INTC irq trigger type
arm64: dts: rockchip: Enable tsadc device on rock960
ARM: dts: rockchip: add chosen node on veyron devices
...
This commit is contained in:
Linus Torvalds
commit
6ad63dec9c
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@ -109,6 +109,7 @@ Board compatible values (alphabetically, grouped by SoC):
|
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- "amlogic,s400" (Meson axg a113d)
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||||
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- "amlogic,u200" (Meson g12a s905d2)
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- "amediatech,x96-max" (Meson g12a s905x2)
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Amlogic Meson Firmware registers Interface
|
||||
------------------------------------------
|
||||
|
|
|
|||
|
|
@ -1,6 +0,0 @@
|
|||
Armadeus i.MX Platforms Device Tree Bindings
|
||||
-----------------------------------------------
|
||||
|
||||
APF51: i.MX51 based module.
|
||||
Required root node properties:
|
||||
- compatible = "armadeus,imx51-apf51", "fsl,imx51";
|
||||
|
|
@ -30,6 +30,10 @@ Raspberry Pi 2 Model B
|
|||
Required root node properties:
|
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compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
|
||||
|
||||
Raspberry Pi 3 Model A+
|
||||
Required root node properties:
|
||||
compatible = "raspberrypi,3-model-a-plus", "brcm,bcm2837";
|
||||
|
||||
Raspberry Pi 3 Model B
|
||||
Required root node properties:
|
||||
compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
|
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|
|
|
|||
|
|
@ -1,6 +0,0 @@
|
|||
Beckhoff Automation Platforms Device Tree Bindings
|
||||
--------------------------------------------------
|
||||
|
||||
CX9020 Embedded PC
|
||||
Required root node properties:
|
||||
- compatible = "bhf,cx9020", "fsl,imx53";
|
||||
|
|
@ -1,25 +0,0 @@
|
|||
CompuLab SB-SOM is a multi-module baseboard capable of carrying:
|
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- CM-T43
|
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- CM-T54
|
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- CM-QS600
|
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- CL-SOM-AM57x
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- CL-SOM-iMX7
|
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modules with minor modifications to the SB-SOM assembly.
|
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|
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Required root node properties:
|
||||
- compatible = should be "compulab,sb-som"
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||||
|
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Compulab CL-SOM-iMX7 is a miniature System-on-Module (SoM) based on
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Freescale i.MX7 ARM Cortex-A7 System-on-Chip.
|
||||
|
||||
Required root node properties:
|
||||
- compatible = "compulab,cl-som-imx7", "fsl,imx7d";
|
||||
|
||||
Compulab SBC-iMX7 is a single board computer based on the
|
||||
Freescale i.MX7 system-on-chip. SBC-iMX7 is implemented with
|
||||
the CL-SOM-iMX7 System-on-Module providing most of the functions,
|
||||
and SB-SOM-iMX7 carrier board providing additional peripheral
|
||||
functions and connectors.
|
||||
|
||||
Required root node properties:
|
||||
- compatible = "compulab,sbc-imx7", "compulab,cl-som-imx7", "fsl,imx7d";
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
Freescale i.MX7ULP System Integration Module
|
||||
----------------------------------------------
|
||||
The system integration module (SIM) provides system control and chip configuration
|
||||
registers. In this module, chip revision information is located in JTAG ID register,
|
||||
and a set of registers have been made available in DGO domain for SW use, with the
|
||||
objective to maintain its value between system resets.
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "fsl,imx7ulp-sim".
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- reg: Specifies base physical address and size of the register sets.
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||||
|
||||
Example:
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sim: sim@410a3000 {
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compatible = "fsl,imx7ulp-sim", "syscon";
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reg = <0x410a3000 0x1000>;
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};
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||||
|
|
@ -70,7 +70,10 @@ Clock bindings based on SCU Message Protocol
|
|||
This binding uses the common clock binding[1].
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "fsl,imx8qxp-clock".
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- compatible: Should be one of:
|
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"fsl,imx8qm-clock"
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"fsl,imx8qxp-clock"
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followed by "fsl,scu-clk"
|
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- #clock-cells: Should be 1. Contains the Clock ID value.
|
||||
- clocks: List of clock specifiers, must contain an entry for
|
||||
each required entry in clock-names
|
||||
|
|
@ -137,7 +140,7 @@ firmware {
|
|||
&lsio_mu1 1 3>;
|
||||
|
||||
clk: clk {
|
||||
compatible = "fsl,imx8qxp-clk";
|
||||
compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,237 +0,0 @@
|
|||
Freescale i.MX Platforms Device Tree Bindings
|
||||
-----------------------------------------------
|
||||
|
||||
i.MX23 Evaluation Kit
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx23-evk", "fsl,imx23";
|
||||
|
||||
i.MX25 Product Development Kit
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx25-pdk", "fsl,imx25";
|
||||
|
||||
i.MX27 Product Development Kit
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx27-pdk", "fsl,imx27";
|
||||
|
||||
i.MX28 Evaluation Kit
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx28-evk", "fsl,imx28";
|
||||
|
||||
i.MX51 Babbage Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx51-babbage", "fsl,imx51";
|
||||
|
||||
i.MX53 Automotive Reference Design Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx53-ard", "fsl,imx53";
|
||||
|
||||
i.MX53 Evaluation Kit
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx53-evk", "fsl,imx53";
|
||||
|
||||
i.MX53 Quick Start Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx53-qsb", "fsl,imx53";
|
||||
|
||||
i.MX53 Smart Mobile Reference Design Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx53-smd", "fsl,imx53";
|
||||
|
||||
i.MX6 Quad Armadillo2 Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx6q-arm2", "fsl,imx6q";
|
||||
|
||||
i.MX6 Quad SABRE Lite Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
|
||||
|
||||
i.MX6 Quad SABRE Smart Device Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
|
||||
|
||||
i.MX6 Quad SABRE Automotive Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
|
||||
|
||||
i.MX6SLL EVK board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx6sll-evk", "fsl,imx6sll";
|
||||
|
||||
i.MX6 Quad Plus SABRE Smart Device Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx6qp-sabresd", "fsl,imx6qp";
|
||||
|
||||
i.MX6 Quad Plus SABRE Automotive Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx6qp-sabreauto", "fsl,imx6qp";
|
||||
|
||||
i.MX6 DualLite SABRE Smart Device Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl";
|
||||
|
||||
i.MX6 DualLite/Solo SABRE Automotive Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx6dl-sabreauto", "fsl,imx6dl";
|
||||
|
||||
i.MX6 SoloLite EVK Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
|
||||
|
||||
i.MX6 UltraLite 14x14 EVK Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx6ul-14x14-evk", "fsl,imx6ul";
|
||||
|
||||
i.MX6 UltraLiteLite 14x14 EVK Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull";
|
||||
|
||||
i.MX6 ULZ 14x14 EVK Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx6ulz-14x14-evk", "fsl,imx6ull", "fsl,imx6ulz";
|
||||
|
||||
i.MX6 SoloX SDB Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
|
||||
|
||||
i.MX6 SoloX Sabre Auto Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx";
|
||||
|
||||
i.MX7 SabreSD Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx7d-sdb", "fsl,imx7d";
|
||||
|
||||
i.MX7ULP Evaluation Kit
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx7ulp-evk", "fsl,imx7ulp";
|
||||
|
||||
Generic i.MX boards
|
||||
-------------------
|
||||
|
||||
No iomux setup is done for these boards, so this must have been configured
|
||||
by the bootloader for boards to work with the generic bindings.
|
||||
|
||||
i.MX27 generic board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx27";
|
||||
|
||||
i.MX51 generic board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx51";
|
||||
|
||||
i.MX53 generic board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx53";
|
||||
|
||||
i.MX6q generic board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx6q";
|
||||
|
||||
i.MX7ULP generic board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx7ulp";
|
||||
|
||||
Freescale Vybrid Platform Device Tree Bindings
|
||||
----------------------------------------------
|
||||
|
||||
For the Vybrid SoC familiy all variants with DDR controller are supported,
|
||||
which is the VF5xx and VF6xx series. Out of historical reasons, in most
|
||||
places the kernel uses vf610 to refer to the whole familiy.
|
||||
The compatible string "fsl,vf610m4" is used for the secondary Cortex-M4
|
||||
core support.
|
||||
|
||||
Required root node compatible property (one of them):
|
||||
- compatible = "fsl,vf500";
|
||||
- compatible = "fsl,vf510";
|
||||
- compatible = "fsl,vf600";
|
||||
- compatible = "fsl,vf610";
|
||||
- compatible = "fsl,vf610m4";
|
||||
|
||||
Freescale LS1021A Platform Device Tree Bindings
|
||||
------------------------------------------------
|
||||
|
||||
Required root node compatible properties:
|
||||
- compatible = "fsl,ls1021a";
|
||||
|
||||
Freescale ARMv8 based Layerscape SoC family Device Tree Bindings
|
||||
----------------------------------------------------------------
|
||||
|
||||
LS1012A SoC
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls1012a";
|
||||
|
||||
LS1012A ARMv8 based RDB Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
|
||||
|
||||
LS1012A ARMv8 based FRDM Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
|
||||
|
||||
LS1012A ARMv8 based QDS Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
|
||||
|
||||
LS1043A SoC
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls1043a";
|
||||
|
||||
LS1043A ARMv8 based RDB Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls1043a-rdb", "fsl,ls1043a";
|
||||
|
||||
LS1043A ARMv8 based QDS Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls1043a-qds", "fsl,ls1043a";
|
||||
|
||||
LS1046A SoC
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls1046a";
|
||||
|
||||
LS1046A ARMv8 based QDS Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls1046a-qds", "fsl,ls1046a";
|
||||
|
||||
LS1046A ARMv8 based RDB Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
|
||||
|
||||
LS1088A SoC
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls1088a";
|
||||
|
||||
LS1088A ARMv8 based QDS Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
|
||||
|
||||
LS1088A ARMv8 based RDB Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
|
||||
|
||||
LS2080A SoC
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls2080a";
|
||||
|
||||
LS2080A ARMv8 based Simulator model
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls2080a-simu", "fsl,ls2080a";
|
||||
|
||||
LS2080A ARMv8 based QDS Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls2080a-qds", "fsl,ls2080a";
|
||||
|
||||
LS2080A ARMv8 based RDB Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls2080a-rdb", "fsl,ls2080a";
|
||||
|
||||
LS2088A SoC
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls2088a";
|
||||
|
||||
LS2088A ARMv8 based QDS Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls2088a-qds", "fsl,ls2088a";
|
||||
|
||||
LS2088A ARMv8 based RDB Board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,ls2088a-rdb", "fsl,ls2088a";
|
||||
|
|
@ -0,0 +1,232 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/bindings/arm/fsl.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX Platforms Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Shawn Guo <shawnguo@kernel.org>
|
||||
- Li Yang <leoyang.li@nxp.com>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: i.MX23 based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx23-evk
|
||||
- olimex,imx23-olinuxino
|
||||
- const: fsl,imx23
|
||||
|
||||
- description: i.MX25 Product Development Kit
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx25-pdk
|
||||
- const: fsl,imx25
|
||||
|
||||
- description: i.MX27 Product Development Kit
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx27-pdk
|
||||
- const: fsl,imx27
|
||||
|
||||
- description: i.MX28 based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx28-evk
|
||||
- i2se,duckbill
|
||||
- i2se,duckbill-2
|
||||
- technologic,imx28-ts4600
|
||||
- const: fsl,imx28
|
||||
- description: i.MX28 Duckbill 2 based Boards
|
||||
items:
|
||||
- enum:
|
||||
- i2se,duckbill-2-485
|
||||
- i2se,duckbill-2-enocean
|
||||
- i2se,duckbill-2-spi
|
||||
- const: i2se,duckbill-2
|
||||
- const: fsl,imx28
|
||||
|
||||
- description: i.MX51 Babbage Board
|
||||
items:
|
||||
- enum:
|
||||
- armadeus,imx51-apf51
|
||||
- fsl,imx51-babbage
|
||||
- technologic,imx51-ts4800
|
||||
- const: fsl,imx51
|
||||
|
||||
- description: i.MX53 based Boards
|
||||
items:
|
||||
- enum:
|
||||
- bhf,cx9020
|
||||
- fsl,imx53-ard
|
||||
- fsl,imx53-evk
|
||||
- fsl,imx53-qsb
|
||||
- fsl,imx53-smd
|
||||
- const: fsl,imx53
|
||||
|
||||
- description: i.MX6Q based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx6q-arm2
|
||||
- fsl,imx6q-sabreauto
|
||||
- fsl,imx6q-sabrelite
|
||||
- fsl,imx6q-sabresd
|
||||
- technologic,imx6q-ts4900
|
||||
- technologic,imx6q-ts7970
|
||||
- const: fsl,imx6q
|
||||
|
||||
- description: i.MX6QP based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx6qp-sabreauto # i.MX6 Quad Plus SABRE Automotive Board
|
||||
- fsl,imx6qp-sabresd # i.MX6 Quad Plus SABRE Smart Device Board
|
||||
- const: fsl,imx6qp
|
||||
|
||||
- description: i.MX6DL based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx6dl-sabreauto # i.MX6 DualLite/Solo SABRE Automotive Board
|
||||
- fsl,imx6dl-sabresd # i.MX6 DualLite SABRE Smart Device Board
|
||||
- technologic,imx6dl-ts4900
|
||||
- technologic,imx6dl-ts7970
|
||||
- ysoft,imx6dl-yapp4-draco # i.MX6 DualLite Y Soft IOTA Draco board
|
||||
- ysoft,imx6dl-yapp4-hydra # i.MX6 DualLite Y Soft IOTA Hydra board
|
||||
- ysoft,imx6dl-yapp4-ursa # i.MX6 Solo Y Soft IOTA Ursa board
|
||||
- const: fsl,imx6dl
|
||||
|
||||
- description: i.MX6SL based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx6sl-evk # i.MX6 SoloLite EVK Board
|
||||
- const: fsl,imx6sl
|
||||
|
||||
- description: i.MX6SLL based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx6sll-evk
|
||||
- const: fsl,imx6sll
|
||||
|
||||
- description: i.MX6SX based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx6sx-sabreauto # i.MX6 SoloX Sabre Auto Board
|
||||
- fsl,imx6sx-sdb # i.MX6 SoloX SDB Board
|
||||
- const: fsl,imx6sx
|
||||
|
||||
- description: i.MX6UL based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx6ul-14x14-evk # i.MX6 UltraLite 14x14 EVK Board
|
||||
- const: fsl,imx6ul
|
||||
|
||||
- description: i.MX6ULL based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx6ull-14x14-evk # i.MX6 UltraLiteLite 14x14 EVK Board
|
||||
- const: fsl,imx6ull
|
||||
|
||||
- description: i.MX6ULZ based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx6ulz-14x14-evk # i.MX6 ULZ 14x14 EVK Board
|
||||
- const: fsl,imx6ull # This seems odd. Should be last?
|
||||
- const: fsl,imx6ulz
|
||||
|
||||
- description: i.MX7D based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx7d-sdb # i.MX7 SabreSD Board
|
||||
- const: fsl,imx7d
|
||||
|
||||
- description:
|
||||
Compulab SBC-iMX7 is a single board computer based on the
|
||||
Freescale i.MX7 system-on-chip. SBC-iMX7 is implemented with
|
||||
the CL-SOM-iMX7 System-on-Module providing most of the functions,
|
||||
and SB-SOM-iMX7 carrier board providing additional peripheral
|
||||
functions and connectors.
|
||||
items:
|
||||
- const: compulab,sbc-imx7
|
||||
- const: compulab,cl-som-imx7
|
||||
- const: fsl,imx7d
|
||||
|
||||
- description: i.MX8QXP based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx8qxp-mek # i.MX8QXP MEK Board
|
||||
- const: fsl,imx8qxp
|
||||
|
||||
- description:
|
||||
Freescale Vybrid Platform Device Tree Bindings
|
||||
|
||||
For the Vybrid SoC familiy all variants with DDR controller are supported,
|
||||
which is the VF5xx and VF6xx series. Out of historical reasons, in most
|
||||
places the kernel uses vf610 to refer to the whole familiy.
|
||||
The compatible string "fsl,vf610m4" is used for the secondary Cortex-M4
|
||||
core support.
|
||||
items:
|
||||
- enum:
|
||||
- fsl,vf500
|
||||
- fsl,vf510
|
||||
- fsl,vf600
|
||||
- fsl,vf610
|
||||
- fsl,vf610m4
|
||||
|
||||
- description: LS1012A based Boards
|
||||
items:
|
||||
- enum:
|
||||
- ebs-systart,oxalis
|
||||
- fsl,ls1012a-rdb
|
||||
- fsl,ls1012a-frdm
|
||||
- fsl,ls1012a-qds
|
||||
- const: fsl,ls1012a
|
||||
|
||||
- description: LS1021A based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,ls1021a-moxa-uc-8410a
|
||||
- fsl,ls1021a-qds
|
||||
- fsl,ls1021a-twr
|
||||
- const: fsl,ls1021a
|
||||
|
||||
- description: LS1043A based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,ls1043a-rdb
|
||||
- fsl,ls1043a-qds
|
||||
- const: fsl,ls1043a
|
||||
|
||||
- description: LS1046A based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,ls1046a-qds
|
||||
- fsl,ls1046a-rdb
|
||||
- const: fsl,ls1046a
|
||||
|
||||
- description: LS1088A based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,ls1088a-qds
|
||||
- fsl,ls1088a-rdb
|
||||
- const: fsl,ls1088a
|
||||
|
||||
- description: LS2080A based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,ls2080a-simu
|
||||
- fsl,ls2080a-qds
|
||||
- fsl,ls2080a-rdb
|
||||
- const: fsl,ls2080a
|
||||
|
||||
- description: LS2088A based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,ls2088a-qds
|
||||
- fsl,ls2088a-rdb
|
||||
- const: fsl,ls2088a
|
||||
|
||||
...
|
||||
|
|
@ -1,22 +0,0 @@
|
|||
I2SE Device Tree Bindings
|
||||
-------------------------
|
||||
|
||||
Duckbill Board
|
||||
Required root node properties:
|
||||
- compatible = "i2se,duckbill", "fsl,imx28";
|
||||
|
||||
Duckbill 2 Board
|
||||
Required root node properties:
|
||||
- compatible = "i2se,duckbill-2", "fsl,imx28";
|
||||
|
||||
Duckbill 2 485 Board
|
||||
Required root node properties:
|
||||
- compatible = "i2se,duckbill-2-485", "i2se,duckbill-2", "fsl,imx28";
|
||||
|
||||
Duckbill 2 EnOcean Board
|
||||
Required root node properties:
|
||||
- compatible = "i2se,duckbill-2-enocean", "i2se,duckbill-2", "fsl,imx28";
|
||||
|
||||
Duckbill 2 SPI Board
|
||||
Required root node properties:
|
||||
- compatible = "i2se,duckbill-2-spi", "i2se,duckbill-2", "fsl,imx28";
|
||||
|
|
@ -15,11 +15,12 @@ compatible: Must contain one of
|
|||
"mediatek,mt6795"
|
||||
"mediatek,mt6797"
|
||||
"mediatek,mt7622"
|
||||
"mediatek,mt7623" which is referred to MT7623N SoC
|
||||
"mediatek,mt7623a"
|
||||
"mediatek,mt7623"
|
||||
"mediatek,mt7629"
|
||||
"mediatek,mt8127"
|
||||
"mediatek,mt8135"
|
||||
"mediatek,mt8173"
|
||||
"mediatek,mt8183"
|
||||
|
||||
|
||||
Supported boards:
|
||||
|
|
@ -57,6 +58,9 @@ Supported boards:
|
|||
- Reference board variant 1 for MT7622:
|
||||
Required root node properties:
|
||||
- compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
|
||||
- Bananapi BPI-R64 for MT7622:
|
||||
Required root node properties:
|
||||
- compatible = "bananapi,bpi-r64", "mediatek,mt7622";
|
||||
- Reference board for MT7623a with eMMC:
|
||||
Required root node properties:
|
||||
- compatible = "mediatek,mt7623a-rfb-emmc", "mediatek,mt7623";
|
||||
|
|
@ -68,6 +72,9 @@ Supported boards:
|
|||
- compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
|
||||
- Bananapi BPI-R2 board:
|
||||
- compatible = "bananapi,bpi-r2", "mediatek,mt7623";
|
||||
- Reference board for MT7629:
|
||||
Required root node properties:
|
||||
- compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
|
||||
- MTK mt8127 tablet moose EVB:
|
||||
Required root node properties:
|
||||
- compatible = "mediatek,mt8127-moose", "mediatek,mt8127";
|
||||
|
|
@ -77,3 +84,6 @@ Supported boards:
|
|||
- MTK mt8173 tablet EVB:
|
||||
Required root node properties:
|
||||
- compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
|
||||
- Evaluation board for MT8183:
|
||||
Required root node properties:
|
||||
- compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
|
||||
|
|
|
|||
|
|
@ -1,10 +0,0 @@
|
|||
Olimex Device Tree Bindings
|
||||
---------------------------
|
||||
|
||||
SAM9-L9260 Board
|
||||
Required root node properties:
|
||||
- compatible = "olimex,sam9-l9260", "atmel,at91sam9260";
|
||||
|
||||
i.MX23 Olinuxino Low Cost Board
|
||||
Required root node properties:
|
||||
- compatible = "olimex,imx23-olinuxino", "fsl,imx23";
|
||||
|
|
@ -0,0 +1,238 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/shmobile.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas SH-Mobile, R-Mobile, and R-Car Platform Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Geert Uytterhoeven <geert+renesas@glider.be>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: Emma Mobile EV2
|
||||
items:
|
||||
- enum:
|
||||
- renesas,kzm9d # Kyoto Microcomputer Co. KZM-A9-Dual
|
||||
- const: renesas,emev2
|
||||
|
||||
- description: RZ/A1H (R7S72100)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,genmai # Genmai (RTK772100BC00000BR)
|
||||
- renesas,gr-peach # GR-Peach (X28A-M01-E/F)
|
||||
- renesas,rskrza1 # RSKRZA1 (YR0K77210C000BE)
|
||||
- const: renesas,r7s72100
|
||||
|
||||
- description: RZ/A2 (R7S9210)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,rza2mevb # RZ/A2M Eval Board (RTK7921053S00000BE)
|
||||
- const: renesas,r7s9210
|
||||
|
||||
- description: SH-Mobile AG5 (R8A73A00/SH73A0)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,kzm9g # Kyoto Microcomputer Co. KZM-A9-GT
|
||||
- const: renesas,sh73a0
|
||||
|
||||
- description: R-Mobile APE6 (R8A73A40)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,ape6evm
|
||||
- const: renesas,r8a73a4
|
||||
|
||||
- description: R-Mobile A1 (R8A77400)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,armadillo800eva # Atmark Techno Armadillo-800 EVA
|
||||
- const: renesas,r8a7740
|
||||
|
||||
- description: RZ/G1H (R8A77420)
|
||||
items:
|
||||
- const: renesas,r8a7742
|
||||
|
||||
- description: RZ/G1M (R8A77430)
|
||||
items:
|
||||
- enum:
|
||||
# iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven)
|
||||
- iwave,g20d
|
||||
- const: iwave,g20m
|
||||
- const: renesas,r8a7743
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
# iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
|
||||
- iwave,g20m
|
||||
- renesas,sk-rzg1m # SK-RZG1M (YR8A77430S000BE)
|
||||
- const: renesas,r8a7743
|
||||
|
||||
- description: RZ/G1N (R8A77440)
|
||||
items:
|
||||
- enum:
|
||||
# iWave Systems RZ/G1N Qseven Development Platform (iW-RainboW-G20D-Qseven)
|
||||
- iwave,g20d
|
||||
- const: iwave,g20m
|
||||
- const: renesas,r8a7744
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
# iWave Systems RZ/G1N Qseven System On Module (iW-RainboW-G20M-Qseven)
|
||||
- iwave,g20m
|
||||
- const: renesas,r8a7744
|
||||
|
||||
- description: RZ/G1E (R8A77450)
|
||||
items:
|
||||
- enum:
|
||||
- iwave,g22m # iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM)
|
||||
- renesas,sk-rzg1e # SK-RZG1E (YR8A77450S000BE)
|
||||
- const: renesas,r8a7745
|
||||
|
||||
- description: iWave Systems RZ/G1E SODIMM SOM Development Platform (iW-RainboW-G22D)
|
||||
items:
|
||||
- const: iwave,g22d
|
||||
- const: iwave,g22m
|
||||
- const: renesas,r8a7745
|
||||
|
||||
- description: RZ/G1C (R8A77470)
|
||||
items:
|
||||
- enum:
|
||||
- iwave,g23s #iWave Systems RZ/G1C Single Board Computer (iW-RainboW-G23S)
|
||||
- const: renesas,r8a77470
|
||||
|
||||
- description: RZ/G2M (R8A774A1)
|
||||
items:
|
||||
- const: renesas,r8a774a1
|
||||
|
||||
- description: RZ/G2E (R8A774C0)
|
||||
items:
|
||||
- enum:
|
||||
- si-linux,cat874 # Silicon Linux RZ/G2E 96board platform (CAT874)
|
||||
- const: renesas,r8a774c0
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- si-linux,cat875 # Silicon Linux sub board for CAT874 (CAT875)
|
||||
- const: si-linux,cat874
|
||||
- const: renesas,r8a774c0
|
||||
|
||||
- description: R-Car M1A (R8A77781)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,bockw
|
||||
- const: renesas,r8a7778
|
||||
|
||||
- description: R-Car H1 (R8A77790)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,marzen # Marzen (R0P7779A00010S)
|
||||
- const: renesas,r8a7779
|
||||
|
||||
- description: R-Car H2 (R8A77900)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,lager # Lager (RTP0RC7790SEB00010S)
|
||||
- renesas,stout # Stout (ADAS Starterkit, Y-R-CAR-ADAS-SKH2-BOARD)
|
||||
- const: renesas,r8a7790
|
||||
|
||||
- description: R-Car M2-W (R8A77910)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,henninger
|
||||
- renesas,koelsch # Koelsch (RTP0RC7791SEB00010S)
|
||||
- renesas,porter # Porter (M2-LCDP)
|
||||
- const: renesas,r8a7791
|
||||
|
||||
- description: R-Car V2H (R8A77920)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,blanche # Blanche (RTP0RC7792SEB00010S)
|
||||
- renesas,wheat # Wheat (RTP0RC7792ASKB0000JE)
|
||||
- const: renesas,r8a7792
|
||||
|
||||
- description: R-Car M2-N (R8A77930)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,gose # Gose (RTP0RC7793SEB00010S)
|
||||
- const: renesas,r8a7793
|
||||
|
||||
- description: R-Car E2 (R8A77940)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,alt # Alt (RTP0RC7794SEB00010S)
|
||||
- renesas,silk # SILK (RTP0RC7794LCB00011S)
|
||||
- const: renesas,r8a7794
|
||||
|
||||
- description: R-Car H3 (R8A77950)
|
||||
items:
|
||||
- enum:
|
||||
# H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKBX0010SA00 (H3 ES1.1))
|
||||
# H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0))
|
||||
- renesas,h3ulcb
|
||||
- renesas,salvator-x # Salvator-X (RTP0RC7795SIPB0010S)
|
||||
- renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S)
|
||||
- const: renesas,r8a7795
|
||||
|
||||
- description: R-Car M3-W (R8A77960)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,m3ulcb # M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0))
|
||||
- renesas,salvator-x # Salvator-X (RTP0RC7796SIPB0011S)
|
||||
- renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7796SIPB0012S)
|
||||
- const: renesas,r8a7796
|
||||
|
||||
- description: Kingfisher (SBEV-RCAR-KF-M03)
|
||||
items:
|
||||
- const: shimafuji,kingfisher
|
||||
- enum:
|
||||
- renesas,h3ulcb
|
||||
- renesas,m3ulcb
|
||||
- enum:
|
||||
- renesas,r8a7795
|
||||
- renesas,r8a7796
|
||||
|
||||
- description: R-Car M3-N (R8A77965)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,m3nulcb # M3NULCB (R-Car Starter Kit Pro, RTP0RC77965SKBX010SA00 (M3-N ES1.1))
|
||||
- renesas,salvator-x # Salvator-X (RTP0RC7796SIPB0011S (M3-N))
|
||||
- renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC77965SIPB012S)
|
||||
- const: renesas,r8a77965
|
||||
|
||||
- description: R-Car V3M (R8A77970)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,eagle # Eagle (RTP0RC77970SEB0010S)
|
||||
- renesas,v3msk # V3MSK (Y-ASK-RCAR-V3M-WS10)
|
||||
- const: renesas,r8a77970
|
||||
|
||||
- description: R-Car V3H (R8A77980)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,condor # Condor (RTP0RC77980SEB0010SS/RTP0RC77980SEB0010SA01)
|
||||
- renesas,v3hsk # V3HSK (Y-ASK-RCAR-V3H-WS10)
|
||||
- const: renesas,r8a77980
|
||||
|
||||
- description: R-Car E3 (R8A77990)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,ebisu # Ebisu (RTP0RC77990SEB0010S)
|
||||
- const: renesas,r8a77990
|
||||
|
||||
- description: R-Car D3 (R8A77995)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,draak # Draak (RTP0RC77995SEB0010S)
|
||||
- const: renesas,r8a77995
|
||||
|
||||
- description: RZ/N1D (R9A06G032)
|
||||
items:
|
||||
- enum:
|
||||
- renesas,rzn1d400-db # RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package)
|
||||
- const: renesas,r9a06g032
|
||||
|
||||
...
|
||||
|
|
@ -60,6 +60,11 @@ properties:
|
|||
- const: chipspark,rayeager-px2
|
||||
- const: rockchip,rk3066a
|
||||
|
||||
- description: Elgin RV1108 R1
|
||||
items:
|
||||
- const: elgin,rv1108-r1
|
||||
- const: rockchip,rv1108
|
||||
|
||||
- description: Firefly Firefly-RK3288
|
||||
items:
|
||||
- enum:
|
||||
|
|
@ -87,6 +92,13 @@ properties:
|
|||
- const: firefly,roc-rk3399-pc
|
||||
- const: rockchip,rk3399
|
||||
|
||||
- description: FriendlyElec NanoPi4 series boards
|
||||
items:
|
||||
- enum:
|
||||
- friendlyarm,nanopc-t4
|
||||
- friendlyarm,nanopi-m4
|
||||
- const: rockchip,rk3399
|
||||
|
||||
- description: GeekBuying GeekBox
|
||||
items:
|
||||
- const: geekbuying,geekbox
|
||||
|
|
@ -317,6 +329,11 @@ properties:
|
|||
- const: radxa,rock
|
||||
- const: rockchip,rk3188
|
||||
|
||||
- description: Radxa ROCK Pi 4
|
||||
items:
|
||||
- const: radxa,rockpi4
|
||||
- const: rockchip,rk3399
|
||||
|
||||
- description: Radxa Rock2 Square
|
||||
items:
|
||||
- const: radxa,rock2-square
|
||||
|
|
|
|||
|
|
@ -1,155 +0,0 @@
|
|||
Renesas SH-Mobile, R-Mobile, and R-Car Platform Device Tree Bindings
|
||||
--------------------------------------------------------------------
|
||||
|
||||
SoCs:
|
||||
|
||||
- Emma Mobile EV2
|
||||
compatible = "renesas,emev2"
|
||||
- RZ/A1H (R7S72100)
|
||||
compatible = "renesas,r7s72100"
|
||||
- RZ/A2 (R7S9210)
|
||||
compatible = "renesas,r7s9210"
|
||||
- SH-Mobile AG5 (R8A73A00/SH73A0)
|
||||
compatible = "renesas,sh73a0"
|
||||
- R-Mobile APE6 (R8A73A40)
|
||||
compatible = "renesas,r8a73a4"
|
||||
- R-Mobile A1 (R8A77400)
|
||||
compatible = "renesas,r8a7740"
|
||||
- RZ/G1H (R8A77420)
|
||||
compatible = "renesas,r8a7742"
|
||||
- RZ/G1M (R8A77430)
|
||||
compatible = "renesas,r8a7743"
|
||||
- RZ/G1N (R8A77440)
|
||||
compatible = "renesas,r8a7744"
|
||||
- RZ/G1E (R8A77450)
|
||||
compatible = "renesas,r8a7745"
|
||||
- RZ/G1C (R8A77470)
|
||||
compatible = "renesas,r8a77470"
|
||||
- RZ/G2M (R8A774A1)
|
||||
compatible = "renesas,r8a774a1"
|
||||
- RZ/G2E (R8A774C0)
|
||||
compatible = "renesas,r8a774c0"
|
||||
- R-Car M1A (R8A77781)
|
||||
compatible = "renesas,r8a7778"
|
||||
- R-Car H1 (R8A77790)
|
||||
compatible = "renesas,r8a7779"
|
||||
- R-Car H2 (R8A77900)
|
||||
compatible = "renesas,r8a7790"
|
||||
- R-Car M2-W (R8A77910)
|
||||
compatible = "renesas,r8a7791"
|
||||
- R-Car V2H (R8A77920)
|
||||
compatible = "renesas,r8a7792"
|
||||
- R-Car M2-N (R8A77930)
|
||||
compatible = "renesas,r8a7793"
|
||||
- R-Car E2 (R8A77940)
|
||||
compatible = "renesas,r8a7794"
|
||||
- R-Car H3 (R8A77950)
|
||||
compatible = "renesas,r8a7795"
|
||||
- R-Car M3-W (R8A77960)
|
||||
compatible = "renesas,r8a7796"
|
||||
- R-Car M3-N (R8A77965)
|
||||
compatible = "renesas,r8a77965"
|
||||
- R-Car V3M (R8A77970)
|
||||
compatible = "renesas,r8a77970"
|
||||
- R-Car V3H (R8A77980)
|
||||
compatible = "renesas,r8a77980"
|
||||
- R-Car E3 (R8A77990)
|
||||
compatible = "renesas,r8a77990"
|
||||
- R-Car D3 (R8A77995)
|
||||
compatible = "renesas,r8a77995"
|
||||
- RZ/N1D (R9A06G032)
|
||||
compatible = "renesas,r9a06g032"
|
||||
|
||||
Boards:
|
||||
|
||||
- Alt (RTP0RC7794SEB00010S)
|
||||
compatible = "renesas,alt", "renesas,r8a7794"
|
||||
- APE6-EVM
|
||||
compatible = "renesas,ape6evm", "renesas,r8a73a4"
|
||||
- Atmark Techno Armadillo-800 EVA
|
||||
compatible = "renesas,armadillo800eva", "renesas,r8a7740"
|
||||
- Blanche (RTP0RC7792SEB00010S)
|
||||
compatible = "renesas,blanche", "renesas,r8a7792"
|
||||
- BOCK-W
|
||||
compatible = "renesas,bockw", "renesas,r8a7778"
|
||||
- Condor (RTP0RC77980SEB0010SS/RTP0RC77980SEB0010SA01)
|
||||
compatible = "renesas,condor", "renesas,r8a77980"
|
||||
- Draak (RTP0RC77995SEB0010S)
|
||||
compatible = "renesas,draak", "renesas,r8a77995"
|
||||
- Eagle (RTP0RC77970SEB0010S)
|
||||
compatible = "renesas,eagle", "renesas,r8a77970"
|
||||
- Ebisu (RTP0RC77990SEB0010S)
|
||||
compatible = "renesas,ebisu", "renesas,r8a77990"
|
||||
- Genmai (RTK772100BC00000BR)
|
||||
compatible = "renesas,genmai", "renesas,r7s72100"
|
||||
- GR-Peach (X28A-M01-E/F)
|
||||
compatible = "renesas,gr-peach", "renesas,r7s72100"
|
||||
- Gose (RTP0RC7793SEB00010S)
|
||||
compatible = "renesas,gose", "renesas,r8a7793"
|
||||
- H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKBX0010SA00 (H3 ES1.1))
|
||||
H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0))
|
||||
compatible = "renesas,h3ulcb", "renesas,r8a7795"
|
||||
- Henninger
|
||||
compatible = "renesas,henninger", "renesas,r8a7791"
|
||||
- iWave Systems RZ/G1C Single Board Computer (iW-RainboW-G23S)
|
||||
compatible = "iwave,g23s", "renesas,r8a77470"
|
||||
- iWave Systems RZ/G1E SODIMM SOM Development Platform (iW-RainboW-G22D)
|
||||
compatible = "iwave,g22d", "iwave,g22m", "renesas,r8a7745"
|
||||
- iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM)
|
||||
compatible = "iwave,g22m", "renesas,r8a7745"
|
||||
- iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven)
|
||||
compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743"
|
||||
- iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
|
||||
compatible = "iwave,g20m", "renesas,r8a7743"
|
||||
- iWave Systems RZ/G1N Qseven Development Platform (iW-RainboW-G20D-Qseven)
|
||||
compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7744"
|
||||
- iWave Systems RZ/G1N Qseven System On Module (iW-RainboW-G20M-Qseven)
|
||||
compatible = "iwave,g20m", "renesas,r8a7744"
|
||||
- Kingfisher (SBEV-RCAR-KF-M03)
|
||||
compatible = "shimafuji,kingfisher"
|
||||
- Koelsch (RTP0RC7791SEB00010S)
|
||||
compatible = "renesas,koelsch", "renesas,r8a7791"
|
||||
- Kyoto Microcomputer Co. KZM-A9-Dual
|
||||
compatible = "renesas,kzm9d", "renesas,emev2"
|
||||
- Kyoto Microcomputer Co. KZM-A9-GT
|
||||
compatible = "renesas,kzm9g", "renesas,sh73a0"
|
||||
- Lager (RTP0RC7790SEB00010S)
|
||||
compatible = "renesas,lager", "renesas,r8a7790"
|
||||
- M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0))
|
||||
compatible = "renesas,m3ulcb", "renesas,r8a7796"
|
||||
- M3NULCB (R-Car Starter Kit Pro, RTP0RC77965SKBX010SA00 (M3-N ES1.1))
|
||||
compatible = "renesas,m3nulcb", "renesas,r8a77965"
|
||||
- Marzen (R0P7779A00010S)
|
||||
compatible = "renesas,marzen", "renesas,r8a7779"
|
||||
- Porter (M2-LCDP)
|
||||
compatible = "renesas,porter", "renesas,r8a7791"
|
||||
- RSKRZA1 (YR0K77210C000BE)
|
||||
compatible = "renesas,rskrza1", "renesas,r7s72100"
|
||||
- RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package)
|
||||
compatible = "renesas,rzn1d400-db", "renesas,r9a06g032"
|
||||
- Salvator-X (RTP0RC7795SIPB0010S)
|
||||
compatible = "renesas,salvator-x", "renesas,r8a7795"
|
||||
- Salvator-X (RTP0RC7796SIPB0011S)
|
||||
compatible = "renesas,salvator-x", "renesas,r8a7796"
|
||||
- Salvator-X (RTP0RC7796SIPB0011S (M3-N))
|
||||
compatible = "renesas,salvator-x", "renesas,r8a77965"
|
||||
- Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S)
|
||||
compatible = "renesas,salvator-xs", "renesas,r8a7795"
|
||||
- Salvator-XS (Salvator-X 2nd version, RTP0RC7796SIPB0012S)
|
||||
compatible = "renesas,salvator-xs", "renesas,r8a7796"
|
||||
- Salvator-XS (Salvator-X 2nd version, RTP0RC77965SIPB012S)
|
||||
compatible = "renesas,salvator-xs", "renesas,r8a77965"
|
||||
- SILK (RTP0RC7794LCB00011S)
|
||||
compatible = "renesas,silk", "renesas,r8a7794"
|
||||
- SK-RZG1E (YR8A77450S000BE)
|
||||
compatible = "renesas,sk-rzg1e", "renesas,r8a7745"
|
||||
- SK-RZG1M (YR8A77430S000BE)
|
||||
compatible = "renesas,sk-rzg1m", "renesas,r8a7743"
|
||||
- Stout (ADAS Starterkit, Y-R-CAR-ADAS-SKH2-BOARD)
|
||||
compatible = "renesas,stout", "renesas,r8a7790"
|
||||
- V3HSK (Y-ASK-RCAR-V3H-WS10)
|
||||
compatible = "renesas,v3hsk", "renesas,r8a77980"
|
||||
- V3MSK (Y-ASK-RCAR-V3M-WS10)
|
||||
compatible = "renesas,v3msk", "renesas,r8a77970"
|
||||
- Wheat (RTP0RC7792ASKB0000JE)
|
||||
compatible = "renesas,wheat", "renesas,r8a7792"
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
Technologic Systems Platforms Device Tree Bindings
|
||||
--------------------------------------------------
|
||||
|
||||
TS-4600 is a System-on-Module based on the Freescale i.MX28 System-on-Chip.
|
||||
It can be mounted on a carrier board providing additional peripheral connectors.
|
||||
Required root node properties:
|
||||
- compatible = "technologic,imx28-ts4600", "fsl,imx28"
|
||||
|
||||
TS-4800 board
|
||||
Required root node properties:
|
||||
- compatible = "technologic,imx51-ts4800", "fsl,imx51";
|
||||
|
||||
TS-4900 is a System-on-Module based on the Freescale i.MX6 System-on-Chip.
|
||||
It can be mounted on a carrier board providing additional peripheral connectors.
|
||||
Required root node properties:
|
||||
- compatible = "technologic,imx6dl-ts4900", "fsl,imx6dl"
|
||||
- compatible = "technologic,imx6q-ts4900", "fsl,imx6q"
|
||||
|
||||
TS-7970 is a System-on-Module based on the Freescale i.MX6 System-on-Chip.
|
||||
It can be mounted on a carrier board providing additional peripheral connectors.
|
||||
Required root node properties:
|
||||
- compatible = "technologic,imx6dl-ts7970", "fsl,imx6dl"
|
||||
- compatible = "technologic,imx6q-ts7970", "fsl,imx6q"
|
||||
|
|
@ -87,9 +87,11 @@ properties:
|
|||
- const: nvidia,tegra124
|
||||
- items:
|
||||
- enum:
|
||||
- nvidia,darcy
|
||||
- nvidia,p2371-0000
|
||||
- nvidia,p2371-2180
|
||||
- nvidia,p2571
|
||||
- nvidia,p2894-0050-a08
|
||||
- const: nvidia,tegra210
|
||||
- items:
|
||||
- enum:
|
||||
|
|
|
|||
|
|
@ -8,10 +8,11 @@ the fast CPU cluster. It consists of a free-running voltage controlled
|
|||
oscillator connected to the CPU voltage rail (VDD_CPU), and a closed loop
|
||||
control module that will automatically adjust the VDD_CPU voltage by
|
||||
communicating with an off-chip PMIC either via an I2C bus or via PWM signals.
|
||||
Currently only the I2C mode is supported by these bindings.
|
||||
|
||||
Required properties:
|
||||
- compatible : should be "nvidia,tegra124-dfll"
|
||||
- compatible : should be one of:
|
||||
- "nvidia,tegra124-dfll": for Tegra124
|
||||
- "nvidia,tegra210-dfll": for Tegra210
|
||||
- reg : Defines the following set of registers, in the order listed:
|
||||
- registers for the DFLL control logic.
|
||||
- registers for the I2C output logic.
|
||||
|
|
@ -45,10 +46,31 @@ Required properties for the control loop parameters:
|
|||
Optional properties for the control loop parameters:
|
||||
- nvidia,cg-scale: Boolean value, see the field DFLL_PARAMS_CG_SCALE in the TRM.
|
||||
|
||||
Optional properties for mode selection:
|
||||
- nvidia,pwm-to-pmic: Use PWM to control regulator rather then I2C.
|
||||
|
||||
Required properties for I2C mode:
|
||||
- nvidia,i2c-fs-rate: I2C transfer rate, if using full speed mode.
|
||||
|
||||
Example:
|
||||
Required properties for PWM mode:
|
||||
- nvidia,pwm-period-nanoseconds: period of PWM square wave in nanoseconds.
|
||||
- nvidia,pwm-tristate-microvolts: Regulator voltage in micro volts when PWM
|
||||
control is disabled and the PWM output is tristated. Note that this voltage is
|
||||
configured in hardware, typically via a resistor divider.
|
||||
- nvidia,pwm-min-microvolts: Regulator voltage in micro volts when PWM control
|
||||
is enabled and PWM output is low. Hence, this is the minimum output voltage
|
||||
that the regulator supports when PWM control is enabled.
|
||||
- nvidia,pwm-voltage-step-microvolts: Voltage increase in micro volts
|
||||
corresponding to a 1/33th increase in duty cycle. Eg the voltage for 2/33th
|
||||
duty cycle would be: nvidia,pwm-min-microvolts +
|
||||
nvidia,pwm-voltage-step-microvolts * 2.
|
||||
- pinctrl-0: I/O pad configuration when PWM control is enabled.
|
||||
- pinctrl-1: I/O pad configuration when PWM control is disabled.
|
||||
- pinctrl-names: must include the following entries:
|
||||
- dvfs_pwm_enable: I/O pad configuration when PWM control is enabled.
|
||||
- dvfs_pwm_disable: I/O pad configuration when PWM control is disabled.
|
||||
|
||||
Example for I2C:
|
||||
|
||||
clock@70110000 {
|
||||
compatible = "nvidia,tegra124-dfll";
|
||||
|
|
@ -76,3 +98,58 @@ clock@70110000 {
|
|||
|
||||
nvidia,i2c-fs-rate = <400000>;
|
||||
};
|
||||
|
||||
Example for PWM:
|
||||
|
||||
clock@70110000 {
|
||||
compatible = "nvidia,tegra124-dfll";
|
||||
reg = <0 0x70110000 0 0x100>, /* DFLL control */
|
||||
<0 0x70110000 0 0x100>, /* I2C output control */
|
||||
<0 0x70110100 0 0x100>, /* Integrated I2C controller */
|
||||
<0 0x70110200 0 0x100>; /* Look-up table RAM */
|
||||
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&tegra_car TEGRA210_CLK_DFLL_SOC>,
|
||||
<&tegra_car TEGRA210_CLK_DFLL_REF>,
|
||||
<&tegra_car TEGRA124_CLK_I2C5>;;
|
||||
clock-names = "soc", "ref", "i2c";
|
||||
resets = <&tegra_car TEGRA124_RST_DFLL_DVCO>;
|
||||
reset-names = "dvco";
|
||||
#clock-cells = <0>;
|
||||
clock-output-names = "dfllCPU_out";
|
||||
|
||||
nvidia,sample-rate = <25000>;
|
||||
nvidia,droop-ctrl = <0x00000f00>;
|
||||
nvidia,force-mode = <1>;
|
||||
nvidia,cf = <6>;
|
||||
nvidia,ci = <0>;
|
||||
nvidia,cg = <2>;
|
||||
|
||||
nvidia,pwm-min-microvolts = <708000>; /* 708mV */
|
||||
nvidia,pwm-period-nanoseconds = <2500>; /* 2.5us */
|
||||
nvidia,pwm-to-pmic;
|
||||
nvidia,pwm-tristate-microvolts = <1000000>;
|
||||
nvidia,pwm-voltage-step-microvolts = <19200>; /* 19.2mV */
|
||||
|
||||
pinctrl-names = "dvfs_pwm_enable", "dvfs_pwm_disable";
|
||||
pinctrl-0 = <&dvfs_pwm_active_state>;
|
||||
pinctrl-1 = <&dvfs_pwm_inactive_state>;
|
||||
};
|
||||
|
||||
/* pinmux nodes added for completeness. Binding doc can be found in:
|
||||
* Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.txt
|
||||
*/
|
||||
|
||||
pinmux: pinmux@700008d4 {
|
||||
dvfs_pwm_active_state: dvfs_pwm_active {
|
||||
dvfs_pwm_pbb1 {
|
||||
nvidia,pins = "dvfs_pwm_pbb1";
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
};
|
||||
};
|
||||
dvfs_pwm_inactive_state: dvfs_pwm_inactive {
|
||||
dvfs_pwm_pbb1 {
|
||||
nvidia,pins = "dvfs_pwm_pbb1";
|
||||
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -9,11 +9,9 @@ Required properties:
|
|||
See ../clocks/clock-bindings.txt for details.
|
||||
- clock-names: Must include the following entries:
|
||||
- cpu_g: Clock mux for the fast CPU cluster.
|
||||
- cpu_lp: Clock mux for the low-power CPU cluster.
|
||||
- pll_x: Fast PLL clocksource.
|
||||
- pll_p: Auxiliary PLL used during fast PLL rate changes.
|
||||
- dfll: Fast DFLL clocksource that also automatically scales CPU voltage.
|
||||
- vdd-cpu-supply: Regulator for CPU voltage
|
||||
|
||||
Optional properties:
|
||||
- clock-latency: Specify the possible maximum transition latency for clock,
|
||||
|
|
@ -31,13 +29,11 @@ cpus {
|
|||
reg = <0>;
|
||||
|
||||
clocks = <&tegra_car TEGRA124_CLK_CCLK_G>,
|
||||
<&tegra_car TEGRA124_CLK_CCLK_LP>,
|
||||
<&tegra_car TEGRA124_CLK_PLL_X>,
|
||||
<&tegra_car TEGRA124_CLK_PLL_P>,
|
||||
<&dfll>;
|
||||
clock-names = "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll";
|
||||
clock-names = "cpu_g", "pll_x", "pll_p", "dfll";
|
||||
clock-latency = <300000>;
|
||||
vdd-cpu-supply: <&vdd_cpu>;
|
||||
};
|
||||
|
||||
<...>
|
||||
|
|
|
|||
|
|
@ -0,0 +1,33 @@
|
|||
Meson specific Simple Framebuffer bindings
|
||||
|
||||
This binding documents meson specific extensions to the simple-framebuffer
|
||||
bindings. The meson simplefb u-boot code relies on the devicetree containing
|
||||
pre-populated simplefb nodes.
|
||||
|
||||
These extensions are intended so that u-boot can select the right node based
|
||||
on which pipeline is being used. As such they are solely intended for
|
||||
firmware / bootloader use, and the OS should ignore them.
|
||||
|
||||
Required properties:
|
||||
- compatible: "amlogic,simple-framebuffer", "simple-framebuffer"
|
||||
- amlogic,pipeline, one of:
|
||||
"vpu-cvbs"
|
||||
"vpu-hdmi"
|
||||
|
||||
Example:
|
||||
|
||||
chosen {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
simplefb_hdmi: framebuffer-hdmi {
|
||||
compatible = "amlogic,simple-framebuffer",
|
||||
"simple-framebuffer";
|
||||
amlogic,pipeline = "vpu-hdmi";
|
||||
clocks = <&clkc CLKID_HDMI_PCLK>,
|
||||
<&clkc CLKID_CLK81>,
|
||||
<&clkc CLKID_GCLK_VENCI_INT0>;
|
||||
power-domains = <&pwrc_vpu>;
|
||||
};
|
||||
};
|
||||
|
|
@ -8,7 +8,6 @@ which can create the interprocessor communication (IPC) between the CPU
|
|||
and BPMP.
|
||||
|
||||
Required properties:
|
||||
- name : Should be bpmp
|
||||
- compatible
|
||||
Array of strings
|
||||
One of:
|
||||
|
|
|
|||
|
|
@ -0,0 +1,35 @@
|
|||
NVIDIA Tegra210 Boot and Power Management Processor (BPMP)
|
||||
|
||||
The Boot and Power Management Processor (BPMP) is a co-processor found
|
||||
in Tegra210 SoC. It is designed to handle the early stages of the boot
|
||||
process as well as to assisting in entering deep low power state
|
||||
(suspend to ram), and also offloading DRAM memory clock scaling on
|
||||
some platforms. The binding document defines the resources that would
|
||||
be used by the BPMP T210 firmware driver, which can create the
|
||||
interprocessor communication (IPC) between the CPU and BPMP.
|
||||
|
||||
Required properties:
|
||||
- compatible
|
||||
Array of strings
|
||||
One of:
|
||||
- "nvidia,tegra210-bpmp"
|
||||
- reg: physical base address and length for HW synchornization primitives
|
||||
1) base address and length to Tegra 'atomics' hardware
|
||||
2) base address and length to Tegra 'semaphore' hardware
|
||||
- interrupts: specifies the interrupt number for receiving messages ("rx")
|
||||
and for triggering messages ("tx")
|
||||
|
||||
Optional properties:
|
||||
- #clock-cells : Should be 1 for platforms where DRAM clock control is
|
||||
offloaded to bpmp.
|
||||
|
||||
Example:
|
||||
|
||||
bpmp@70016000 {
|
||||
compatible = "nvidia,tegra210-bpmp";
|
||||
reg = <0x0 0x70016000 0x0 0x2000
|
||||
0x0 0x60001000 0x0 0x1000>;
|
||||
interrupts = <GIC_SPI 6 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "tx", "rx";
|
||||
};
|
||||
|
|
@ -13,6 +13,8 @@ Required properties:
|
|||
+ allwinner,sun8i-h3-mali
|
||||
+ allwinner,sun50i-a64-mali
|
||||
+ allwinner,sun50i-h5-mali
|
||||
+ amlogic,meson8-mali
|
||||
+ amlogic,meson8b-mali
|
||||
+ amlogic,meson-gxbb-mali
|
||||
+ amlogic,meson-gxl-mali
|
||||
+ rockchip,rk3036-mali
|
||||
|
|
@ -82,6 +84,10 @@ to specify one more vendor-specific compatible, among:
|
|||
Required properties:
|
||||
* resets: phandle to the reset line for the GPU
|
||||
|
||||
- amlogic,meson8-mali and amlogic,meson8b-mali
|
||||
Required properties:
|
||||
* resets: phandle to the reset line for the GPU
|
||||
|
||||
- Rockchip variants:
|
||||
Required properties:
|
||||
* resets: phandle to the reset line for the GPU
|
||||
|
|
|
|||
|
|
@ -2,7 +2,12 @@
|
|||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
Required properties:
|
||||
- mfd
|
||||
compatible: Should be
|
||||
"ti,am3359-tscadc" for AM335x/AM437x SoCs
|
||||
"ti,am654-tscadc", "ti,am3359-tscadc" for AM654 SoCs
|
||||
- child "tsc"
|
||||
compatible: Should be "ti,am3359-tsc".
|
||||
ti,wires: Wires refer to application modes i.e. 4/5/8 wire touchscreen
|
||||
support on the platform.
|
||||
ti,x-plate-resistance: X plate resistance
|
||||
|
|
@ -25,6 +30,9 @@ Required properties:
|
|||
AIN0 = 0, AIN1 = 1 and so on till AIN7 = 7.
|
||||
XP = 0, XN = 1, YP = 2, YN = 3.
|
||||
- child "adc"
|
||||
compatible: Should be
|
||||
"ti,am3359-adc" for AM335x/AM437x SoCs
|
||||
"ti,am654-adc", "ti,am3359-adc" for AM654 SoCs
|
||||
ti,adc-channels: List of analog inputs available for ADC.
|
||||
AIN0 = 0, AIN1 = 1 and so on till AIN7 = 7.
|
||||
|
||||
|
|
|
|||
|
|
@ -9,6 +9,7 @@ Required properties:
|
|||
"mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135
|
||||
"mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127
|
||||
"mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq": for MT7622
|
||||
"mediatek,mt7623-sysirq", "mediatek,mt6577-sysirq": for MT7623
|
||||
"mediatek,mt6795-sysirq", "mediatek,mt6577-sysirq": for MT6795
|
||||
"mediatek,mt6797-sysirq", "mediatek,mt6577-sysirq": for MT6797
|
||||
"mediatek,mt6765-sysirq", "mediatek,mt6577-sysirq": for MT6765
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
TI CPSW Phy mode Selection Device Tree Bindings
|
||||
TI CPSW Phy mode Selection Device Tree Bindings (DEPRECATED)
|
||||
-----------------------------------------------
|
||||
|
||||
Required properties:
|
||||
|
|
|
|||
|
|
@ -63,6 +63,7 @@ The valid sections compatible for H5 are:
|
|||
|
||||
The valid sections compatible for H6 are:
|
||||
- allwinner,sun50i-h6-sram-c, allwinner,sun50i-a64-sram-c
|
||||
- allwinner,sun50i-h6-sram-c1, allwinner,sun4i-a10-sram-c1
|
||||
|
||||
The valid sections compatible for F1C100s are:
|
||||
- allwinner,suniv-f1c100s-sram-d, allwinner,sun4i-a10-sram-d
|
||||
|
|
|
|||
|
|
@ -24,6 +24,7 @@ amarula Amarula Solutions
|
|||
amazon Amazon.com, Inc.
|
||||
amcc Applied Micro Circuits Corporation (APM, formally AMCC)
|
||||
amd Advanced Micro Devices (AMD), Inc.
|
||||
amediatech Shenzhen Amediatech Technology Co., Ltd
|
||||
amlogic Amlogic, Inc.
|
||||
ampire Ampire Co., Ltd.
|
||||
ams AMS AG
|
||||
|
|
@ -65,6 +66,7 @@ bticino Bticino International
|
|||
calxeda Calxeda
|
||||
capella Capella Microsystems, Inc
|
||||
cascoda Cascoda, Ltd.
|
||||
catalyst Catalyst Semiconductor, Inc.
|
||||
cavium Cavium, Inc.
|
||||
cdns Cadence Design Systems Inc.
|
||||
cdtech CDTech(H.K.) Electronics Limited
|
||||
|
|
@ -108,11 +110,13 @@ dongwoon Dongwoon Anatech
|
|||
dptechnics DPTechnics
|
||||
dragino Dragino Technology Co., Limited
|
||||
ea Embedded Artists AB
|
||||
ebs-systart EBS-SYSTART GmbH
|
||||
ebv EBV Elektronik
|
||||
eckelmann Eckelmann AG
|
||||
edt Emerging Display Technologies
|
||||
eeti eGalax_eMPIA Technology Inc
|
||||
elan Elan Microelectronic Corp.
|
||||
elgin Elgin S/A.
|
||||
embest Shenzhen Embest Technology Co., Ltd.
|
||||
emlid Emlid, Ltd.
|
||||
emmicro EM Microelectronic
|
||||
|
|
@ -273,6 +277,7 @@ nintendo Nintendo
|
|||
nlt NLT Technologies, Ltd.
|
||||
nokia Nokia
|
||||
nordic Nordic Semiconductor
|
||||
novtech NovTech, Inc.
|
||||
nutsboard NutsBoard
|
||||
nuvoton Nuvoton Technology Corporation
|
||||
nvd New Vision Display
|
||||
|
|
|
|||
|
|
@ -1989,7 +1989,7 @@ Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/
|
|||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git next
|
||||
S: Supported
|
||||
F: arch/arm64/boot/dts/renesas/
|
||||
F: Documentation/devicetree/bindings/arm/shmobile.txt
|
||||
F: Documentation/devicetree/bindings/arm/renesas.yaml
|
||||
F: drivers/soc/renesas/
|
||||
F: include/linux/soc/renesas/
|
||||
|
||||
|
|
@ -2110,7 +2110,7 @@ F: arch/arm/boot/dts/sh*
|
|||
F: arch/arm/configs/shmobile_defconfig
|
||||
F: arch/arm/include/debug/renesas-scif.S
|
||||
F: arch/arm/mach-shmobile/
|
||||
F: Documentation/devicetree/bindings/arm/shmobile.txt
|
||||
F: Documentation/devicetree/bindings/arm/renesas.yaml
|
||||
F: drivers/soc/renesas/
|
||||
F: include/linux/soc/renesas/
|
||||
|
||||
|
|
|
|||
|
|
@ -79,6 +79,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
|
|||
bcm2835-rpi-a-plus.dtb \
|
||||
bcm2835-rpi-cm1-io1.dtb \
|
||||
bcm2836-rpi-2-b.dtb \
|
||||
bcm2837-rpi-3-a-plus.dtb \
|
||||
bcm2837-rpi-3-b.dtb \
|
||||
bcm2837-rpi-3-b-plus.dtb \
|
||||
bcm2837-rpi-cm3-io3.dtb \
|
||||
|
|
@ -115,6 +116,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
|
|||
bcm47094-luxul-xwr-3100.dtb \
|
||||
bcm47094-luxul-xwr-3150-v1.dtb \
|
||||
bcm47094-netgear-r8500.dtb \
|
||||
bcm47094-phicomm-k3.dtb \
|
||||
bcm94708.dtb \
|
||||
bcm94709.dtb \
|
||||
bcm953012er.dtb \
|
||||
|
|
@ -313,7 +315,8 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
|
|||
dtb-$(CONFIG_ARCH_LPC18XX) += \
|
||||
lpc4337-ciaa.dtb \
|
||||
lpc4350-hitex-eval.dtb \
|
||||
lpc4357-ea4357-devkit.dtb
|
||||
lpc4357-ea4357-devkit.dtb \
|
||||
lpc4357-myd-lpc4357.dtb
|
||||
dtb-$(CONFIG_ARCH_LPC32XX) += \
|
||||
lpc3250-ea3250.dtb \
|
||||
lpc3250-phy3250.dtb
|
||||
|
|
@ -445,6 +448,9 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
|||
imx6dl-wandboard.dtb \
|
||||
imx6dl-wandboard-revb1.dtb \
|
||||
imx6dl-wandboard-revd1.dtb \
|
||||
imx6dl-yapp4-draco.dtb \
|
||||
imx6dl-yapp4-hydra.dtb \
|
||||
imx6dl-yapp4-ursa.dtb \
|
||||
imx6q-apalis-eval.dtb \
|
||||
imx6q-apalis-ixora.dtb \
|
||||
imx6q-apalis-ixora-v1.1.dtb \
|
||||
|
|
@ -561,6 +567,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
|
|||
imx6ul-opos6uldev.dtb \
|
||||
imx6ul-pico-hobbit.dtb \
|
||||
imx6ul-pico-pi.dtb \
|
||||
imx6ul-phytec-phyboard-segin-full.dtb \
|
||||
imx6ul-tx6ul-0010.dtb \
|
||||
imx6ul-tx6ul-0011.dtb \
|
||||
imx6ul-tx6ul-mainboard.dtb \
|
||||
|
|
@ -599,6 +606,7 @@ dtb-$(CONFIG_SOC_VF610) += \
|
|||
vf610-zii-dev-rev-b.dtb \
|
||||
vf610-zii-dev-rev-c.dtb \
|
||||
vf610-zii-scu4-aib.dtb \
|
||||
vf610-zii-ssmb-dtu.dtb \
|
||||
vf610-zii-ssmb-spu3.dtb
|
||||
dtb-$(CONFIG_ARCH_MXS) += \
|
||||
imx23-evk.dtb \
|
||||
|
|
@ -700,6 +708,7 @@ dtb-$(CONFIG_ARCH_OMAP3) += \
|
|||
omap3-thunder.dtb \
|
||||
omap3-zoom3.dtb
|
||||
dtb-$(CONFIG_SOC_TI81XX) += \
|
||||
am3874-iceboard.dtb \
|
||||
dm8148-evm.dtb \
|
||||
dm8148-t410.dtb \
|
||||
dm8168-evm.dtb \
|
||||
|
|
@ -719,6 +728,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
|
|||
am335x-cm-t335.dtb \
|
||||
am335x-evm.dtb \
|
||||
am335x-evmsk.dtb \
|
||||
am335x-guardian.dtb \
|
||||
am335x-icev2.dtb \
|
||||
am335x-lxm.dtb \
|
||||
am335x-moxa-uc-2101.dtb \
|
||||
|
|
@ -843,6 +853,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
|
|||
r7s72100-genmai.dtb \
|
||||
r7s72100-gr-peach.dtb \
|
||||
r7s72100-rskrza1.dtb \
|
||||
r7s9210-rza2mevb.dtb \
|
||||
r8a73a4-ape6evm.dtb \
|
||||
r8a7740-armadillo800eva.dtb \
|
||||
r8a7743-iwg20d-q7.dtb \
|
||||
|
|
@ -868,6 +879,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
|
|||
r9a06g032-rzn1d400-db.dtb \
|
||||
sh73a0-kzm9g.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
rv1108-elgin-r1.dtb \
|
||||
rv1108-evb.dtb \
|
||||
rk3036-evb.dtb \
|
||||
rk3036-kylin.dtb \
|
||||
|
|
@ -919,6 +931,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
|
|||
socfpga_arria10_socdk_nand.dtb \
|
||||
socfpga_arria10_socdk_qspi.dtb \
|
||||
socfpga_arria10_socdk_sdmmc.dtb \
|
||||
socfpga_cyclone5_chameleon96.dtb \
|
||||
socfpga_cyclone5_mcvevk.dtb \
|
||||
socfpga_cyclone5_socdk.dtb \
|
||||
socfpga_cyclone5_de0_nano_soc.dtb \
|
||||
|
|
|
|||
|
|
@ -4,10 +4,11 @@
|
|||
* Licensed under the X11 license or the GPL v2 (or later)
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/clock/alphascale,asm9260.h>
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
interrupt-parent = <&icoll>;
|
||||
|
||||
memory {
|
||||
|
|
|
|||
|
|
@ -25,12 +25,18 @@
|
|||
*/
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include "skeleton64.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
/* SOC compatibility */
|
||||
compatible = "al,alpine";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0 0 0 0>;
|
||||
};
|
||||
|
||||
/* CPU Configuration */
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -72,7 +72,3 @@
|
|||
dual_emac_res_vlan = <2>;
|
||||
phy-handle = <&phy1>;
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
rmii-clock-ext = <1>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -114,7 +114,3 @@
|
|||
dual_emac_res_vlan = <2>;
|
||||
phy-handle = <&phy1>;
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
rmii-clock-ext = <1>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -133,10 +133,6 @@
|
|||
phy-handle = <&phy1>;
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
rmii-clock-ext = <1>;
|
||||
};
|
||||
|
||||
&dcan1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&dcan1_pins>;
|
||||
|
|
|
|||
|
|
@ -14,6 +14,10 @@
|
|||
compatible = "grinn,am335x-chiliboard", "grinn,am335x-chilisom",
|
||||
"ti,am33xx";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart0;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -151,10 +155,6 @@
|
|||
phy-mode = "rmii";
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
rmii-clock-ext;
|
||||
};
|
||||
|
||||
/* USB */
|
||||
&usb {
|
||||
status = "okay";
|
||||
|
|
|
|||
|
|
@ -0,0 +1,511 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
||||
* Copyright (C) 2018 Robert Bosch Power Tools GmbH
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "am33xx.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
model = "Bosch AM335x Guardian";
|
||||
compatible = "bosch,am335x-guardian", "ti,am33xx";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart0;
|
||||
tick-timer = &timer2;
|
||||
};
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&dcdc2_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio_keys_pins>;
|
||||
|
||||
button21 {
|
||||
label = "guardian-power-button";
|
||||
linux,code = <KEY_POWER>;
|
||||
gpios = <&gpio2 21 0>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&leds_pins>;
|
||||
|
||||
led1 {
|
||||
label = "green:heartbeat";
|
||||
gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led2 {
|
||||
label = "green:mmc0";
|
||||
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "mmc0";
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
panel {
|
||||
compatible = "ti,tilcdc,panel";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
|
||||
pinctrl-1 = <&lcd_pins_sleep>;
|
||||
|
||||
display-timings {
|
||||
320x240 {
|
||||
hactive = <320>;
|
||||
vactive = <240>;
|
||||
hback-porch = <68>;
|
||||
hfront-porch = <20>;
|
||||
hsync-len = <1>;
|
||||
vback-porch = <18>;
|
||||
vfront-porch = <4>;
|
||||
vsync-len = <1>;
|
||||
clock-frequency = <9000000>;
|
||||
hsync-active = <0>;
|
||||
vsync-active = <0>;
|
||||
};
|
||||
};
|
||||
panel-info {
|
||||
ac-bias = <255>;
|
||||
ac-bias-intrpt = <0>;
|
||||
dma-burst-sz = <16>;
|
||||
bpp = <24>;
|
||||
bus-width = <16>;
|
||||
fdd = <0x80>;
|
||||
sync-edge = <0>;
|
||||
sync-ctrl = <1>;
|
||||
raster-order = <0>;
|
||||
fifo-th = <0>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
pwm7: dmtimer-pwm {
|
||||
compatible = "ti,omap-dmtimer-pwm";
|
||||
ti,timers = <&timer7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&dmtimer7_pins>;
|
||||
};
|
||||
|
||||
vmmcsd_fixed: regulator-3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmcsd_fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
&cppi41dma {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&elm {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&nandflash_pins>;
|
||||
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
|
||||
status = "okay";
|
||||
|
||||
nand@0,0 {
|
||||
compatible = "ti,omap2-nand";
|
||||
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
|
||||
interrupt-parent = <&gpmc>;
|
||||
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
|
||||
<1 IRQ_TYPE_NONE>; /* termcount */
|
||||
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
|
||||
ti,nand-ecc-opt = "bch16";
|
||||
ti,elm-id = <&elm>;
|
||||
nand-bus-width = <8>;
|
||||
gpmc,device-width = <1>;
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <44>;
|
||||
gpmc,cs-wr-off-ns = <44>;
|
||||
gpmc,adv-on-ns = <6>;
|
||||
gpmc,adv-rd-off-ns = <34>;
|
||||
gpmc,adv-wr-off-ns = <44>;
|
||||
gpmc,we-on-ns = <0>;
|
||||
gpmc,we-off-ns = <40>;
|
||||
gpmc,oe-on-ns = <0>;
|
||||
gpmc,oe-off-ns = <54>;
|
||||
gpmc,access-ns = <64>;
|
||||
gpmc,rd-cycle-ns = <82>;
|
||||
gpmc,wr-cycle-ns = <82>;
|
||||
gpmc,bus-turnaround-ns = <0>;
|
||||
gpmc,cycle2cycle-delay-ns = <0>;
|
||||
gpmc,clk-activation-ns = <0>;
|
||||
gpmc,wr-access-ns = <40>;
|
||||
gpmc,wr-data-mux-bus-ns = <0>;
|
||||
|
||||
/*
|
||||
* MTD partition table
|
||||
*
|
||||
* All SPL-* partitions are sized to minimal length which can
|
||||
* be independently programmable. For NAND flash this is equal
|
||||
* to size of erase-block.
|
||||
*/
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "SPL";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
|
||||
partition@1 {
|
||||
label = "SPL.backup1";
|
||||
reg = <0x40000 0x40000>;
|
||||
};
|
||||
|
||||
partition@2 {
|
||||
label = "SPL.backup2";
|
||||
reg = <0x80000 0x40000>;
|
||||
};
|
||||
|
||||
partition@3 {
|
||||
label = "SPL.backup3";
|
||||
reg = <0xc0000 0x40000>;
|
||||
};
|
||||
|
||||
partition@4 {
|
||||
label = "u-boot";
|
||||
reg = <0x100000 0x100000>;
|
||||
};
|
||||
|
||||
partition@5 {
|
||||
label = "u-boot.backup1";
|
||||
reg = <0x200000 0x100000>;
|
||||
};
|
||||
|
||||
partition@6 {
|
||||
label = "u-boot-env";
|
||||
reg = <0x300000 0x40000>;
|
||||
};
|
||||
|
||||
partition@7 {
|
||||
label = "u-boot-env.backup1";
|
||||
reg = <0x340000 0x40000>;
|
||||
};
|
||||
|
||||
partition@8 {
|
||||
label = "UBI";
|
||||
reg = <0x380000 0x1fc80000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
clock-frequency = <400000>;
|
||||
status = "okay";
|
||||
|
||||
tps: tps@24 {
|
||||
reg = <0x24>;
|
||||
};
|
||||
};
|
||||
|
||||
&lcdc {
|
||||
blue-and-red-wiring = "crossed";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
bus-width = <0x4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <&vmmcsd_fixed>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rtc {
|
||||
clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
|
||||
clock-names = "ext-clk", "int-clk";
|
||||
system-power-controller;
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
ti,pindir-d0-out-d1-in;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
#include "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
ti,pmic-shutdown-controller;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <7>; /* NMI */
|
||||
|
||||
backlight {
|
||||
isel = <1>; /* 1 - ISET1, 2 ISET2 */
|
||||
fdim = <100>; /* TPS65217_BL_FDIM_100HZ */
|
||||
default-brightness = <100>;
|
||||
};
|
||||
|
||||
regulators {
|
||||
dcdc1_reg: regulator@0 {
|
||||
regulator-name = "vdds_dpr";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <925000>;
|
||||
regulator-max-microvolt = <1351500>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <925000>;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
regulator-name = "vio,vrtc,vdds";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
regulator-name = "vdd_3v3aux";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
regulator-name = "vdd_1v8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
regulator-name = "vdd_3v3a";
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&tscadc {
|
||||
status = "okay";
|
||||
|
||||
adc {
|
||||
ti,adc-channels = <0 1 2 3 4 5 6>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_ctrl_mod {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
dr_mode = "peripheral";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&am33xx_pinmux {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&clkout2_pin &gpio_pins>;
|
||||
|
||||
clkout2_pin: pinmux_clkout2_pin {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
|
||||
>;
|
||||
};
|
||||
|
||||
dmtimer7_pins: pinmux_dmtimer7_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5)
|
||||
>;
|
||||
};
|
||||
|
||||
gpio_keys_pins: pinmux_gpio_keys_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
gpio_pins: pinmux_gpio_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x990, PIN_OUTPUT | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins: pinmux_i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
lcd_disen_pins: pinmux_lcd_disen_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
lcd_pins_default: pinmux_lcd_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x820, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
|
||||
AM33XX_IOPAD(0x824, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
|
||||
AM33XX_IOPAD(0x828, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
|
||||
AM33XX_IOPAD(0x82c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
|
||||
AM33XX_IOPAD(0x830, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
|
||||
AM33XX_IOPAD(0x834, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
|
||||
AM33XX_IOPAD(0x838, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
|
||||
AM33XX_IOPAD(0x83c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
|
||||
AM33XX_IOPAD(0x8a0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8a4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8a8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8ac, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8b0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8b4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8b8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8bc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8c0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8c4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8c8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8cc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8d0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8d4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8d8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8dc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8e0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8e4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8e8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8ec, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
lcd_pins_sleep: pinmux_lcd_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x8a0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8a4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8a8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8ac, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8b0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8b4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8b8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8bc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8c0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8c4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8c8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8cc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8d0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8d4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8d8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8dc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
leds_pins: pinmux_leds_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x868, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x86c, PIN_OUTPUT | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
spi0_pins: pinmux_spi0_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x950, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: pinmux_uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
nandflash_pins: pinmux_nandflash_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x800, PIN_INPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x804, PIN_INPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x808, PIN_INPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x80c, PIN_INPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x810, PIN_INPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x814, PIN_INPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x818, PIN_INPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x81c, PIN_INPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -484,10 +484,6 @@
|
|||
dual_emac;
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
rmii-clock-ext;
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&davinci_mdio_default>;
|
||||
|
|
|
|||
|
|
@ -123,10 +123,6 @@
|
|||
phy-mode = "rmii";
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
rmii-clock-ext;
|
||||
};
|
||||
|
||||
&elm {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -328,10 +328,6 @@
|
|||
dual_emac_res_vlan = <3>;
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
rmii-clock-ext;
|
||||
};
|
||||
|
||||
&mac {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cpsw_default>;
|
||||
|
|
|
|||
|
|
@ -159,11 +159,6 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
reg= <0x44e10650 0xf5>;
|
||||
rmii-clock-ext;
|
||||
};
|
||||
|
||||
&sham {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -446,11 +446,6 @@
|
|||
dual_emac_res_vlan = <2>;
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
reg= <0x44e10650 0xf5>;
|
||||
rmii-clock-ext;
|
||||
};
|
||||
|
||||
&sham {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -100,10 +100,6 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
rmii-clock-ext;
|
||||
};
|
||||
|
||||
/* I2C Busses */
|
||||
&am33xx_pinmux {
|
||||
i2c0_pins: pinmux_i2c0 {
|
||||
|
|
|
|||
|
|
@ -1,11 +1,9 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* support for the bosch am335x based shc c3 board
|
||||
*
|
||||
* Copyright, C) 2015 Heiko Schocher <hs@denx.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
|
|
|
|||
|
|
@ -279,17 +279,9 @@
|
|||
#pinctrl-cells = <1>;
|
||||
ranges = <0 0 0x2000>;
|
||||
|
||||
phy_sel: cpsw-phy-sel@650 {
|
||||
compatible = "ti,am3352-cpsw-phy-sel";
|
||||
reg= <0x650 0x4>;
|
||||
reg-names = "gmii-sel";
|
||||
};
|
||||
|
||||
am33xx_pinmux: pinmux@800 {
|
||||
compatible = "pinctrl-single";
|
||||
reg = <0x800 0x238>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#pinctrl-cells = <1>;
|
||||
pinctrl-single,register-width = <32>;
|
||||
pinctrl-single,function-mask = <0x7f>;
|
||||
|
|
@ -302,6 +294,12 @@
|
|||
#size-cells = <1>;
|
||||
ranges = <0 0 0x800>;
|
||||
|
||||
phy_gmii_sel: phy-gmii-sel {
|
||||
compatible = "ti,am3352-phy-gmii-sel";
|
||||
reg = <0x650 0x4>;
|
||||
#phy-cells = <2>;
|
||||
};
|
||||
|
||||
scm_clocks: clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -717,7 +715,6 @@
|
|||
interrupts = <40 41 42 43>;
|
||||
ranges = <0 0 0x8000>;
|
||||
syscon = <&scm_conf>;
|
||||
cpsw-phy-sel = <&phy_sel>;
|
||||
status = "disabled";
|
||||
|
||||
davinci_mdio: mdio@1000 {
|
||||
|
|
@ -733,11 +730,13 @@
|
|||
cpsw_emac0: slave@200 {
|
||||
/* Filled in by U-Boot */
|
||||
mac-address = [ 00 00 00 00 00 00 ];
|
||||
phys = <&phy_gmii_sel 1 1>;
|
||||
};
|
||||
|
||||
cpsw_emac1: slave@300 {
|
||||
/* Filled in by U-Boot */
|
||||
mac-address = [ 00 00 00 00 00 00 ];
|
||||
phys = <&phy_gmii_sel 2 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,496 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device tree for Winterland IceBoard
|
||||
*
|
||||
* http://mcgillcosmology.com
|
||||
* http://threespeedlogic.com
|
||||
*
|
||||
* This is an ARM + FPGA instrumentation board used at telescopes in
|
||||
* Antarctica (the South Pole Telescope), Chile (POLARBEAR), and at the DRAO
|
||||
* observatory in British Columbia (CHIME).
|
||||
*
|
||||
* Copyright (c) 2019 Three-Speed Logic, Inc. <gsmecher@threespeedlogic.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "dm814x.dtsi"
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
model = "Winterland IceBoard";
|
||||
compatible = "ti,dm8148", "ti,dm814";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial1:115200n8";
|
||||
bootargs = "earlycon";
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x40000000>; /* 1 GB */
|
||||
};
|
||||
|
||||
vmmcsd_fixed: fixedregulator0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmcsd_fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
/* The MAC provides internal delay for the transmit path ONLY, which is enabled
|
||||
* provided no -id/-txid/-rxid suffix is provided to "phy-mode".
|
||||
*
|
||||
* The receive path is delayed at the PHY. The recommended register settings
|
||||
* are 0xf0 for the control bits, and 0x7777 for the data bits. However, the
|
||||
* conversion code in the kernel lies: the PHY's registers are 120 ps per tap,
|
||||
* and the kernel assumes 200 ps per tap. So we have fudged the numbers here to
|
||||
* obtain the correct register settings.
|
||||
*/
|
||||
&mac { dual_emac = <1>; };
|
||||
&cpsw_emac0 {
|
||||
phy-handle = <ðphy0>;
|
||||
phy-mode = "rgmii";
|
||||
dual_emac_res_vlan = <1>;
|
||||
};
|
||||
&cpsw_emac1 {
|
||||
phy-handle = <ðphy1>;
|
||||
phy-mode = "rgmii";
|
||||
dual_emac_res_vlan = <2>;
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
ethphy0: ethernet-phy@0 {
|
||||
reg = <0x2>;
|
||||
|
||||
rxc-skew-ps = <3000>;
|
||||
rxdv-skew-ps = <0>;
|
||||
|
||||
rxd3-skew-ps = <0>;
|
||||
rxd2-skew-ps = <0>;
|
||||
rxd1-skew-ps = <0>;
|
||||
rxd0-skew-ps = <0>;
|
||||
|
||||
phy-reset-gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
ethphy1: ethernet-phy@1 {
|
||||
reg = <0x1>;
|
||||
|
||||
rxc-skew-ps = <3000>;
|
||||
rxdv-skew-ps = <0>;
|
||||
|
||||
rxd3-skew-ps = <0>;
|
||||
rxd2-skew-ps = <0>;
|
||||
rxd1-skew-ps = <0>;
|
||||
rxd0-skew-ps = <0>;
|
||||
|
||||
phy-reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 { status = "disabled"; };
|
||||
&mmc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
vmmc-supply = <&vmmcsd_fixed>;
|
||||
bus-width = <4>;
|
||||
};
|
||||
&mmc3 { status = "disabled"; };
|
||||
|
||||
&i2c1 {
|
||||
/* Most I2C activity happens through this port, with the sole exception
|
||||
* of the backplane. Since there are multiply assigned addresses, the
|
||||
* "i2c-mux-idle-disconnect" is important.
|
||||
*/
|
||||
|
||||
pca9548@70 {
|
||||
compatible = "nxp,pca9548";
|
||||
reg = <0x70>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
i2c@0 {
|
||||
/* FMC A */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
i2c-mux-idle-disconnect;
|
||||
};
|
||||
|
||||
i2c@1 {
|
||||
/* FMC B */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
i2c-mux-idle-disconnect;
|
||||
};
|
||||
|
||||
i2c@2 {
|
||||
/* QSFP A */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <2>;
|
||||
i2c-mux-idle-disconnect;
|
||||
};
|
||||
|
||||
i2c@3 {
|
||||
/* QSFP B */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <3>;
|
||||
i2c-mux-idle-disconnect;
|
||||
};
|
||||
|
||||
i2c@4 {
|
||||
/* SFP */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <4>;
|
||||
i2c-mux-idle-disconnect;
|
||||
};
|
||||
|
||||
i2c@5 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <5>;
|
||||
i2c-mux-idle-disconnect;
|
||||
|
||||
ina230@40 { compatible = "ti,ina230"; reg = <0x40>; shunt-resistor = <5000>; };
|
||||
ina230@41 { compatible = "ti,ina230"; reg = <0x41>; shunt-resistor = <5000>; };
|
||||
ina230@42 { compatible = "ti,ina230"; reg = <0x42>; shunt-resistor = <5000>; };
|
||||
|
||||
ina230@44 { compatible = "ti,ina230"; reg = <0x44>; shunt-resistor = <5000>; };
|
||||
ina230@45 { compatible = "ti,ina230"; reg = <0x45>; shunt-resistor = <5000>; };
|
||||
ina230@46 { compatible = "ti,ina230"; reg = <0x46>; shunt-resistor = <5000>; };
|
||||
|
||||
ina230@47 { compatible = "ti,ina230"; reg = <0x47>; shunt-resistor = <5500>; };
|
||||
ina230@48 { compatible = "ti,ina230"; reg = <0x48>; shunt-resistor = <2360>; };
|
||||
ina230@49 { compatible = "ti,ina230"; reg = <0x49>; shunt-resistor = <2360>; };
|
||||
ina230@43 { compatible = "ti,ina230"; reg = <0x43>; shunt-resistor = <2360>; };
|
||||
ina230@4b { compatible = "ti,ina230"; reg = <0x4b>; shunt-resistor = <5500>; };
|
||||
ina230@4c { compatible = "ti,ina230"; reg = <0x4c>; shunt-resistor = <2360>; };
|
||||
ina230@4d { compatible = "ti,ina230"; reg = <0x4d>; shunt-resistor = <770>; };
|
||||
ina230@4e { compatible = "ti,ina230"; reg = <0x4e>; shunt-resistor = <770>; };
|
||||
ina230@4f { compatible = "ti,ina230"; reg = <0x4f>; shunt-resistor = <770>; };
|
||||
};
|
||||
|
||||
i2c@6 {
|
||||
/* Backplane */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <6>;
|
||||
i2c-mux-idle-disconnect;
|
||||
};
|
||||
|
||||
i2c@7 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <7>;
|
||||
i2c-mux-idle-disconnect;
|
||||
|
||||
u41: pca9575@20 {
|
||||
compatible = "nxp,pca9575";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
gpio-line-names =
|
||||
"FMCA_EN_12V0", "FMCA_EN_3V3", "FMCA_EN_VADJ", "FMCA_PG_M2C",
|
||||
"FMCA_PG_C2M", "FMCA_PRSNT_M2C_L", "FMCA_CLK_DIR", "SFP_LOS",
|
||||
"FMCB_EN_12V0", "FMCB_EN_3V3", "FMCB_EN_VADJ", "FMCB_PG_M2C",
|
||||
"FMCB_PG_C2M", "FMCB_PRSNT_M2C_L", "FMCB_CLK_DIR", "SFP_ModPrsL";
|
||||
reset_gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
u42: pca9575@21 {
|
||||
compatible = "nxp,pca9575";
|
||||
reg = <0x21>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-line-names =
|
||||
"QSFPA_ModPrsL", "QSFPA_IntL", "QSFPA_ResetL", "QSFPA_ModSelL",
|
||||
"QSFPA_LPMode", "QSFPB_ModPrsL", "QSFPB_IntL", "QSFPB_ResetL",
|
||||
"SFP_TxFault", "SFP_TxDisable", "SFP_RS0", "SFP_RS1",
|
||||
"QSFPB_ModSelL", "QSFPB_LPMode", "SEL_SFP", "ARM_MR";
|
||||
reset_gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
u48: pca9575@22 {
|
||||
compatible = "nxp,pca9575";
|
||||
reg=<0x22>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
sw-gpios = <&u48 0 0>, <&u48 1 0>, <&u48 2 0>, <&u48 3 0>,
|
||||
<&u48 4 0>, <&u48 5 0>, <&u48 6 0>, <&u48 7 0>;
|
||||
led-gpios = <&u48 7 0>, <&u48 6 0>, <&u48 5 0>, <&u48 4 0>,
|
||||
<&u48 3 0>, <&u48 2 0>, <&u48 1 0>, <&u48 0 0>;
|
||||
|
||||
gpio-line-names =
|
||||
"GP_SW1", "GP_SW2", "GP_SW3", "GP_SW4",
|
||||
"GP_SW5", "GP_SW6", "GP_SW7", "GP_SW8",
|
||||
"GP_LED8", "GP_LED7", "GP_LED6", "GP_LED5",
|
||||
"GP_LED4", "GP_LED3", "GP_LED2", "GP_LED1";
|
||||
reset_gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
u59: pca9575@23 {
|
||||
compatible = "nxp,pca9575";
|
||||
reg=<0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-line-names =
|
||||
"GP_LED9", "GP_LED10", "GP_LED11", "GP_LED12",
|
||||
"GTX1V8PowerFault", "PHYAPowerFault", "PHYBPowerFault", "ArmPowerFault",
|
||||
"BP_SLOW_GPIO0", "BP_SLOW_GPIO1", "BP_SLOW_GPIO2", "BP_SLOW_GPIO3",
|
||||
"BP_SLOW_GPIO4", "BP_SLOW_GPIO5", "__unused_u59_p16", "__unused_u59_p17";
|
||||
reset_gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
tmp100@48 { compatible = "ti,tmp100"; reg = <0x48>; };
|
||||
tmp100@4a { compatible = "ti,tmp100"; reg = <0x4a>; };
|
||||
tmp100@4b { compatible = "ti,tmp100"; reg = <0x4b>; };
|
||||
tmp100@4c { compatible = "ti,tmp100"; reg = <0x4c>; };
|
||||
|
||||
/* EEPROM bank and serial number are treated as separate devices */
|
||||
at24c01@57 { compatible = "atmel,24c01"; reg = <0x57>; };
|
||||
at24cs01@5f { compatible = "atmel,24cs01"; reg = <0x5f>; };
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pca9548@71 {
|
||||
compatible = "nxp,pca9548";
|
||||
reg = <0x71>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
i2c@6 {
|
||||
/* Backplane */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <6>;
|
||||
multi-master;
|
||||
|
||||
/* All backplanes should have this -- it's how we know they're there. */
|
||||
at24c08@54 { compatible="atmel,24c08"; reg=<0x54>; };
|
||||
at24cs08@5c { compatible="atmel,24cs08"; reg=<0x5c>; };
|
||||
|
||||
/* 16 slot backplane */
|
||||
tmp421@4d { compatible="ti,tmp421"; reg=<0x4d>; };
|
||||
tmp421@4e { compatible="ti,tmp421"; reg=<0x4e>; };
|
||||
ina230@40 { compatible = "ti,ina230"; reg = <0x40>; shunt-resistor = <2360>; };
|
||||
amc6821@18 { compatible = "ti,amc6821"; reg = <0x18>; };
|
||||
|
||||
/* Single slot backplane */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pincntl {
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
DM814X_IOPAD(0x0800, PIN_INPUT | 0x1) /* SD1_CLK */
|
||||
DM814X_IOPAD(0x0804, PIN_INPUT_PULLUP | 0x1) /* SD1_CMD */
|
||||
DM814X_IOPAD(0x0808, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[0] */
|
||||
DM814X_IOPAD(0x080c, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[1] */
|
||||
DM814X_IOPAD(0x0810, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[2] */
|
||||
DM814X_IOPAD(0x0814, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[3] */
|
||||
DM814X_IOPAD(0x0924, PIN_INPUT_PULLUP | 0x40) /* SD1_POW */
|
||||
DM814X_IOPAD(0x0928, PIN_INPUT | 0x40) /* SD1_SDWP */
|
||||
DM814X_IOPAD(0x093C, PIN_INPUT | 0x2) /* SD1_SDCD */
|
||||
>;
|
||||
};
|
||||
|
||||
usb0_pins: pinmux_usb0_pins {
|
||||
pinctrl-single,pins = <
|
||||
DM814X_IOPAD(0x0c34, PIN_OUTPUT | 0x1) /* USB0_DRVVBUS */
|
||||
>;
|
||||
};
|
||||
|
||||
usb1_pins: pinmux_usb1_pins {
|
||||
pinctrl-single,pins = <
|
||||
DM814X_IOPAD(0x0834, PIN_OUTPUT | 0x80) /* USB1_DRVVBUS */
|
||||
>;
|
||||
};
|
||||
|
||||
gpio1_pins: pinmux_gpio1_pins {
|
||||
pinctrl-single,pins = <
|
||||
DM814X_IOPAD(0x081c, PIN_OUTPUT | 0x80) /* PROGRAM_B */
|
||||
DM814X_IOPAD(0x0820, PIN_INPUT | 0x80) /* INIT_B */
|
||||
DM814X_IOPAD(0x0824, PIN_INPUT | 0x80) /* DONE */
|
||||
|
||||
DM814X_IOPAD(0x0838, PIN_INPUT_PULLUP | 0x80) /* FMCA_TMS */
|
||||
DM814X_IOPAD(0x083c, PIN_INPUT_PULLUP | 0x80) /* FMCA_TCK */
|
||||
DM814X_IOPAD(0x0898, PIN_INPUT_PULLUP | 0x80) /* FMCA_TDO */
|
||||
DM814X_IOPAD(0x089c, PIN_INPUT_PULLUP | 0x80) /* FMCA_TDI */
|
||||
DM814X_IOPAD(0x08ac, PIN_INPUT_PULLUP | 0x80) /* FMCA_TRST */
|
||||
|
||||
DM814X_IOPAD(0x08b0, PIN_INPUT_PULLUP | 0x80) /* FMCB_TMS */
|
||||
DM814X_IOPAD(0x0a88, PIN_INPUT_PULLUP | 0x80) /* FMCB_TCK */
|
||||
DM814X_IOPAD(0x0a8c, PIN_INPUT_PULLUP | 0x80) /* FMCB_TDO */
|
||||
DM814X_IOPAD(0x08bc, PIN_INPUT_PULLUP | 0x80) /* FMCB_TDI */
|
||||
DM814X_IOPAD(0x0a94, PIN_INPUT_PULLUP | 0x80) /* FMCB_TRST */
|
||||
|
||||
DM814X_IOPAD(0x08d4, PIN_INPUT_PULLUP | 0x80) /* FPGA_TMS */
|
||||
DM814X_IOPAD(0x0aa8, PIN_INPUT_PULLUP | 0x80) /* FPGA_TCK */
|
||||
DM814X_IOPAD(0x0adc, PIN_INPUT_PULLUP | 0x80) /* FPGA_TDO */
|
||||
DM814X_IOPAD(0x0ab0, PIN_INPUT_PULLUP | 0x80) /* FPGA_TDI */
|
||||
>;
|
||||
};
|
||||
|
||||
gpio2_pins: pinmux_gpio2_pins {
|
||||
pinctrl-single,pins = <
|
||||
DM814X_IOPAD(0x090c, PIN_INPUT_PULLUP | 0x80) /* PHY A IRQ */
|
||||
DM814X_IOPAD(0x0910, PIN_INPUT_PULLUP | 0x80) /* PHY A RESET */
|
||||
DM814X_IOPAD(0x08f4, PIN_INPUT_PULLUP | 0x80) /* PHY B IRQ */
|
||||
DM814X_IOPAD(0x08f8, PIN_INPUT_PULLUP | 0x80) /* PHY B RESET */
|
||||
|
||||
//DM814X_IOPAD(0x0a14, PIN_INPUT_PULLUP | 0x80) /* ARM IRQ */
|
||||
//DM814X_IOPAD(0x0900, PIN_INPUT | 0x80) /* GPIO IRQ */
|
||||
DM814X_IOPAD(0x0a2c, PIN_INPUT_PULLUP | 0x80) /* GPIO RESET */
|
||||
>;
|
||||
};
|
||||
|
||||
gpio4_pins: pinmux_gpio4_pins {
|
||||
pinctrl-single,pins = <
|
||||
/* The PLL doesn't react well to the SPI controller reset, so
|
||||
* we force the CS lines to pull up as GPIOs until we're ready.
|
||||
* See https://e2e.ti.com/support/processors/f/791/t/276011?Linux-support-for-AM3874-DM8148-in-Arago-linux-omap3
|
||||
*/
|
||||
DM814X_IOPAD(0x0b3c, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO0 */
|
||||
DM814X_IOPAD(0x0b40, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO1 */
|
||||
DM814X_IOPAD(0x0b44, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO2 */
|
||||
DM814X_IOPAD(0x0b48, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO3 */
|
||||
DM814X_IOPAD(0x0b4c, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO4 */
|
||||
DM814X_IOPAD(0x0b50, PIN_INPUT_PULLUP | 0x80) /* BP_ARM_GPIO5 */
|
||||
>;
|
||||
};
|
||||
|
||||
spi2_pins: pinmux_spi2_pins {
|
||||
pinctrl-single,pins = <
|
||||
DM814X_IOPAD(0x0950, PIN_INPUT_PULLUP | 0x80) /* PLL SPI CS1 as GPIO */
|
||||
DM814X_IOPAD(0x0818, PIN_INPUT_PULLUP | 0x80) /* PLL SPI CS2 as GPIO */
|
||||
>;
|
||||
};
|
||||
|
||||
spi4_pins: pinmux_spi4_pins {
|
||||
pinctrl-single,pins = <
|
||||
DM814X_IOPAD(0x0a7c, 0x20)
|
||||
DM814X_IOPAD(0x0b74, 0x20)
|
||||
DM814X_IOPAD(0x0b78, PIN_OUTPUT | 0x20)
|
||||
DM814X_IOPAD(0x0b7c, PIN_OUTPUT_PULLDOWN | 0x20)
|
||||
DM814X_IOPAD(0x0b80, PIN_INPUT | 0x20)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio1_pins>;
|
||||
gpio-line-names =
|
||||
"", "PROGRAM_B", "INIT_B", "DONE", /* 0-3 */
|
||||
"", "", "", "", /* 4-7 */
|
||||
"FMCA_TMS", "FMCA_TCK", "FMCA_TDO", "FMCA_TDI", /* 8-11 */
|
||||
"", "", "", "FMCA_TRST", /* 12-15 */
|
||||
"FMCB_TMS", "FMCB_TCK", "FMCB_TDO", "FMCB_TDI", /* 16-19 */
|
||||
"FMCB_TRST", "", "", "", /* 20-23 */
|
||||
"FPGA_TMS", "FPGA_TCK", "FPGA_TDO", "FPGA_TDI", /* 24-27 */
|
||||
"", "", "", ""; /* 28-31 */
|
||||
};
|
||||
|
||||
&gpio2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio2_pins>;
|
||||
gpio-line-names =
|
||||
"PHYA_IRQ_N", "PHYA_RESET_N", "", "", /* 0-3 */
|
||||
"", "", "", "PHYB_IRQ_N", /* 4-7 */
|
||||
"PHYB_RESET_N", "ARM_IRQ", "GPIO_IRQ", ""; /* 8-11 */
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
pinctrl-names = "default";
|
||||
/*pinctrl-0 = <&gpio3_pins>;*/
|
||||
gpio-line-names =
|
||||
"", "", "ARMClkSel0", "", /* 0-3 */
|
||||
"EnFPGARef", "", "", "ARMClkSel1"; /* 4-7 */
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio4_pins>;
|
||||
gpio-line-names =
|
||||
"BP_ARM_GPIO0", "BP_ARM_GPIO1", "BP_ARM_GPIO2", "BP_ARM_GPIO3",
|
||||
"BP_ARM_GPIO4", "BP_ARM_GPIO5";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb0_pins>;
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb1_pins>;
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&mcspi1 {
|
||||
s25fl256@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>;
|
||||
|
||||
fsbl@0 {
|
||||
/* 256 kB */
|
||||
label = "U-Boot-min";
|
||||
reg = <0 0x40000>;
|
||||
};
|
||||
ssbl@1 {
|
||||
/* 512 kB */
|
||||
label = "U-Boot";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
bootenv@2 {
|
||||
/* 256 kB */
|
||||
label = "U-Boot Env";
|
||||
reg = <0xc0000 0x40000>;
|
||||
};
|
||||
kernel@3 {
|
||||
/* 4 MB */
|
||||
label = "Kernel";
|
||||
reg = <0x100000 0x400000>;
|
||||
};
|
||||
ipmi@4 {
|
||||
label = "IPMI FRU";
|
||||
reg = <0x500000 0x40000>;
|
||||
};
|
||||
fs@5 {
|
||||
label = "File System";
|
||||
reg = <0x540000 0x1ac0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mcspi3 {
|
||||
/* DMA event numbers stolen from MCASP */
|
||||
dmas = <&edma_xbar 8 0 16 &edma_xbar 9 0 17
|
||||
&edma_xbar 10 0 18 &edma_xbar 11 0 19>;
|
||||
dma-names = "tx0", "rx0", "tx1", "rx1";
|
||||
};
|
||||
|
||||
&mcspi4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi4_pins>;
|
||||
|
||||
/* DMA event numbers stolen from MCASP, MCBSP */
|
||||
dmas = <&edma_xbar 12 0 20 &edma_xbar 13 0 21>;
|
||||
dma-names = "tx0", "rx0";
|
||||
};
|
||||
|
|
@ -71,7 +71,7 @@
|
|||
pinctrl-0 = <&matrix_keypad_default>;
|
||||
pinctrl-1 = <&matrix_keypad_sleep>;
|
||||
|
||||
linux,wakeup;
|
||||
wakeup-source;
|
||||
|
||||
row-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH /* Bank0, pin3 */
|
||||
&gpio4 3 GPIO_ACTIVE_HIGH /* Bank4, pin3 */
|
||||
|
|
|
|||
|
|
@ -280,12 +280,6 @@
|
|||
#size-cells = <1>;
|
||||
ranges = <0 0 0x4000>;
|
||||
|
||||
phy_sel: cpsw-phy-sel@650 {
|
||||
compatible = "ti,am43xx-cpsw-phy-sel";
|
||||
reg= <0x650 0x4>;
|
||||
reg-names = "gmii-sel";
|
||||
};
|
||||
|
||||
am43xx_pinmux: pinmux@800 {
|
||||
compatible = "ti,am437-padconf",
|
||||
"pinctrl-single";
|
||||
|
|
@ -300,11 +294,17 @@
|
|||
};
|
||||
|
||||
scm_conf: scm_conf@0 {
|
||||
compatible = "syscon";
|
||||
compatible = "syscon", "simple-bus";
|
||||
reg = <0x0 0x800>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
phy_gmii_sel: phy-gmii-sel {
|
||||
compatible = "ti,am43xx-phy-gmii-sel";
|
||||
reg = <0x650 0x4>;
|
||||
#phy-cells = <2>;
|
||||
};
|
||||
|
||||
scm_clocks: clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -555,7 +555,6 @@
|
|||
cpts_clock_shift = <29>;
|
||||
ranges = <0 0 0x8000>;
|
||||
syscon = <&scm_conf>;
|
||||
cpsw-phy-sel = <&phy_sel>;
|
||||
|
||||
davinci_mdio: mdio@1000 {
|
||||
compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio";
|
||||
|
|
@ -572,11 +571,13 @@
|
|||
cpsw_emac0: slave@200 {
|
||||
/* Filled in by U-Boot */
|
||||
mac-address = [ 00 00 00 00 00 00 ];
|
||||
phys = <&phy_gmii_sel 1 0>;
|
||||
};
|
||||
|
||||
cpsw_emac1: slave@300 {
|
||||
/* Filled in by U-Boot */
|
||||
mac-address = [ 00 00 00 00 00 00 ];
|
||||
phys = <&phy_gmii_sel 2 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -584,10 +584,7 @@
|
|||
&cpsw_emac0 {
|
||||
phy-handle = <ðphy0>;
|
||||
phy-mode = "rmii";
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
rmii-clock-ext;
|
||||
phys = <&phy_gmii_sel 1 1>;
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
|
|
|
|||
|
|
@ -22,9 +22,10 @@
|
|||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "arm,realview-eb";
|
||||
|
||||
chosen { };
|
||||
|
|
@ -38,6 +39,7 @@
|
|||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
/* 128 MiB memory @ 0x0 */
|
||||
reg = <0x00000000 0x08000000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -23,9 +23,10 @@
|
|||
/dts-v1/;
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "ARM RealView PB1176";
|
||||
compatible = "arm,realview-pb1176";
|
||||
|
||||
|
|
@ -40,6 +41,7 @@
|
|||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
/* 128 MiB memory @ 0x0 */
|
||||
reg = <0x00000000 0x08000000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -23,9 +23,10 @@
|
|||
/dts-v1/;
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "ARM RealView PB11MPcore";
|
||||
compatible = "arm,realview-pb11mp";
|
||||
|
||||
|
|
@ -39,6 +40,7 @@
|
|||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
/*
|
||||
* The PB11MPCore has 512 MiB memory @ 0x70000000
|
||||
* and the first 256 are also remapped @ 0x00000000
|
||||
|
|
|
|||
|
|
@ -22,9 +22,10 @@
|
|||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "arm,realview-pbx";
|
||||
|
||||
chosen { };
|
||||
|
|
@ -39,6 +40,7 @@
|
|||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
/* 128 MiB memory @ 0x0 */
|
||||
reg = <0x00000000 0x08000000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -114,48 +114,6 @@
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
dsa {
|
||||
status = "disabled";
|
||||
|
||||
compatible = "marvell,dsa";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dsa,ethernet = <ð1>;
|
||||
dsa,mii-bus = <&mdio>;
|
||||
|
||||
switch@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x10 0>; /* MDIO address 16, switch 0 in tree */
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan0";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
|
|
|
|||
|
|
@ -30,64 +30,6 @@
|
|||
};
|
||||
};
|
||||
|
||||
dsa@0 {
|
||||
status = "disabled";
|
||||
|
||||
compatible = "marvell,dsa";
|
||||
dsa,ethernet = <ð1>;
|
||||
dsa,mii-bus = <&mdio>;
|
||||
pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
|
||||
pinctrl-names = "default";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <4 0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan5";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
};
|
||||
|
||||
port@6 {
|
||||
/* 88E1512 external phy */
|
||||
reg = <6>;
|
||||
label = "lan6";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-0 = <&rear_button_pins>;
|
||||
|
|
|
|||
|
|
@ -9,13 +9,15 @@
|
|||
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
model = "Marvell Armada 38x family SoC";
|
||||
compatible = "marvell,armada380";
|
||||
|
||||
|
|
|
|||
|
|
@ -7,13 +7,14 @@
|
|||
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "Marvell Armada 39x family SoC";
|
||||
compatible = "marvell,armada390";
|
||||
|
||||
|
|
|
|||
|
|
@ -210,53 +210,6 @@
|
|||
compatible = "pwm-fan";
|
||||
pwms = <&gpio0 24 4000>;
|
||||
};
|
||||
|
||||
dsa {
|
||||
status = "disabled";
|
||||
|
||||
compatible = "marvell,dsa";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dsa,ethernet = <ð0>;
|
||||
dsa,mii-bus = <&mdio>;
|
||||
|
||||
switch@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "internet";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
|
|
|
|||
|
|
@ -43,9 +43,10 @@
|
|||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/dma/nbpfaxi.h>
|
||||
#include <dt-bindings/clock/axis,artpec6-clkctrl.h>
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "axis,artpec6";
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
|
|
|
|||
|
|
@ -173,6 +173,16 @@
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
dps650ab@58 {
|
||||
compatible = "delta,dps650ab";
|
||||
reg = <0x58>;
|
||||
};
|
||||
|
||||
dps650ab@59 {
|
||||
compatible = "delta,dps650ab";
|
||||
reg = <0x59>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c9 {
|
||||
|
|
|
|||
|
|
@ -21,6 +21,17 @@
|
|||
memory@80000000 {
|
||||
reg = <0x80000000 0x20000000>;
|
||||
};
|
||||
|
||||
iio-hwmon {
|
||||
compatible = "iio-hwmon";
|
||||
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
|
||||
<&adc 4>, <&adc 5>, <&adc 6>;
|
||||
};
|
||||
|
||||
iio-hwmon-battery {
|
||||
compatible = "iio-hwmon";
|
||||
io-channels = <&adc 7>;
|
||||
};
|
||||
};
|
||||
|
||||
&fmc {
|
||||
|
|
@ -43,6 +54,16 @@
|
|||
};
|
||||
};
|
||||
|
||||
&lpc_snoop {
|
||||
status = "okay";
|
||||
snoop-ports = <0x80>;
|
||||
};
|
||||
|
||||
&lpc_ctrl {
|
||||
// Enable lpc clock
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
// Host Console
|
||||
status = "okay";
|
||||
|
|
@ -51,11 +72,33 @@
|
|||
&pinctrl_rxd1_default>;
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
// SoL Host Console
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
// SoL BMC Console
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
// BMC Console
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&kcs2 {
|
||||
// BMC KCS channel 2
|
||||
status = "okay";
|
||||
kcs_addr = <0xca8>;
|
||||
};
|
||||
|
||||
&kcs3 {
|
||||
// BMC KCS channel 3
|
||||
status = "okay";
|
||||
kcs_addr = <0xca2>;
|
||||
};
|
||||
|
||||
&mac0 {
|
||||
status = "okay";
|
||||
|
||||
|
|
@ -64,6 +107,10 @@
|
|||
use-ncsi;
|
||||
};
|
||||
|
||||
&adc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
//Airmax Conn B, CPU0 PIROM, CPU1 PIROM
|
||||
|
|
@ -122,6 +169,10 @@
|
|||
|
||||
&i2c8 {
|
||||
status = "okay";
|
||||
tmp421@1f {
|
||||
compatible = "ti,tmp421";
|
||||
reg = <0x1f>;
|
||||
};
|
||||
//Mezz Sensor SMBus
|
||||
};
|
||||
|
||||
|
|
@ -140,7 +191,7 @@
|
|||
};
|
||||
|
||||
fan@1 {
|
||||
reg = <0x00>;
|
||||
aspeed,fan-tach-ch = /bits/ 8 <0x01>;
|
||||
reg = <0x01>;
|
||||
aspeed,fan-tach-ch = /bits/ 8 <0x02>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,145 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
// Copyright (c) 2018 Inspur Corporation
|
||||
/dts-v1/;
|
||||
|
||||
#include "aspeed-g5.dtsi"
|
||||
#include <dt-bindings/gpio/aspeed-gpio.h>
|
||||
|
||||
/ {
|
||||
model = "ON5263M5 BMC";
|
||||
compatible = "inspur,on5263m5-bmc", "aspeed,ast2500";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart5;
|
||||
bootargs = "earlyprintk";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x80000000 0x20000000>;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
vga_memory: framebuffer@9f000000 {
|
||||
no-map;
|
||||
reg = <0x9f000000 0x01000000>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
bmc_alive {
|
||||
label = "bmc_alive";
|
||||
gpios = <&gpio ASPEED_GPIO(I, 1) GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
};
|
||||
|
||||
iio-hwmon {
|
||||
compatible = "iio-hwmon";
|
||||
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
|
||||
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&fmc {
|
||||
status = "okay";
|
||||
flash@0 {
|
||||
status = "okay";
|
||||
m25p,fast-read;
|
||||
label = "bmc";
|
||||
#include "openbmc-flash-layout.dtsi"
|
||||
};
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1_default>;
|
||||
|
||||
flash@0 {
|
||||
status = "okay";
|
||||
m25p,fast-read;
|
||||
label = "pnor";
|
||||
};
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mac0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_rmii1_default>;
|
||||
use-ncsi;
|
||||
};
|
||||
|
||||
&mac1 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
|
||||
};
|
||||
|
||||
&i2c6 {
|
||||
status = "okay";
|
||||
|
||||
tmp421@4e {
|
||||
compatible = "ti,tmp421";
|
||||
reg = <0x4e>;
|
||||
};
|
||||
|
||||
tmp112@48 {
|
||||
compatible = "ti,tmp112";
|
||||
reg = <0x48>;
|
||||
};
|
||||
|
||||
eeprom@54 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x54>;
|
||||
pagesize = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c7 {
|
||||
status = "okay";
|
||||
|
||||
adm1278@11 {
|
||||
compatible = "adi,adm1278";
|
||||
reg = <0x11>;
|
||||
};
|
||||
};
|
||||
|
||||
&gfx {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
aspeed,external-nodes = <&gfx &lhc>;
|
||||
};
|
||||
|
||||
&pwm_tacho {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
|
||||
|
||||
fan@0 {
|
||||
reg = <0x00>;
|
||||
aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;
|
||||
};
|
||||
|
||||
fan@1 {
|
||||
reg = <0x01>;
|
||||
aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;
|
||||
};
|
||||
};
|
||||
|
||||
&adc {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -169,6 +169,11 @@
|
|||
|
||||
&i2c3 {
|
||||
status = "okay";
|
||||
|
||||
occ-hwmon@50 {
|
||||
compatible = "ibm,p8-occ-hwmon";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
|
|
|
|||
|
|
@ -116,6 +116,10 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&lpc_ctrl {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&lpc_snoop {
|
||||
status = "okay";
|
||||
snoop-ports = <0x80>;
|
||||
|
|
@ -134,6 +138,10 @@
|
|||
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -197,6 +197,7 @@
|
|||
gpio-ranges = <&pinctrl 0 0 220>;
|
||||
clocks = <&syscon ASPEED_CLK_APB>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
timer: timer@1e782000 {
|
||||
|
|
|
|||
|
|
@ -250,6 +250,7 @@
|
|||
gpio-ranges = <&pinctrl 0 0 220>;
|
||||
clocks = <&syscon ASPEED_CLK_APB>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
timer: timer@1e782000 {
|
||||
|
|
@ -330,8 +331,32 @@
|
|||
ranges = <0x0 0x1e789000 0x1000>;
|
||||
|
||||
lpc_bmc: lpc-bmc@0 {
|
||||
compatible = "aspeed,ast2500-lpc-bmc";
|
||||
compatible = "aspeed,ast2500-lpc-bmc", "simple-mfd", "syscon";
|
||||
reg = <0x0 0x80>;
|
||||
reg-io-width = <4>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x0 0x80>;
|
||||
|
||||
kcs1: kcs1@0 {
|
||||
compatible = "aspeed,ast2500-kcs-bmc";
|
||||
interrupts = <8>;
|
||||
kcs_chan = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
kcs2: kcs2@0 {
|
||||
compatible = "aspeed,ast2500-kcs-bmc";
|
||||
interrupts = <8>;
|
||||
kcs_chan = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
kcs3: kcs3@0 {
|
||||
compatible = "aspeed,ast2500-kcs-bmc";
|
||||
interrupts = <8>;
|
||||
kcs_chan = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
lpc_host: lpc-host@80 {
|
||||
|
|
@ -343,6 +368,13 @@
|
|||
#size-cells = <1>;
|
||||
ranges = <0x0 0x80 0x1e0>;
|
||||
|
||||
kcs4: kcs4@0 {
|
||||
compatible = "aspeed,ast2500-kcs-bmc";
|
||||
interrupts = <8>;
|
||||
kcs_chan = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
lpc_ctrl: lpc-ctrl@0 {
|
||||
compatible = "aspeed,ast2500-lpc-ctrl";
|
||||
reg = <0x0 0x80>;
|
||||
|
|
|
|||
|
|
@ -22,7 +22,7 @@
|
|||
wakeup {
|
||||
label = "Wakeup";
|
||||
linux,code = <10>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
gpios = <&pioB 27 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -62,6 +62,20 @@
|
|||
|
||||
ahb {
|
||||
apb {
|
||||
qspi1: spi@f0024000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_qspi1_default>;
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <80000000>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-rx-bus-width = <4>;
|
||||
m25p,fast-read;
|
||||
};
|
||||
};
|
||||
|
||||
macb0: ethernet@f8008000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb0_default>;
|
||||
|
|
@ -78,6 +92,22 @@
|
|||
|
||||
pinctrl@fc038000 {
|
||||
|
||||
pinctrl_qspi1_default: qspi1_default {
|
||||
sck_cs {
|
||||
pinmux = <PIN_PB5__QSPI1_SCK>,
|
||||
<PIN_PB6__QSPI1_CS>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
data {
|
||||
pinmux = <PIN_PB7__QSPI1_IO0>,
|
||||
<PIN_PB8__QSPI1_IO1>,
|
||||
<PIN_PB9__QSPI1_IO2>,
|
||||
<PIN_PB10__QSPI1_IO3>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_macb0_default: macb0_default {
|
||||
pinmux = <PIN_PD9__GTXCK>,
|
||||
<PIN_PD10__GTXEN>,
|
||||
|
|
|
|||
|
|
@ -109,6 +109,10 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
qspi1: spi@f0024000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
spi0: spi@f8000000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0_default>;
|
||||
|
|
|
|||
|
|
@ -22,7 +22,7 @@
|
|||
label = "IRQBTN";
|
||||
linux,code = <99>;
|
||||
gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
|
||||
gpio-key,wakeup = <1>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@
|
|||
label = "BTNESC";
|
||||
linux,code = <1>; /* ESC button */
|
||||
gpios = <&pioA 10 GPIO_ACTIVE_LOW>;
|
||||
gpio-key,wakeup = <1>;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
irqbtn@31 {
|
||||
|
|
@ -31,7 +31,7 @@
|
|||
label = "IRQBTN";
|
||||
linux,code = <99>; /* SysReq button */
|
||||
gpios = <&pioE 31 GPIO_ACTIVE_LOW>;
|
||||
gpio-key,wakeup = <1>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -10,13 +10,14 @@
|
|||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/clock/at91.h>
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "Atmel AT91RM9200 family SoC";
|
||||
compatible = "atmel,at91rm9200";
|
||||
interrupt-parent = <&aic>;
|
||||
|
|
@ -49,6 +50,7 @@
|
|||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x20000000 0x04000000>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -8,13 +8,14 @@
|
|||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/clock/at91.h>
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "Atmel AT91SAM9260 family SoC";
|
||||
compatible = "atmel,at91sam9260";
|
||||
interrupt-parent = <&aic>;
|
||||
|
|
@ -46,6 +47,7 @@
|
|||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x20000000 0x04000000>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -6,13 +6,14 @@
|
|||
* Licensed under GPLv2 only.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/clock/at91.h>
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "Atmel AT91SAM9261 family SoC";
|
||||
compatible = "atmel,at91sam9261";
|
||||
interrupt-parent = <&aic>;
|
||||
|
|
@ -43,6 +44,7 @@
|
|||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x20000000 0x08000000>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -6,13 +6,14 @@
|
|||
* Licensed under GPLv2 only.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/clock/at91.h>
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "Atmel AT91SAM9263 family SoC";
|
||||
compatible = "atmel,at91sam9263";
|
||||
interrupt-parent = <&aic>;
|
||||
|
|
@ -45,6 +46,7 @@
|
|||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x20000000 0x08000000>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -9,7 +9,6 @@
|
|||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/dma/at91.h>
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
|
@ -17,6 +16,8 @@
|
|||
#include <dt-bindings/clock/at91.h>
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "Atmel AT91SAM9G45 family SoC";
|
||||
compatible = "atmel,at91sam9g45";
|
||||
interrupt-parent = <&aic>;
|
||||
|
|
@ -51,6 +52,7 @@
|
|||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x70000000 0x10000000>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -7,7 +7,6 @@
|
|||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/dma/at91.h>
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
|
@ -15,6 +14,8 @@
|
|||
#include <dt-bindings/clock/at91.h>
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "Atmel AT91SAM9N12 SoC";
|
||||
compatible = "atmel,at91sam9n12";
|
||||
interrupt-parent = <&aic>;
|
||||
|
|
@ -47,6 +48,7 @@
|
|||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x20000000 0x10000000>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -7,7 +7,6 @@
|
|||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/clock/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
|
@ -15,6 +14,8 @@
|
|||
#include <dt-bindings/pwm/pwm.h>
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "Atmel AT91SAM9RL family SoC";
|
||||
compatible = "atmel,at91sam9rl", "atmel,at91sam9";
|
||||
interrupt-parent = <&aic>;
|
||||
|
|
@ -48,6 +49,7 @@
|
|||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x20000000 0x04000000>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -9,7 +9,6 @@
|
|||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/dma/at91.h>
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
|
@ -17,6 +16,8 @@
|
|||
#include <dt-bindings/clock/at91.h>
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "Atmel AT91SAM9x5 family SoC";
|
||||
compatible = "atmel,at91sam9x5";
|
||||
interrupt-parent = <&aic>;
|
||||
|
|
@ -49,6 +50,7 @@
|
|||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x20000000 0x10000000>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@
|
|||
compatible = "sirf,atlas6-cb", "sirf,atlas6";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -6,7 +6,6 @@
|
|||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/include/ "skeleton.dtsi"
|
||||
/ {
|
||||
compatible = "sirf,atlas6";
|
||||
#address-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -6,7 +6,6 @@
|
|||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/include/ "skeleton.dtsi"
|
||||
/ {
|
||||
compatible = "sirf,atlas7";
|
||||
#address-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -12,9 +12,9 @@
|
|||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/lsi,axm5516-clks.h>
|
||||
|
||||
#include "skeleton64.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&gic>;
|
||||
|
||||
aliases {
|
||||
|
|
|
|||
|
|
@ -34,9 +34,9 @@
|
|||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/clock/bcm-cygnus.h>
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "brcm,cygnus";
|
||||
model = "Broadcom Cygnus SoC";
|
||||
interrupt-parent = <&gic>;
|
||||
|
|
@ -45,6 +45,11 @@
|
|||
ethernet0 = ð0;
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0 0>;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
|
|||
|
|
@ -34,9 +34,9 @@
|
|||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/clock/bcm-nsp.h>
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "brcm,nsp";
|
||||
model = "Broadcom Northstar Plus SoC";
|
||||
interrupt-parent = <&gic>;
|
||||
|
|
|
|||
|
|
@ -16,9 +16,9 @@
|
|||
|
||||
#include "dt-bindings/clock/bcm281xx.h"
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "BCM11351 SoC";
|
||||
compatible = "brcm,bcm11351";
|
||||
interrupt-parent = <&gic>;
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@
|
|||
compatible = "brcm,bcm21664-garnet", "brcm,bcm21664";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x40000000>; /* 1 GB */
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -16,9 +16,9 @@
|
|||
|
||||
#include "dt-bindings/clock/bcm21664.h"
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "BCM21664 SoC";
|
||||
compatible = "brcm,bcm21664";
|
||||
interrupt-parent = <&gic>;
|
||||
|
|
|
|||
|
|
@ -46,6 +46,7 @@
|
|||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -36,9 +36,9 @@
|
|||
/* BCM23550 and BCM21664 have almost identical clocks */
|
||||
#include "dt-bindings/clock/bcm21664.h"
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "BCM23550 SoC";
|
||||
compatible = "brcm,bcm23550";
|
||||
interrupt-parent = <&gic>;
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@
|
|||
compatible = "brcm,bcm28155-ap", "brcm,bcm11351";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x40000000>; /* 1 GB */
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -31,8 +31,8 @@
|
|||
* "FOO" = GPIO line named "FOO" on the schematic
|
||||
* "FOO_N" = GPIO line named "FOO" on schematic, active low
|
||||
*/
|
||||
gpio-line-names = "SDA0",
|
||||
"SCL0",
|
||||
gpio-line-names = "ID_SDA",
|
||||
"ID_SCL",
|
||||
"SDA1",
|
||||
"SCL1",
|
||||
"GPIO_GCLK",
|
||||
|
|
|
|||
|
|
@ -33,8 +33,8 @@
|
|||
* "FOO" = GPIO line named "FOO" on the schematic
|
||||
* "FOO_N" = GPIO line named "FOO" on schematic, active low
|
||||
*/
|
||||
gpio-line-names = "SDA0",
|
||||
"SCL0",
|
||||
gpio-line-names = "ID_SDA",
|
||||
"ID_SCL",
|
||||
"SDA1",
|
||||
"SCL1",
|
||||
"GPIO_GCLK",
|
||||
|
|
|
|||
|
|
@ -25,8 +25,6 @@
|
|||
|
||||
wifi_pwrseq: wifi-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wl_on>;
|
||||
reset-gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
|
@ -40,8 +38,8 @@
|
|||
* "FOO" = GPIO line named "FOO" on the schematic
|
||||
* "FOO_N" = GPIO line named "FOO" on schematic, active low
|
||||
*/
|
||||
gpio-line-names = "GPIO0",
|
||||
"GPIO1",
|
||||
gpio-line-names = "ID_SDA",
|
||||
"ID_SCL",
|
||||
"SDA1",
|
||||
"SCL1",
|
||||
"GPIO_GCLK",
|
||||
|
|
@ -98,11 +96,6 @@
|
|||
"SD_DATA3_R";
|
||||
|
||||
pinctrl-0 = <&gpioout &alt0>;
|
||||
|
||||
wl_on: wl-on {
|
||||
brcm,pins = <41>;
|
||||
brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
||||
};
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
|
|
|
|||
|
|
@ -28,8 +28,8 @@
|
|||
* "FOO" = GPIO line named "FOO" on the schematic
|
||||
* "FOO_N" = GPIO line named "FOO" on schematic, active low
|
||||
*/
|
||||
gpio-line-names = "SDA0",
|
||||
"SCL0",
|
||||
gpio-line-names = "ID_SDA",
|
||||
"ID_SCL",
|
||||
"SDA1",
|
||||
"SCL1",
|
||||
"GPIO_GCLK",
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
#include <dt-bindings/power/raspberrypi-power.h>
|
||||
|
||||
/ {
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0 0x10000000>;
|
||||
};
|
||||
|
|
@ -19,8 +19,6 @@
|
|||
soc {
|
||||
firmware: firmware {
|
||||
compatible = "raspberrypi,bcm2835-firmware", "simple-bus";
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
mboxes = <&mailbox>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@
|
|||
compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
|
||||
model = "Raspberry Pi 2 Model B";
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
reg = <0 0x40000000>;
|
||||
};
|
||||
|
||||
|
|
@ -28,6 +28,72 @@
|
|||
};
|
||||
|
||||
&gpio {
|
||||
/*
|
||||
* Taken from rpi_SCH_2b_1p2_reduced.pdf and
|
||||
* the official GPU firmware DT blob.
|
||||
*
|
||||
* Legend:
|
||||
* "NC" = not connected (no rail from the SoC)
|
||||
* "FOO" = GPIO line named "FOO" on the schematic
|
||||
* "FOO_N" = GPIO line named "FOO" on schematic, active low
|
||||
*/
|
||||
gpio-line-names = "ID_SDA",
|
||||
"ID_SCL",
|
||||
"SDA1",
|
||||
"SCL1",
|
||||
"GPIO_GCLK",
|
||||
"GPIO5",
|
||||
"GPIO6",
|
||||
"SPI_CE1_N",
|
||||
"SPI_CE0_N",
|
||||
"SPI_MISO",
|
||||
"SPI_MOSI",
|
||||
"SPI_SCLK",
|
||||
"GPIO12",
|
||||
"GPIO13",
|
||||
/* Serial port */
|
||||
"TXD0",
|
||||
"RXD0",
|
||||
"GPIO16",
|
||||
"GPIO17",
|
||||
"GPIO18",
|
||||
"GPIO19",
|
||||
"GPIO20",
|
||||
"GPIO21",
|
||||
"GPIO22",
|
||||
"GPIO23",
|
||||
"GPIO24",
|
||||
"GPIO25",
|
||||
"GPIO26",
|
||||
"GPIO27",
|
||||
"SDA0",
|
||||
"SCL0",
|
||||
"", /* GPIO30 */
|
||||
"LAN_RUN",
|
||||
"CAM_GPIO1",
|
||||
"", /* GPIO33 */
|
||||
"", /* GPIO34 */
|
||||
"PWR_LOW_N",
|
||||
"", /* GPIO36 */
|
||||
"", /* GPIO37 */
|
||||
"USB_LIMIT",
|
||||
"", /* GPIO39 */
|
||||
"PWM0_OUT",
|
||||
"CAM_GPIO0",
|
||||
"SMPS_SCL",
|
||||
"SMPS_SDA",
|
||||
"ETHCLK",
|
||||
"PWM1_OUT",
|
||||
"HDMI_HPD_N",
|
||||
"STATUS_LED",
|
||||
/* Used by SD Card */
|
||||
"SD_CLK_R",
|
||||
"SD_CMD_R",
|
||||
"SD_DATA0_R",
|
||||
"SD_DATA1_R",
|
||||
"SD_DATA2_R",
|
||||
"SD_DATA3_R";
|
||||
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
|
||||
|
||||
/* I2S interface */
|
||||
|
|
|
|||
|
|
@ -0,0 +1,175 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/dts-v1/;
|
||||
#include "bcm2837.dtsi"
|
||||
#include "bcm2836-rpi.dtsi"
|
||||
#include "bcm283x-rpi-usb-host.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "raspberrypi,3-model-a-plus", "brcm,bcm2837";
|
||||
model = "Raspberry Pi 3 Model A+";
|
||||
|
||||
chosen {
|
||||
/* 8250 auxiliary UART instead of pl011 */
|
||||
stdout-path = "serial1:115200n8";
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
reg = <0 0x20000000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
act {
|
||||
gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
pwr {
|
||||
label = "PWR";
|
||||
gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&firmware {
|
||||
expgpio: gpio {
|
||||
compatible = "raspberrypi,firmware-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-line-names = "",
|
||||
"BT_WL_ON",
|
||||
"STATUS_LED_R",
|
||||
"",
|
||||
"",
|
||||
"CAM_GPIO0",
|
||||
"CAM_GPIO1",
|
||||
"";
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&gpio {
|
||||
/*
|
||||
* This is mostly based on the official GPU firmware DT blob.
|
||||
*
|
||||
* Legend:
|
||||
* "NC" = not connected (no rail from the SoC)
|
||||
* "FOO" = GPIO line named "FOO" on the schematic
|
||||
* "FOO_N" = GPIO line named "FOO" on schematic, active low
|
||||
*/
|
||||
gpio-line-names = "ID_SDA",
|
||||
"ID_SCL",
|
||||
"SDA1",
|
||||
"SCL1",
|
||||
"GPIO_GCLK",
|
||||
"GPIO5",
|
||||
"GPIO6",
|
||||
"SPI_CE1_N",
|
||||
"SPI_CE0_N",
|
||||
"SPI_MISO",
|
||||
"SPI_MOSI",
|
||||
"SPI_SCLK",
|
||||
"GPIO12",
|
||||
"GPIO13",
|
||||
/* Serial port */
|
||||
"TXD1",
|
||||
"RXD1",
|
||||
"GPIO16",
|
||||
"GPIO17",
|
||||
"GPIO18",
|
||||
"GPIO19",
|
||||
"GPIO20",
|
||||
"GPIO21",
|
||||
"GPIO22",
|
||||
"GPIO23",
|
||||
"GPIO24",
|
||||
"GPIO25",
|
||||
"GPIO26",
|
||||
"GPIO27",
|
||||
"HDMI_HPD_N",
|
||||
"STATUS_LED_G",
|
||||
/* Used by BT module */
|
||||
"CTS0",
|
||||
"RTS0",
|
||||
"TXD0",
|
||||
"RXD0",
|
||||
/* Used by Wifi */
|
||||
"SD1_CLK",
|
||||
"SD1_CMD",
|
||||
"SD1_DATA0",
|
||||
"SD1_DATA1",
|
||||
"SD1_DATA2",
|
||||
"SD1_DATA3",
|
||||
"PWM0_OUT",
|
||||
"PWM1_OUT",
|
||||
"", /* GPIO42 */
|
||||
"WIFI_CLK",
|
||||
"SDA0",
|
||||
"SCL0",
|
||||
"SMPS_SCL",
|
||||
"SMPS_SDA",
|
||||
/* Used by SD Card */
|
||||
"SD_CLK_R",
|
||||
"SD_CMD_R",
|
||||
"SD_DATA0_R",
|
||||
"SD_DATA1_R",
|
||||
"SD_DATA2_R",
|
||||
"SD_DATA3_R";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&pwm {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio41>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/*
|
||||
* SDHCI is used to control the SDIO for wireless
|
||||
*
|
||||
* WL_REG_ON and BT_REG_ON of the CYW43455 Wifi/BT module are driven
|
||||
* by a single GPIO. We can't give GPIO control to one of the drivers,
|
||||
* otherwise the other part would get unexpectedly disturbed.
|
||||
*/
|
||||
&sdhci {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_gpio34>;
|
||||
status = "okay";
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
|
||||
brcmf: wifi@1 {
|
||||
reg = <1>;
|
||||
compatible = "brcm,bcm4329-fmac";
|
||||
};
|
||||
};
|
||||
|
||||
/* SDHOST is used to drive the SD card */
|
||||
&sdhost {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdhost_gpio48>;
|
||||
status = "okay";
|
||||
bus-width = <4>;
|
||||
};
|
||||
|
||||
/* uart0 communicates with the BT module */
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32 &gpclk2_gpio43>;
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "brcm,bcm43438-bt";
|
||||
max-speed = <2000000>;
|
||||
};
|
||||
};
|
||||
|
||||
/* uart1 is mapped to the pin header */
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_gpio14>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -14,7 +14,7 @@
|
|||
stdout-path = "serial1:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
reg = <0 0x40000000>;
|
||||
};
|
||||
|
||||
|
|
@ -42,7 +42,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-line-names = "BT_ON",
|
||||
"WL_ON",
|
||||
"STATUS_LED",
|
||||
"STATUS_LED_R",
|
||||
"LAN_RUN",
|
||||
"",
|
||||
"CAM_GPIO0",
|
||||
|
|
@ -52,6 +52,76 @@
|
|||
};
|
||||
};
|
||||
|
||||
&gpio {
|
||||
/*
|
||||
* Taken from rpi_SCH_3bplus_1p0_reduced.pdf and
|
||||
* the official GPU firmware DT blob.
|
||||
*
|
||||
* Legend:
|
||||
* "NC" = not connected (no rail from the SoC)
|
||||
* "FOO" = GPIO line named "FOO" on the schematic
|
||||
* "FOO_N" = GPIO line named "FOO" on schematic, active low
|
||||
*/
|
||||
gpio-line-names = "ID_SDA",
|
||||
"ID_SCL",
|
||||
"SDA1",
|
||||
"SCL1",
|
||||
"GPIO_GCLK",
|
||||
"GPIO5",
|
||||
"GPIO6",
|
||||
"SPI_CE1_N",
|
||||
"SPI_CE0_N",
|
||||
"SPI_MISO",
|
||||
"SPI_MOSI",
|
||||
"SPI_SCLK",
|
||||
"GPIO12",
|
||||
"GPIO13",
|
||||
/* Serial port */
|
||||
"TXD1",
|
||||
"RXD1",
|
||||
"GPIO16",
|
||||
"GPIO17",
|
||||
"GPIO18",
|
||||
"GPIO19",
|
||||
"GPIO20",
|
||||
"GPIO21",
|
||||
"GPIO22",
|
||||
"GPIO23",
|
||||
"GPIO24",
|
||||
"GPIO25",
|
||||
"GPIO26",
|
||||
"GPIO27",
|
||||
"HDMI_HPD_N",
|
||||
"STATUS_LED_G",
|
||||
/* Used by BT module */
|
||||
"CTS0",
|
||||
"RTS0",
|
||||
"TXD0",
|
||||
"RXD0",
|
||||
/* Used by Wifi */
|
||||
"SD1_CLK",
|
||||
"SD1_CMD",
|
||||
"SD1_DATA0",
|
||||
"SD1_DATA1",
|
||||
"SD1_DATA2",
|
||||
"SD1_DATA3",
|
||||
"PWM0_OUT",
|
||||
"PWM1_OUT",
|
||||
"ETHCLK",
|
||||
"WIFI_CLK",
|
||||
"SDA0",
|
||||
"SCL0",
|
||||
"SMPS_SCL",
|
||||
"SMPS_SDA",
|
||||
/* Used by SD Card */
|
||||
"SD_CLK_R",
|
||||
"SD_CMD_R",
|
||||
"SD_DATA0_R",
|
||||
"SD_DATA1_R",
|
||||
"SD_DATA2_R",
|
||||
"SD_DATA3_R";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -14,7 +14,7 @@
|
|||
stdout-path = "serial1:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
reg = <0 0x40000000>;
|
||||
};
|
||||
|
||||
|
|
@ -39,7 +39,7 @@
|
|||
"WL_ON",
|
||||
"STATUS_LED",
|
||||
"LAN_RUN",
|
||||
"HPD_N",
|
||||
"HDMI_HPD_N",
|
||||
"CAM_GPIO0",
|
||||
"CAM_GPIO1",
|
||||
"PWR_LOW_N";
|
||||
|
|
@ -47,6 +47,76 @@
|
|||
};
|
||||
};
|
||||
|
||||
&gpio {
|
||||
/*
|
||||
* Taken from rpi_SCH_3b_1p2_reduced.pdf and
|
||||
* the official GPU firmware DT blob.
|
||||
*
|
||||
* Legend:
|
||||
* "NC" = not connected (no rail from the SoC)
|
||||
* "FOO" = GPIO line named "FOO" on the schematic
|
||||
* "FOO_N" = GPIO line named "FOO" on schematic, active low
|
||||
*/
|
||||
gpio-line-names = "ID_SDA",
|
||||
"ID_SCL",
|
||||
"SDA1",
|
||||
"SCL1",
|
||||
"GPIO_GCLK",
|
||||
"GPIO5",
|
||||
"GPIO6",
|
||||
"SPI_CE1_N",
|
||||
"SPI_CE0_N",
|
||||
"SPI_MISO",
|
||||
"SPI_MOSI",
|
||||
"SPI_SCLK",
|
||||
"GPIO12",
|
||||
"GPIO13",
|
||||
/* Serial port */
|
||||
"TXD1",
|
||||
"RXD1",
|
||||
"GPIO16",
|
||||
"GPIO17",
|
||||
"GPIO18",
|
||||
"GPIO19",
|
||||
"GPIO20",
|
||||
"GPIO21",
|
||||
"GPIO22",
|
||||
"GPIO23",
|
||||
"GPIO24",
|
||||
"GPIO25",
|
||||
"GPIO26",
|
||||
"GPIO27",
|
||||
"", /* GPIO 28 */
|
||||
"LAN_RUN_BOOT",
|
||||
/* Used by BT module */
|
||||
"CTS0",
|
||||
"RTS0",
|
||||
"TXD0",
|
||||
"RXD0",
|
||||
/* Used by Wifi */
|
||||
"SD1_CLK",
|
||||
"SD1_CMD",
|
||||
"SD1_DATA0",
|
||||
"SD1_DATA1",
|
||||
"SD1_DATA2",
|
||||
"SD1_DATA3",
|
||||
"PWM0_OUT",
|
||||
"PWM1_OUT",
|
||||
"ETHCLK",
|
||||
"WIFI_CLK",
|
||||
"SDA0",
|
||||
"SCL0",
|
||||
"SMPS_SCL",
|
||||
"SMPS_SDA",
|
||||
/* Used by SD Card */
|
||||
"SD_CLK_R",
|
||||
"SD_CMD_R",
|
||||
"SD_DATA0_R",
|
||||
"SD_DATA1_R",
|
||||
"SD_DATA2_R",
|
||||
"SD_DATA3_R";
|
||||
};
|
||||
|
||||
&pwm {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio41>;
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue