usb: dwc2: Add functions to check the HW OTG config
Added functions to query the GHWCFG2.OTG_MODE. This tells us whether the controller hardware is configured for OTG, device-only, or host-only. Signed-off-by: John Youn <johnyoun@synopsys.com> Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Felipe Balbi <balbi@ti.com>
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@ -3342,6 +3342,43 @@ void dwc2_disable_global_interrupts(struct dwc2_hsotg *hsotg)
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dwc2_writel(ahbcfg, hsotg->regs + GAHBCFG);
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}
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/* Returns the controller's GHWCFG2.OTG_MODE. */
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unsigned dwc2_op_mode(struct dwc2_hsotg *hsotg)
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{
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u32 ghwcfg2 = dwc2_readl(hsotg->regs + GHWCFG2);
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return (ghwcfg2 & GHWCFG2_OP_MODE_MASK) >>
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GHWCFG2_OP_MODE_SHIFT;
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}
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/* Returns true if the controller is capable of DRD. */
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bool dwc2_hw_is_otg(struct dwc2_hsotg *hsotg)
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{
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unsigned op_mode = dwc2_op_mode(hsotg);
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return (op_mode == GHWCFG2_OP_MODE_HNP_SRP_CAPABLE) ||
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(op_mode == GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE) ||
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(op_mode == GHWCFG2_OP_MODE_NO_HNP_SRP_CAPABLE);
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}
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/* Returns true if the controller is host-only. */
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bool dwc2_hw_is_host(struct dwc2_hsotg *hsotg)
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{
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unsigned op_mode = dwc2_op_mode(hsotg);
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return (op_mode == GHWCFG2_OP_MODE_SRP_CAPABLE_HOST) ||
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(op_mode == GHWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST);
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}
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/* Returns true if the controller is device-only. */
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bool dwc2_hw_is_device(struct dwc2_hsotg *hsotg)
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{
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unsigned op_mode = dwc2_op_mode(hsotg);
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return (op_mode == GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE) ||
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(op_mode == GHWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE);
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}
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MODULE_DESCRIPTION("DESIGNWARE HS OTG Core");
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MODULE_AUTHOR("Synopsys, Inc.");
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MODULE_LICENSE("Dual BSD/GPL");
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@ -1137,6 +1137,19 @@ extern int dwc2_get_hwparams(struct dwc2_hsotg *hsotg);
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extern int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg);
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extern int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg);
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/*
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* The following functions check the controller's OTG operation mode
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* capability (GHWCFG2.OTG_MODE).
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*
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* These functions can be used before the internal hsotg->hw_params
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* are read in and cached so they always read directly from the
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* GHWCFG2 register.
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*/
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unsigned dwc2_op_mode(struct dwc2_hsotg *hsotg);
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bool dwc2_hw_is_otg(struct dwc2_hsotg *hsotg);
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bool dwc2_hw_is_host(struct dwc2_hsotg *hsotg);
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bool dwc2_hw_is_device(struct dwc2_hsotg *hsotg);
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/*
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* Dump core registers and SPRAM
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*/
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