cxgb4: Update correct encoding of SGE Ingress DMA States for T6 adapter
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -5702,6 +5702,39 @@ void t4_sge_decode_idma_state(struct adapter *adapter, int state)
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"IDMA_FL_SEND_PADDING",
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"IDMA_FL_SEND_PADDING",
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"IDMA_FL_SEND_COMPLETION_TO_IMSG",
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"IDMA_FL_SEND_COMPLETION_TO_IMSG",
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};
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};
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static const char * const t6_decode[] = {
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"IDMA_IDLE",
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"IDMA_PUSH_MORE_CPL_FIFO",
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"IDMA_PUSH_CPL_MSG_HEADER_TO_FIFO",
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"IDMA_SGEFLRFLUSH_SEND_PCIEHDR",
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"IDMA_PHYSADDR_SEND_PCIEHDR",
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"IDMA_PHYSADDR_SEND_PAYLOAD_FIRST",
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"IDMA_PHYSADDR_SEND_PAYLOAD",
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"IDMA_FL_REQ_DATA_FL",
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"IDMA_FL_DROP",
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"IDMA_FL_DROP_SEND_INC",
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"IDMA_FL_H_REQ_HEADER_FL",
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"IDMA_FL_H_SEND_PCIEHDR",
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"IDMA_FL_H_PUSH_CPL_FIFO",
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"IDMA_FL_H_SEND_CPL",
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"IDMA_FL_H_SEND_IP_HDR_FIRST",
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"IDMA_FL_H_SEND_IP_HDR",
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"IDMA_FL_H_REQ_NEXT_HEADER_FL",
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"IDMA_FL_H_SEND_NEXT_PCIEHDR",
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"IDMA_FL_H_SEND_IP_HDR_PADDING",
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"IDMA_FL_D_SEND_PCIEHDR",
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"IDMA_FL_D_SEND_CPL_AND_IP_HDR",
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"IDMA_FL_D_REQ_NEXT_DATA_FL",
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"IDMA_FL_SEND_PCIEHDR",
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"IDMA_FL_PUSH_CPL_FIFO",
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"IDMA_FL_SEND_CPL",
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"IDMA_FL_SEND_PAYLOAD_FIRST",
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"IDMA_FL_SEND_PAYLOAD",
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"IDMA_FL_REQ_NEXT_DATA_FL",
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"IDMA_FL_SEND_NEXT_PCIEHDR",
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"IDMA_FL_SEND_PADDING",
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"IDMA_FL_SEND_COMPLETION_TO_IMSG",
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};
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static const u32 sge_regs[] = {
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static const u32 sge_regs[] = {
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SGE_DEBUG_DATA_LOW_INDEX_2_A,
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SGE_DEBUG_DATA_LOW_INDEX_2_A,
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SGE_DEBUG_DATA_LOW_INDEX_3_A,
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SGE_DEBUG_DATA_LOW_INDEX_3_A,
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@ -5710,6 +5743,32 @@ void t4_sge_decode_idma_state(struct adapter *adapter, int state)
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const char **sge_idma_decode;
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const char **sge_idma_decode;
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int sge_idma_decode_nstates;
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int sge_idma_decode_nstates;
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int i;
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int i;
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unsigned int chip_version = CHELSIO_CHIP_VERSION(adapter->params.chip);
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/* Select the right set of decode strings to dump depending on the
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* adapter chip type.
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*/
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switch (chip_version) {
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case CHELSIO_T4:
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sge_idma_decode = (const char **)t4_decode;
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sge_idma_decode_nstates = ARRAY_SIZE(t4_decode);
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break;
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case CHELSIO_T5:
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sge_idma_decode = (const char **)t5_decode;
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sge_idma_decode_nstates = ARRAY_SIZE(t5_decode);
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break;
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case CHELSIO_T6:
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sge_idma_decode = (const char **)t6_decode;
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sge_idma_decode_nstates = ARRAY_SIZE(t6_decode);
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break;
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default:
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dev_err(adapter->pdev_dev,
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"Unsupported chip version %d\n", chip_version);
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return;
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}
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if (is_t4(adapter->params.chip)) {
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if (is_t4(adapter->params.chip)) {
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sge_idma_decode = (const char **)t4_decode;
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sge_idma_decode = (const char **)t4_decode;
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