bus: ti-sysc: Fix bogus resetdone warning on enable for cpsw
[ Upstream commite7ae08d398
] Bail out early from sysc_wait_softreset() just like we do in sysc_reset() if there's no sysstatus srst_shift to fix a bogus resetdone warning on enable as suggested by Grygorii Strashko <grygorii.strashko@ti.com>. We do not currently handle resets for modules that need writing to the sysstatus register. If we at some point add that, we also need to add SYSS_QUIRK_RESETDONE_INVERTED flag for cpsw as the sysstatus bit is low when reset is done as described in the am335x TRM "Table 14-202 SOFT_RESET Register Field Descriptions" Fixes:d46f9fbec7
("bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit") Suggested-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -192,6 +192,9 @@ static int sysc_wait_softreset(struct sysc *ddata)
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u32 sysc_mask, syss_done, rstval;
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int syss_offset, error = 0;
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if (ddata->cap->regbits->srst_shift < 0)
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return 0;
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syss_offset = ddata->offsets[SYSC_SYSSTATUS];
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sysc_mask = BIT(ddata->cap->regbits->srst_shift);
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