can: flexcan: enable interrupts atomically at the end of flexcan_chip_start()
This patch defers the writing of the interrupts bits of the CTRL register order to enables all interrupts atomically at the the of the flexcan_chip_start() function. Suggested-by: Torsten Lang <torsten.lang@uweschneider.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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@ -878,6 +878,8 @@ static int flexcan_chip_start(struct net_device *dev)
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/* save for later use */
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priv->reg_ctrl_default = reg_ctrl;
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/* leave interrupts disabled for now */
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reg_ctrl &= ~FLEXCAN_CTRL_ERR_ALL;
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netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl);
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flexcan_write(reg_ctrl, ®s->ctrl);
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@ -937,8 +939,11 @@ static int flexcan_chip_start(struct net_device *dev)
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priv->can.state = CAN_STATE_ERROR_ACTIVE;
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/* enable FIFO interrupts */
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/* enable interrupts atomically */
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disable_irq(dev->irq);
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flexcan_write(priv->reg_ctrl_default, ®s->ctrl);
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flexcan_write(FLEXCAN_IFLAG_DEFAULT, ®s->imask1);
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enable_irq(dev->irq);
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/* print chip status */
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netdev_dbg(dev, "%s: reading mcr=0x%08x ctrl=0x%08x\n", __func__,
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