MIPS: R2: Try to bulletproof instruction_hazard against miss-compilation.
Gcc has a tradition of misscompiling the previous construct using the address of a label as argument to inline assembler. Gas otoh has the annoying difference between la and dla which are only usable for 32-bit rsp. 64-bit code, so can't be used without conditional compilation. The alterantive is switching the assembler to 64-bit code which happens to work right even for 32-bit code ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -233,15 +233,25 @@ __asm__(
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#endif
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#endif
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#ifdef CONFIG_CPU_MIPSR2
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#ifdef CONFIG_CPU_MIPSR2
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/*
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* gcc has a tradition of misscompiling the previous construct using the
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* address of a label as argument to inline assembler. Gas otoh has the
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* annoying difference between la and dla which are only usable for 32-bit
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* rsp. 64-bit code, so can't be used without conditional compilation.
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* The alterantive is switching the assembler to 64-bit code which happens
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* to work right even for 32-bit code ...
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*/
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#define instruction_hazard() \
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#define instruction_hazard() \
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do { \
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do { \
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__label__ __next; \
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unsigned long tmp; \
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\
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__asm__ __volatile__( \
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__asm__ __volatile__( \
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" .set mips64r2 \n" \
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" dla %0, 1f \n" \
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" jr.hb %0 \n" \
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" jr.hb %0 \n" \
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: \
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" .set mips0 \n" \
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: "r" (&&__next)); \
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"1: \n" \
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__next: \
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: "=r" (tmp)); \
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; \
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} while (0)
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} while (0)
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#else
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#else
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