octeontx2-af: Alloc bitmaps for NIX Tx scheduler queues
Allocate bitmaps and memory for PFVF mapping info for maintaining NIX transmit scheduler queues maintenance. PF/VF drivers will request for alloc, free e.t.c of Tx schedulers via mailbox. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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59360e9809
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709a4f0c25
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@ -132,6 +132,17 @@ struct npa_aq_pool_res {
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struct npa_pool_s ctx_mask;
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};
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/* NIX Transmit schedulers */
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enum nix_scheduler {
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NIX_TXSCH_LVL_SMQ = 0x0,
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NIX_TXSCH_LVL_MDQ = 0x0,
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NIX_TXSCH_LVL_TL4 = 0x1,
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NIX_TXSCH_LVL_TL3 = 0x2,
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NIX_TXSCH_LVL_TL2 = 0x3,
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NIX_TXSCH_LVL_TL1 = 0x4,
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NIX_TXSCH_LVL_CNT = 0x5,
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};
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/* NIX LSO format indices.
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* As of now TSO is the only one using, so statically assigning indices.
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*/
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@ -91,12 +91,28 @@ struct rvu_pfvf {
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u8 mac_addr[ETH_ALEN]; /* MAC address of this PF/VF */
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};
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struct nix_txsch {
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struct rsrc_bmap schq;
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u8 lvl;
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u16 *pfvf_map;
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};
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struct nix_hw {
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struct nix_txsch txsch[NIX_TXSCH_LVL_CNT]; /* Tx schedulers */
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};
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struct rvu_hwinfo {
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u8 total_pfs; /* MAX RVU PFs HW supports */
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u16 total_vfs; /* Max RVU VFs HW supports */
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u16 max_vfs_per_pf; /* Max VFs that can be attached to a PF */
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u8 cgx;
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u8 lmac_per_cgx;
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u8 cgx_links;
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u8 lbk_links;
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u8 sdp_links;
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struct rvu_block block[BLK_COUNT]; /* Block info */
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struct nix_hw *nix0;
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};
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struct rvu {
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@ -346,6 +346,60 @@ int rvu_mbox_handler_NIX_LF_FREE(struct rvu *rvu, struct msg_req *req,
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return 0;
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}
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static inline struct nix_hw *get_nix_hw(struct rvu_hwinfo *hw, int blkaddr)
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{
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if (blkaddr == BLKADDR_NIX0 && hw->nix0)
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return hw->nix0;
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return NULL;
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}
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static int nix_setup_txschq(struct rvu *rvu, struct nix_hw *nix_hw, int blkaddr)
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{
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struct nix_txsch *txsch;
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u64 cfg, reg;
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int err, lvl;
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/* Get scheduler queue count of each type and alloc
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* bitmap for each for alloc/free/attach operations.
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*/
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for (lvl = 0; lvl < NIX_TXSCH_LVL_CNT; lvl++) {
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txsch = &nix_hw->txsch[lvl];
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txsch->lvl = lvl;
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switch (lvl) {
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case NIX_TXSCH_LVL_SMQ:
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reg = NIX_AF_MDQ_CONST;
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break;
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case NIX_TXSCH_LVL_TL4:
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reg = NIX_AF_TL4_CONST;
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break;
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case NIX_TXSCH_LVL_TL3:
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reg = NIX_AF_TL3_CONST;
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break;
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case NIX_TXSCH_LVL_TL2:
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reg = NIX_AF_TL2_CONST;
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break;
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case NIX_TXSCH_LVL_TL1:
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reg = NIX_AF_TL1_CONST;
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break;
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}
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cfg = rvu_read64(rvu, blkaddr, reg);
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txsch->schq.max = cfg & 0xFFFF;
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err = rvu_alloc_bitmap(&txsch->schq);
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if (err)
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return err;
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/* Allocate memory for scheduler queues to
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* PF/VF pcifunc mapping info.
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*/
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txsch->pfvf_map = devm_kcalloc(rvu->dev, txsch->schq.max,
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sizeof(u16), GFP_KERNEL);
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if (!txsch->pfvf_map)
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return -ENOMEM;
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}
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return 0;
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}
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static int nix_calibrate_x2p(struct rvu *rvu, int blkaddr)
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{
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int idx, err;
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@ -431,6 +485,7 @@ int rvu_nix_init(struct rvu *rvu)
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struct rvu_hwinfo *hw = rvu->hw;
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struct rvu_block *block;
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int blkaddr, err;
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u64 cfg;
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blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);
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if (blkaddr < 0)
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@ -442,6 +497,14 @@ int rvu_nix_init(struct rvu *rvu)
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if (err)
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return err;
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/* Set num of links of each type */
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cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST);
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hw->cgx = (cfg >> 12) & 0xF;
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hw->lmac_per_cgx = (cfg >> 8) & 0xF;
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hw->cgx_links = hw->cgx * hw->lmac_per_cgx;
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hw->lbk_links = 1;
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hw->sdp_links = 1;
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/* Initialize admin queue */
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err = nix_aq_init(rvu, block);
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if (err)
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@ -453,6 +516,16 @@ int rvu_nix_init(struct rvu *rvu)
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/* Configure segmentation offload formats */
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nix_setup_lso(rvu, blkaddr);
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if (blkaddr == BLKADDR_NIX0) {
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hw->nix0 = devm_kzalloc(rvu->dev,
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sizeof(struct nix_hw), GFP_KERNEL);
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if (!hw->nix0)
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return -ENOMEM;
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err = nix_setup_txschq(rvu, hw->nix0, blkaddr);
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if (err)
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return err;
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}
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return 0;
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}
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@ -460,7 +533,9 @@ void rvu_nix_freemem(struct rvu *rvu)
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{
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struct rvu_hwinfo *hw = rvu->hw;
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struct rvu_block *block;
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int blkaddr;
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struct nix_txsch *txsch;
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struct nix_hw *nix_hw;
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int blkaddr, lvl;
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blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);
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if (blkaddr < 0)
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@ -468,4 +543,15 @@ void rvu_nix_freemem(struct rvu *rvu)
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block = &hw->block[blkaddr];
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rvu_aq_free(rvu, block->aq);
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if (blkaddr == BLKADDR_NIX0) {
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nix_hw = get_nix_hw(rvu->hw, blkaddr);
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if (!nix_hw)
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return;
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for (lvl = 0; lvl < NIX_TXSCH_LVL_CNT; lvl++) {
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txsch = &nix_hw->txsch[lvl];
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kfree(txsch->schq.bmap);
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}
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}
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}
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