[PATCH] 8139cp: add ethtool eeprom support
Implement the ethtool eeprom operations for the 8139cp driver. Tested on x86 and big-endian ARM. Signed-off-by: Philip Craig <philipc@snapgear.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@ -401,6 +401,11 @@ static void cp_clean_rings (struct cp_private *cp);
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#ifdef CONFIG_NET_POLL_CONTROLLER
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static void cp_poll_controller(struct net_device *dev);
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#endif
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static int cp_get_eeprom_len(struct net_device *dev);
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static int cp_get_eeprom(struct net_device *dev,
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struct ethtool_eeprom *eeprom, u8 *data);
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static int cp_set_eeprom(struct net_device *dev,
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struct ethtool_eeprom *eeprom, u8 *data);
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static struct pci_device_id cp_pci_tbl[] = {
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{ PCI_VENDOR_ID_REALTEK, PCI_DEVICE_ID_REALTEK_8139,
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@ -1577,6 +1582,9 @@ static struct ethtool_ops cp_ethtool_ops = {
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.get_strings = cp_get_strings,
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.get_ethtool_stats = cp_get_ethtool_stats,
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.get_perm_addr = ethtool_op_get_perm_addr,
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.get_eeprom_len = cp_get_eeprom_len,
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.get_eeprom = cp_get_eeprom,
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.set_eeprom = cp_set_eeprom,
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};
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static int cp_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
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@ -1612,24 +1620,32 @@ static int cp_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
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#define eeprom_delay() readl(ee_addr)
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/* The EEPROM commands include the alway-set leading bit. */
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#define EE_EXTEND_CMD (4)
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#define EE_WRITE_CMD (5)
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#define EE_READ_CMD (6)
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#define EE_ERASE_CMD (7)
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static int read_eeprom (void __iomem *ioaddr, int location, int addr_len)
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{
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int i;
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unsigned retval = 0;
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void __iomem *ee_addr = ioaddr + Cfg9346;
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int read_cmd = location | (EE_READ_CMD << addr_len);
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#define EE_EWDS_ADDR (0)
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#define EE_WRAL_ADDR (1)
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#define EE_ERAL_ADDR (2)
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#define EE_EWEN_ADDR (3)
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#define CP_EEPROM_MAGIC PCI_DEVICE_ID_REALTEK_8139
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static void eeprom_cmd_start(void __iomem *ee_addr)
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{
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writeb (EE_ENB & ~EE_CS, ee_addr);
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writeb (EE_ENB, ee_addr);
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eeprom_delay ();
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}
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/* Shift the read command bits out. */
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for (i = 3 + addr_len - 1; i >= 0; i--) {
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int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
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static void eeprom_cmd(void __iomem *ee_addr, int cmd, int cmd_len)
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{
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int i;
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/* Shift the command bits out. */
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for (i = cmd_len - 1; i >= 0; i--) {
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int dataval = (cmd & (1 << i)) ? EE_DATA_WRITE : 0;
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writeb (EE_ENB | dataval, ee_addr);
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eeprom_delay ();
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writeb (EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
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@ -1637,6 +1653,33 @@ static int read_eeprom (void __iomem *ioaddr, int location, int addr_len)
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}
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writeb (EE_ENB, ee_addr);
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eeprom_delay ();
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}
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static void eeprom_cmd_end(void __iomem *ee_addr)
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{
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writeb (~EE_CS, ee_addr);
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eeprom_delay ();
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}
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static void eeprom_extend_cmd(void __iomem *ee_addr, int extend_cmd,
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int addr_len)
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{
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int cmd = (EE_EXTEND_CMD << addr_len) | (extend_cmd << (addr_len - 2));
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eeprom_cmd_start(ee_addr);
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eeprom_cmd(ee_addr, cmd, 3 + addr_len);
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eeprom_cmd_end(ee_addr);
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}
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static u16 read_eeprom (void __iomem *ioaddr, int location, int addr_len)
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{
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int i;
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u16 retval = 0;
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void __iomem *ee_addr = ioaddr + Cfg9346;
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int read_cmd = location | (EE_READ_CMD << addr_len);
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eeprom_cmd_start(ee_addr);
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eeprom_cmd(ee_addr, read_cmd, 3 + addr_len);
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for (i = 16; i > 0; i--) {
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writeb (EE_ENB | EE_SHIFT_CLK, ee_addr);
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@ -1648,13 +1691,125 @@ static int read_eeprom (void __iomem *ioaddr, int location, int addr_len)
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eeprom_delay ();
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}
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/* Terminate the EEPROM access. */
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writeb (~EE_CS, ee_addr);
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eeprom_delay ();
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eeprom_cmd_end(ee_addr);
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return retval;
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}
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static void write_eeprom(void __iomem *ioaddr, int location, u16 val,
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int addr_len)
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{
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int i;
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void __iomem *ee_addr = ioaddr + Cfg9346;
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int write_cmd = location | (EE_WRITE_CMD << addr_len);
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eeprom_extend_cmd(ee_addr, EE_EWEN_ADDR, addr_len);
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eeprom_cmd_start(ee_addr);
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eeprom_cmd(ee_addr, write_cmd, 3 + addr_len);
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eeprom_cmd(ee_addr, val, 16);
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eeprom_cmd_end(ee_addr);
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eeprom_cmd_start(ee_addr);
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for (i = 0; i < 20000; i++)
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if (readb(ee_addr) & EE_DATA_READ)
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break;
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eeprom_cmd_end(ee_addr);
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eeprom_extend_cmd(ee_addr, EE_EWDS_ADDR, addr_len);
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}
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static int cp_get_eeprom_len(struct net_device *dev)
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{
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struct cp_private *cp = netdev_priv(dev);
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int size;
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spin_lock_irq(&cp->lock);
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size = read_eeprom(cp->regs, 0, 8) == 0x8129 ? 256 : 128;
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spin_unlock_irq(&cp->lock);
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return size;
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}
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static int cp_get_eeprom(struct net_device *dev,
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struct ethtool_eeprom *eeprom, u8 *data)
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{
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struct cp_private *cp = netdev_priv(dev);
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unsigned int addr_len;
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u16 val;
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u32 offset = eeprom->offset >> 1;
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u32 len = eeprom->len;
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u32 i = 0;
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eeprom->magic = CP_EEPROM_MAGIC;
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spin_lock_irq(&cp->lock);
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addr_len = read_eeprom(cp->regs, 0, 8) == 0x8129 ? 8 : 6;
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if (eeprom->offset & 1) {
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val = read_eeprom(cp->regs, offset, addr_len);
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data[i++] = (u8)(val >> 8);
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offset++;
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}
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while (i < len - 1) {
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val = read_eeprom(cp->regs, offset, addr_len);
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data[i++] = (u8)val;
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data[i++] = (u8)(val >> 8);
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offset++;
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}
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if (i < len) {
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val = read_eeprom(cp->regs, offset, addr_len);
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data[i] = (u8)val;
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}
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spin_unlock_irq(&cp->lock);
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return 0;
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}
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static int cp_set_eeprom(struct net_device *dev,
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struct ethtool_eeprom *eeprom, u8 *data)
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{
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struct cp_private *cp = netdev_priv(dev);
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unsigned int addr_len;
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u16 val;
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u32 offset = eeprom->offset >> 1;
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u32 len = eeprom->len;
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u32 i = 0;
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if (eeprom->magic != CP_EEPROM_MAGIC)
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return -EINVAL;
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spin_lock_irq(&cp->lock);
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addr_len = read_eeprom(cp->regs, 0, 8) == 0x8129 ? 8 : 6;
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if (eeprom->offset & 1) {
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val = read_eeprom(cp->regs, offset, addr_len) & 0xff;
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val |= (u16)data[i++] << 8;
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write_eeprom(cp->regs, offset, val, addr_len);
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offset++;
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}
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while (i < len - 1) {
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val = (u16)data[i++];
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val |= (u16)data[i++] << 8;
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write_eeprom(cp->regs, offset, val, addr_len);
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offset++;
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}
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if (i < len) {
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val = read_eeprom(cp->regs, offset, addr_len) & 0xff00;
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val |= (u16)data[i];
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write_eeprom(cp->regs, offset, val, addr_len);
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}
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spin_unlock_irq(&cp->lock);
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return 0;
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}
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/* Put the board into D3cold state and wait for WakeUp signal */
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static void cp_set_d3_state (struct cp_private *cp)
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{
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