dma-mapping: move various slow path functions out of line
There is no need to have all setup and coherent allocation / freeing routines inline. Move them out of line to keep the implemeation nicely encapsulated and save some kernel text size. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Jesper Dangaard Brouer <brouer@redhat.com> Tested-by: Jesper Dangaard Brouer <brouer@redhat.com> Tested-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
Christoph Hellwig
parent
05887cb610
commit
7249c1a52d
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@ -108,7 +108,6 @@ static inline void set_dma_offset(struct device *dev, dma_addr_t off)
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}
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#define HAVE_ARCH_DMA_SET_MASK 1
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extern int dma_set_mask(struct device *dev, u64 dma_mask);
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extern u64 __dma_get_required_mask(struct device *dev);
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@ -440,107 +440,24 @@ bool dma_in_atomic_pool(void *start, size_t size);
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void *dma_alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags);
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bool dma_free_from_pool(void *start, size_t size);
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/**
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* dma_mmap_attrs - map a coherent DMA allocation into user space
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @vma: vm_area_struct describing requested user mapping
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* @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
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* @handle: device-view address returned from dma_alloc_attrs
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* @size: size of memory originally requested in dma_alloc_attrs
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* @attrs: attributes of mapping properties requested in dma_alloc_attrs
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*
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* Map a coherent DMA buffer previously allocated by dma_alloc_attrs
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* into user space. The coherent DMA buffer must not be freed by the
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* driver until the user space mapping has been released.
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*/
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static inline int
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dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr,
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dma_addr_t dma_addr, size_t size, unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!ops);
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if (ops->mmap)
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return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
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return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
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}
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int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs);
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#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0)
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int
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dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, void *cpu_addr,
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dma_addr_t dma_addr, size_t size, unsigned long attrs);
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static inline int
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dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr,
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dma_addr_t dma_addr, size_t size,
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unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!ops);
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if (ops->get_sgtable)
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return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
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attrs);
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return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
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attrs);
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}
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int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs);
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#define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0)
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#ifndef arch_dma_alloc_attrs
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#define arch_dma_alloc_attrs(dev) (true)
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#endif
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static inline void *dma_alloc_attrs(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag,
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unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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void *cpu_addr;
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BUG_ON(!ops);
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WARN_ON_ONCE(dev && !dev->coherent_dma_mask);
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if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr))
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return cpu_addr;
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/* let the implementation decide on the zone to allocate from: */
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flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
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if (!arch_dma_alloc_attrs(&dev))
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return NULL;
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if (!ops->alloc)
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return NULL;
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cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
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debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
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return cpu_addr;
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}
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static inline void dma_free_attrs(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t dma_handle,
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unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!ops);
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if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr))
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return;
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/*
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* On non-coherent platforms which implement DMA-coherent buffers via
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* non-cacheable remaps, ops->free() may call vunmap(). Thus getting
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* this far in IRQ context is a) at risk of a BUG_ON() or trying to
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* sleep on some machines, and b) an indication that the driver is
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* probably misusing the coherent API anyway.
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*/
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WARN_ON(irqs_disabled());
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if (!ops->free || !cpu_addr)
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return;
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debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
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ops->free(dev, size, cpu_addr, dma_handle, attrs);
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}
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void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t flag, unsigned long attrs);
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void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_handle, unsigned long attrs);
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static inline void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp)
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@ -565,35 +482,9 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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return 0;
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}
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static inline void dma_check_mask(struct device *dev, u64 mask)
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{
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if (sme_active() && (mask < (((u64)sme_get_me_mask() << 1) - 1)))
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dev_warn(dev, "SME is active, device will require DMA bounce buffers\n");
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}
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static inline int dma_supported(struct device *dev, u64 mask)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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if (!ops)
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return 0;
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if (!ops->dma_supported)
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return 1;
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return ops->dma_supported(dev, mask);
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}
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#ifndef HAVE_ARCH_DMA_SET_MASK
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static inline int dma_set_mask(struct device *dev, u64 mask)
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{
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if (!dev->dma_mask || !dma_supported(dev, mask))
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return -EIO;
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dma_check_mask(dev, mask);
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*dev->dma_mask = mask;
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return 0;
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}
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#endif
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int dma_supported(struct device *dev, u64 mask);
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int dma_set_mask(struct device *dev, u64 mask);
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int dma_set_coherent_mask(struct device *dev, u64 mask);
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static inline u64 dma_get_mask(struct device *dev)
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{
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@ -602,21 +493,6 @@ static inline u64 dma_get_mask(struct device *dev)
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return DMA_BIT_MASK(32);
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}
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#ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
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int dma_set_coherent_mask(struct device *dev, u64 mask);
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#else
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static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
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{
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if (!dma_supported(dev, mask))
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return -EIO;
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dma_check_mask(dev, mask);
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dev->coherent_dma_mask = mask;
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return 0;
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}
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#endif
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/*
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* Set both the DMA mask and the coherent DMA mask to the same thing.
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* Note that we don't check the return value from dma_set_coherent_mask()
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@ -223,7 +223,20 @@ int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
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sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
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return ret;
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}
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EXPORT_SYMBOL(dma_common_get_sgtable);
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int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!ops);
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if (ops->get_sgtable)
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return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
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attrs);
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return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
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attrs);
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}
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EXPORT_SYMBOL(dma_get_sgtable_attrs);
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/*
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* Create userspace mapping for the DMA-coherent memory.
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@ -261,7 +274,31 @@ int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
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return -ENXIO;
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#endif /* !CONFIG_ARCH_NO_COHERENT_DMA_MMAP */
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}
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EXPORT_SYMBOL(dma_common_mmap);
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/**
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* dma_mmap_attrs - map a coherent DMA allocation into user space
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @vma: vm_area_struct describing requested user mapping
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* @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
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* @dma_addr: device-view address returned from dma_alloc_attrs
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* @size: size of memory originally requested in dma_alloc_attrs
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* @attrs: attributes of mapping properties requested in dma_alloc_attrs
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*
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* Map a coherent DMA buffer previously allocated by dma_alloc_attrs into user
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* space. The coherent DMA buffer must not be freed by the driver until the
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* user space mapping has been released.
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*/
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int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!ops);
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if (ops->mmap)
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return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
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return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
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}
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EXPORT_SYMBOL(dma_mmap_attrs);
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#ifndef ARCH_HAS_DMA_GET_REQUIRED_MASK
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static u64 dma_default_get_required_mask(struct device *dev)
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@ -294,3 +331,102 @@ u64 dma_get_required_mask(struct device *dev)
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EXPORT_SYMBOL_GPL(dma_get_required_mask);
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#endif
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#ifndef arch_dma_alloc_attrs
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#define arch_dma_alloc_attrs(dev) (true)
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#endif
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void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t flag, unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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void *cpu_addr;
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BUG_ON(!ops);
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WARN_ON_ONCE(dev && !dev->coherent_dma_mask);
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if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr))
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return cpu_addr;
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/* let the implementation decide on the zone to allocate from: */
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flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
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if (!arch_dma_alloc_attrs(&dev))
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return NULL;
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if (!ops->alloc)
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return NULL;
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cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
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debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
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return cpu_addr;
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}
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EXPORT_SYMBOL(dma_alloc_attrs);
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void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_handle, unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!ops);
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if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr))
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return;
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/*
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* On non-coherent platforms which implement DMA-coherent buffers via
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* non-cacheable remaps, ops->free() may call vunmap(). Thus getting
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* this far in IRQ context is a) at risk of a BUG_ON() or trying to
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* sleep on some machines, and b) an indication that the driver is
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* probably misusing the coherent API anyway.
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*/
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WARN_ON(irqs_disabled());
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if (!ops->free || !cpu_addr)
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return;
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debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
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ops->free(dev, size, cpu_addr, dma_handle, attrs);
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}
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EXPORT_SYMBOL(dma_free_attrs);
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static inline void dma_check_mask(struct device *dev, u64 mask)
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{
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if (sme_active() && (mask < (((u64)sme_get_me_mask() << 1) - 1)))
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dev_warn(dev, "SME is active, device will require DMA bounce buffers\n");
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}
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int dma_supported(struct device *dev, u64 mask)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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if (!ops)
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return 0;
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if (!ops->dma_supported)
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return 1;
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return ops->dma_supported(dev, mask);
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}
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EXPORT_SYMBOL(dma_supported);
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#ifndef HAVE_ARCH_DMA_SET_MASK
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int dma_set_mask(struct device *dev, u64 mask)
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{
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if (!dev->dma_mask || !dma_supported(dev, mask))
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return -EIO;
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dma_check_mask(dev, mask);
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*dev->dma_mask = mask;
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return 0;
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}
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EXPORT_SYMBOL(dma_set_mask);
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#endif
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#ifndef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
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int dma_set_coherent_mask(struct device *dev, u64 mask)
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{
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if (!dma_supported(dev, mask))
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return -EIO;
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dma_check_mask(dev, mask);
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dev->coherent_dma_mask = mask;
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return 0;
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}
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EXPORT_SYMBOL(dma_set_coherent_mask);
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#endif
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