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ASoC: rl6231: fix range of DMIC clock 

The maximum DMIC clock rate is 3.072 MHz for most DMIC. And it will get better
performance in higher clock rate. If we set maximum to 3 MHz in driver, we will
get a clock rate which is not even close to 3 MHz.
For example, if DMIC clock source is 24.576 MHz, the DMIC clock will be about
1.5 MHz in current code. But it will be 3.072 MHz with this patch.

Signed-off-by: John Lin <john.lin@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
John Lin 2015-11-16 14:41:07 +08:00 committed by Mark Brown
parent 2f64b6ed44
commit 7336dcefac
1 changed files with 2 additions and 2 deletions
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4
sound/soc/codecs/rl6231.c
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@ -82,8 +82,8 @@ int rl6231_calc_dmic_clk(int rate)
for (i = 0; i < ARRAY_SIZE(div); i++) {
if ((div[i] % 3) == 0)
continue;
/* find divider that gives DMIC frequency below 3MHz */
if (3000000 * div[i] >= rate)
/* find divider that gives DMIC frequency below 3.072MHz */
if (3072000 * div[i] >= rate)
return i;
}