sparc32: Kill btfixup for xchg()'s 'swap' instruction.
We always have this instruction available, so no need to use btfixup for it any more. This also eradicates the whole of atomic_32.S and thus the __atomic_begin and __atomic_end symbols completely. Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -13,38 +13,13 @@
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#include <asm/btfixup.h>
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/* This has special calling conventions */
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#ifndef CONFIG_SMP
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BTFIXUPDEF_CALL(void, ___xchg32, void)
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#endif
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static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val)
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{
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#ifdef CONFIG_SMP
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__asm__ __volatile__("swap [%2], %0"
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: "=&r" (val)
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: "0" (val), "r" (m)
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: "memory");
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return val;
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#else
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register unsigned long *ptr asm("g1");
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register unsigned long ret asm("g2");
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ptr = (unsigned long *) m;
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ret = val;
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/* Note: this is magic and the nop there is
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really needed. */
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__asm__ __volatile__(
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"mov %%o7, %%g4\n\t"
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"call ___f____xchg32\n\t"
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" nop\n\t"
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: "=&r" (ret)
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: "0" (ret), "r" (ptr)
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: "g3", "g4", "g7", "memory", "cc");
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return ret;
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#endif
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}
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extern void __xchg_called_with_bad_pointer(void);
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@ -29,9 +29,7 @@ EXPORT_SYMBOL(__ret_efault);
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EXPORT_SYMBOL(empty_zero_page);
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/* Defined using magic */
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#ifndef CONFIG_SMP
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EXPORT_SYMBOL(BTFIXUP_CALL(___xchg32));
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#else
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#ifdef CONFIG_SMP
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EXPORT_SYMBOL(BTFIXUP_CALL(__hard_smp_processor_id));
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#endif
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EXPORT_SYMBOL(BTFIXUP_CALL(mmu_unlockarea));
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@ -68,7 +68,6 @@ static int set_rtc_mmss(unsigned long);
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unsigned long profile_pc(struct pt_regs *regs)
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{
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extern char __copy_user_begin[], __copy_user_end[];
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extern char __atomic_begin[], __atomic_end[];
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extern char __bzero_begin[], __bzero_end[];
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unsigned long pc = regs->pc;
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@ -76,8 +75,6 @@ unsigned long profile_pc(struct pt_regs *regs)
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if (in_lock_functions(pc) ||
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(pc >= (unsigned long) __copy_user_begin &&
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pc < (unsigned long) __copy_user_end) ||
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(pc >= (unsigned long) __atomic_begin &&
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pc < (unsigned long) __atomic_end) ||
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(pc >= (unsigned long) __bzero_begin &&
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pc < (unsigned long) __bzero_end))
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pc = regs->u_regs[UREG_RETPC];
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@ -13,7 +13,7 @@ lib-y += memscan_$(BITS).o memcmp.o strncmp_$(BITS).o
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lib-y += strncpy_from_user_$(BITS).o strlen_user_$(BITS).o
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lib-$(CONFIG_SPARC32) += divdi3.o udivdi3.o
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lib-$(CONFIG_SPARC32) += copy_user.o locks.o
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lib-y += atomic_$(BITS).o
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lib-$(CONFIG_SPARC64) += atomic_64.o
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lib-$(CONFIG_SPARC32) += lshrdi3.o ashldi3.o
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lib-$(CONFIG_SPARC32) += muldi3.o bitext.o cmpdi2.o
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@ -1,24 +0,0 @@
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/* atomic.S: Move this stuff here for better ICACHE hit rates.
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*
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* Copyright (C) 1996 David S. Miller (davem@caipfs.rutgers.edu)
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*/
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#include <asm/ptrace.h>
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#include <asm/psr.h>
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.text
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.align 4
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.globl __atomic_begin
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__atomic_begin:
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#ifndef CONFIG_SMP
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.globl ___xchg32_sun4md
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___xchg32_sun4md:
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swap [%g1], %g2
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jmpl %o7 + 8, %g0
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mov %g4, %o7
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#endif
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.globl __atomic_end
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__atomic_end:
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@ -1980,13 +1980,8 @@ void __init load_mmu(void)
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{
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extern void ld_mmu_iommu(void);
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extern void ld_mmu_iounit(void);
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extern void ___xchg32_sun4md(void);
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/* Functions */
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#ifndef CONFIG_SMP
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BTFIXUPSET_CALL(___xchg32, ___xchg32_sun4md, BTFIXUPCALL_SWAPG1G2);
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#endif
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BTFIXUPSET_CALL(update_mmu_cache, srmmu_update_mmu_cache, BTFIXUPCALL_NOP);
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get_srmmu_type();
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