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perf c2c: Update documentation for metrics reorganization 

The output format for metrics has been reorganized, update documentation
to reflect the changes for it.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Cc: Al Grant <al.grant@arm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Don Zickus <dzickus@redhat.com>
Cc: Ian Rogers <irogers@google.com>
Cc: James Clark <james.clark@arm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Joe Mario <jmario@redhat.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lore.kernel.org/lkml/20201015144548.18482-10-leo.yan@linaro.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Leo Yan 2020-10-15 15:45:48 +01:00 committed by Arnaldo Carvalho de Melo
parent 91d933c221
commit 744aec4df2
1 changed files with 19 additions and 17 deletions
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36
tools/perf/Documentation/perf-c2c.txt
View File

@ -174,34 +174,36 @@ For each cacheline in the 1) list we display following data:
Cacheline Cacheline
- cacheline address (hex number) - cacheline address (hex number)
Total records
- sum of all cachelines accesses
Rmt/Lcl Hitm Rmt/Lcl Hitm
- cacheline percentage of all Remote/Local HITM accesses - cacheline percentage of all Remote/Local HITM accesses
LLC Load Hitm - Total, Lcl, Rmt LLC Load Hitm - Total, LclHitm, RmtHitm
- count of Total/Local/Remote load HITMs - count of Total/Local/Remote load HITMs
Store Reference - Total, L1Hit, L1Miss Total records
Total - all store accesses - sum of all cachelines accesses
L1Hit - store accesses that hit L1
L1Hit - store accesses that missed L1
Load Dram Total loads
- count of local and remote DRAM accesses
LLC Ld Miss
- count of all accesses that missed LLC
Total Loads
- sum of all load accesses - sum of all load accesses
Total stores
- sum of all store accesses
Store Reference - L1Hit, L1Miss
L1Hit - store accesses that hit L1
L1Miss - store accesses that missed L1
Core Load Hit - FB, L1, L2 Core Load Hit - FB, L1, L2
- count of load hits in FB (Fill Buffer), L1 and L2 cache - count of load hits in FB (Fill Buffer), L1 and L2 cache
LLC Load Hit - Llc, Rmt LLC Load Hit - LlcHit, LclHitm
- count of LLC and Remote load hits - count of LLC load accesses, includes LLC hits and LLC HITMs
RMT Load Hit - RmtHit, RmtHitm
- count of remote load accesses, includes remote hits and remote HITMs
Load Dram - Lcl, Rmt
- count of local and remote DRAM accesses
For each offset in the 2) list we display following data: For each offset in the 2) list we display following data: