powerpc/perf: Add PPMU_ARCH_207S define
commit 4d9690dd56
upstream.
Instead of separate bits for every POWER8 PMU feature, have a single one
for v2.07 of the architecture.
This saves us adding a MMCR2 define for a future patch.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Acked-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -60,8 +60,7 @@ struct power_pmu {
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#define PPMU_SIAR_VALID 0x00000010 /* Processor has SIAR Valid bit */
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#define PPMU_HAS_SSLOT 0x00000020 /* Has sampled slot in MMCRA */
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#define PPMU_HAS_SIER 0x00000040 /* Has SIER */
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#define PPMU_BHRB 0x00000080 /* has BHRB feature enabled */
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#define PPMU_EBB 0x00000100 /* supports event based branch */
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#define PPMU_ARCH_207S 0x00000080 /* PMC is architecture v2.07S */
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/*
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* Values for flags to get_alternatives()
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@ -483,7 +483,7 @@ static bool is_ebb_event(struct perf_event *event)
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* check that the PMU supports EBB, meaning those that don't can still
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* use bit 63 of the event code for something else if they wish.
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*/
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return (ppmu->flags & PPMU_EBB) &&
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return (ppmu->flags & PPMU_ARCH_207S) &&
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((event->attr.config >> PERF_EVENT_CONFIG_EBB_SHIFT) & 1);
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}
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@ -1563,7 +1563,7 @@ static int power_pmu_event_init(struct perf_event *event)
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if (has_branch_stack(event)) {
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/* PMU has BHRB enabled */
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if (!(ppmu->flags & PPMU_BHRB))
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if (!(ppmu->flags & PPMU_ARCH_207S))
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return -EOPNOTSUPP;
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}
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@ -751,7 +751,7 @@ static struct power_pmu power8_pmu = {
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.get_constraint = power8_get_constraint,
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.get_alternatives = power8_get_alternatives,
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.disable_pmc = power8_disable_pmc,
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.flags = PPMU_HAS_SSLOT | PPMU_HAS_SIER | PPMU_BHRB | PPMU_EBB,
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.flags = PPMU_HAS_SSLOT | PPMU_HAS_SIER | PPMU_ARCH_207S,
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.n_generic = ARRAY_SIZE(power8_generic_events),
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.generic_events = power8_generic_events,
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.cache_events = &power8_cache_events,
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