[ARM] nommu: start-up code
This patch adds nommu version start-up code head-nommu.S. The common part of the start-up codes is moved to head-common.S. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Hyok S. Choi
Russell King
parent
10c2df6506
commit
75d90832d5
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@ -69,7 +69,7 @@ AFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float
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CHECKFLAGS += -D__arm__
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#Default value
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head-y := arch/arm/kernel/head.o arch/arm/kernel/init_task.o
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head-y := arch/arm/kernel/head$(MMUEXT).o arch/arm/kernel/init_task.o
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textofs-y := 0x00008000
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machine-$(CONFIG_ARCH_RPC) := rpc
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@ -0,0 +1,217 @@
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/*
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* linux/arch/arm/kernel/head-common.S
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*
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* Copyright (C) 1994-2002 Russell King
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* Copyright (c) 2003 ARM Limited
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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.type __switch_data, %object
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__switch_data:
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.long __mmap_switched
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.long __data_loc @ r4
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.long __data_start @ r5
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.long __bss_start @ r6
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.long _end @ r7
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.long processor_id @ r4
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.long __machine_arch_type @ r5
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.long cr_alignment @ r6
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.long init_thread_union + THREAD_START_SP @ sp
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/*
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* The following fragment of code is executed with the MMU on in MMU mode,
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* and uses absolute addresses; this is not position independent.
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*
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* r0 = cp#15 control register
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* r1 = machine ID
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* r9 = processor ID
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*/
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.type __mmap_switched, %function
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__mmap_switched:
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adr r3, __switch_data + 4
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ldmia r3!, {r4, r5, r6, r7}
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cmp r4, r5 @ Copy data segment if needed
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1: cmpne r5, r6
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ldrne fp, [r4], #4
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strne fp, [r5], #4
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bne 1b
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mov fp, #0 @ Clear BSS (and zero fp)
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1: cmp r6, r7
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strcc fp, [r6],#4
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bcc 1b
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ldmia r3, {r4, r5, r6, sp}
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str r9, [r4] @ Save processor ID
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str r1, [r5] @ Save machine type
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bic r4, r0, #CR_A @ Clear 'A' bit
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stmia r6, {r0, r4} @ Save control register values
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b start_kernel
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/*
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* Exception handling. Something went wrong and we can't proceed. We
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* ought to tell the user, but since we don't have any guarantee that
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* we're even running on the right architecture, we do virtually nothing.
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*
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* If CONFIG_DEBUG_LL is set we try to print out something about the error
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* and hope for the best (useful if bootloader fails to pass a proper
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* machine ID for example).
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*/
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.type __error_p, %function
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__error_p:
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#ifdef CONFIG_DEBUG_LL
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adr r0, str_p1
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bl printascii
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b __error
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str_p1: .asciz "\nError: unrecognized/unsupported processor variant.\n"
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.align
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#endif
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.type __error_a, %function
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__error_a:
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#ifdef CONFIG_DEBUG_LL
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mov r4, r1 @ preserve machine ID
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adr r0, str_a1
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bl printascii
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mov r0, r4
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bl printhex8
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adr r0, str_a2
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bl printascii
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adr r3, 3f
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ldmia r3, {r4, r5, r6} @ get machine desc list
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sub r4, r3, r4 @ get offset between virt&phys
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add r5, r5, r4 @ convert virt addresses to
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add r6, r6, r4 @ physical address space
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1: ldr r0, [r5, #MACHINFO_TYPE] @ get machine type
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bl printhex8
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mov r0, #'\t'
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bl printch
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ldr r0, [r5, #MACHINFO_NAME] @ get machine name
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add r0, r0, r4
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bl printascii
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mov r0, #'\n'
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bl printch
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add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc
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cmp r5, r6
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blo 1b
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adr r0, str_a3
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bl printascii
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b __error
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str_a1: .asciz "\nError: unrecognized/unsupported machine ID (r1 = 0x"
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str_a2: .asciz ").\n\nAvailable machine support:\n\nID (hex)\tNAME\n"
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str_a3: .asciz "\nPlease check your kernel config and/or bootloader.\n"
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.align
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#endif
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.type __error, %function
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__error:
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#ifdef CONFIG_ARCH_RPC
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/*
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* Turn the screen red on a error - RiscPC only.
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*/
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mov r0, #0x02000000
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mov r3, #0x11
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orr r3, r3, r3, lsl #8
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orr r3, r3, r3, lsl #16
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str r3, [r0], #4
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str r3, [r0], #4
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str r3, [r0], #4
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str r3, [r0], #4
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#endif
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1: mov r0, r0
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b 1b
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/*
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* Read processor ID register (CP#15, CR0), and look up in the linker-built
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* supported processor list. Note that we can't use the absolute addresses
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* for the __proc_info lists since we aren't running with the MMU on
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* (and therefore, we are not in the correct address space). We have to
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* calculate the offset.
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*
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* r9 = cpuid
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* Returns:
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* r3, r4, r6 corrupted
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* r5 = proc_info pointer in physical address space
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* r9 = cpuid (preserved)
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*/
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.type __lookup_processor_type, %function
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__lookup_processor_type:
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adr r3, 3f
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ldmda r3, {r5 - r7}
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sub r3, r3, r7 @ get offset between virt&phys
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add r5, r5, r3 @ convert virt addresses to
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add r6, r6, r3 @ physical address space
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1: ldmia r5, {r3, r4} @ value, mask
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and r4, r4, r9 @ mask wanted bits
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teq r3, r4
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beq 2f
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add r5, r5, #PROC_INFO_SZ @ sizeof(proc_info_list)
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cmp r5, r6
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blo 1b
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mov r5, #0 @ unknown processor
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2: mov pc, lr
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/*
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* This provides a C-API version of the above function.
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*/
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ENTRY(lookup_processor_type)
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stmfd sp!, {r4 - r7, r9, lr}
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mov r9, r0
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bl __lookup_processor_type
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mov r0, r5
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ldmfd sp!, {r4 - r7, r9, pc}
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/*
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* Look in include/asm-arm/procinfo.h and arch/arm/kernel/arch.[ch] for
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* more information about the __proc_info and __arch_info structures.
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*/
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.long __proc_info_begin
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.long __proc_info_end
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3: .long .
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.long __arch_info_begin
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.long __arch_info_end
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/*
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* Lookup machine architecture in the linker-build list of architectures.
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* Note that we can't use the absolute addresses for the __arch_info
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* lists since we aren't running with the MMU on (and therefore, we are
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* not in the correct address space). We have to calculate the offset.
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*
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* r1 = machine architecture number
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* Returns:
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* r3, r4, r6 corrupted
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* r5 = mach_info pointer in physical address space
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*/
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.type __lookup_machine_type, %function
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__lookup_machine_type:
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adr r3, 3b
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ldmia r3, {r4, r5, r6}
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sub r3, r3, r4 @ get offset between virt&phys
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add r5, r5, r3 @ convert virt addresses to
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add r6, r6, r3 @ physical address space
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1: ldr r3, [r5, #MACHINFO_TYPE] @ get machine type
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teq r3, r1 @ matches loader number?
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beq 2f @ found
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add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc
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cmp r5, r6
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blo 1b
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mov r5, #0 @ unknown machine
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2: mov pc, lr
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/*
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* This provides a C-API version of the above function.
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*/
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ENTRY(lookup_machine_type)
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stmfd sp!, {r4 - r6, lr}
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mov r1, r0
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bl __lookup_machine_type
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mov r0, r5
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ldmfd sp!, {r4 - r6, pc}
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@ -0,0 +1,83 @@
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/*
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* linux/arch/arm/kernel/head-nommu.S
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*
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* Copyright (C) 1994-2002 Russell King
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* Copyright (C) 2003-2006 Hyok S. Choi
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Common kernel startup code (non-paged MM)
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* for 32-bit CPUs which has a process ID register(CP15).
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*
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*/
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#include <linux/config.h>
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/assembler.h>
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#include <asm/mach-types.h>
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#include <asm/procinfo.h>
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#include <asm/ptrace.h>
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#include <asm/constants.h>
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#include <asm/system.h>
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#define PROCINFO_INITFUNC 12
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/*
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* Kernel startup entry point.
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* ---------------------------
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*
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* This is normally called from the decompressor code. The requirements
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* are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
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* r1 = machine nr.
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*
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* See linux/arch/arm/tools/mach-types for the complete list of machine
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* numbers for r1.
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*
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*/
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__INIT
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.type stext, %function
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ENTRY(stext)
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msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode
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@ and irqs disabled
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mrc p15, 0, r9, c0, c0 @ get processor id
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bl __lookup_processor_type @ r5=procinfo r9=cpuid
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movs r10, r5 @ invalid processor (r5=0)?
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beq __error_p @ yes, error 'p'
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bl __lookup_machine_type @ r5=machinfo
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movs r8, r5 @ invalid machine (r5=0)?
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beq __error_a @ yes, error 'a'
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ldr r13, __switch_data @ address to jump to after
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@ the initialization is done
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adr lr, __after_proc_init @ return (PIC) address
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add pc, r10, #PROCINFO_INITFUNC
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/*
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* Set the Control Register and Read the process ID.
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*/
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.type __after_proc_init, %function
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__after_proc_init:
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mrc p15, 0, r0, c1, c0, 0 @ read control reg
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#ifdef CONFIG_ALIGNMENT_TRAP
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orr r0, r0, #CR_A
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#else
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bic r0, r0, #CR_A
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#endif
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#ifdef CONFIG_CPU_DCACHE_DISABLE
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bic r0, r0, #CR_C
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#endif
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#ifdef CONFIG_CPU_BPREDICT_DISABLE
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bic r0, r0, #CR_Z
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#endif
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#ifdef CONFIG_CPU_ICACHE_DISABLE
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bic r0, r0, #CR_I
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#endif
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mcr p15, 0, r0, c1, c0, 0 @ write control reg
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mov pc, r13 @ clear the BSS and jump
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@ to start_kernel
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#include "head-common.S"
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@ -103,49 +103,6 @@ ENTRY(stext)
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adr lr, __enable_mmu @ return (PIC) address
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add pc, r10, #PROCINFO_INITFUNC
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.type __switch_data, %object
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__switch_data:
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.long __mmap_switched
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.long __data_loc @ r4
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.long __data_start @ r5
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.long __bss_start @ r6
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.long _end @ r7
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.long processor_id @ r4
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.long __machine_arch_type @ r5
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.long cr_alignment @ r6
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.long init_thread_union + THREAD_START_SP @ sp
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/*
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* The following fragment of code is executed with the MMU on, and uses
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* absolute addresses; this is not position independent.
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*
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* r0 = cp#15 control register
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* r1 = machine ID
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* r9 = processor ID
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*/
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.type __mmap_switched, %function
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__mmap_switched:
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adr r3, __switch_data + 4
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ldmia r3!, {r4, r5, r6, r7}
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cmp r4, r5 @ Copy data segment if needed
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1: cmpne r5, r6
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ldrne fp, [r4], #4
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strne fp, [r5], #4
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bne 1b
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mov fp, #0 @ Clear BSS (and zero fp)
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1: cmp r6, r7
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strcc fp, [r6],#4
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bcc 1b
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ldmia r3, {r4, r5, r6, sp}
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str r9, [r4] @ Save processor ID
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str r1, [r5] @ Save machine type
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bic r4, r0, #CR_A @ Clear 'A' bit
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stmia r6, {r0, r4} @ Save control register values
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b start_kernel
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#if defined(CONFIG_SMP)
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.type secondary_startup, #function
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ENTRY(secondary_startup)
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@ -368,166 +325,4 @@ __create_page_tables:
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mov pc, lr
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.ltorg
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/*
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* Exception handling. Something went wrong and we can't proceed. We
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* ought to tell the user, but since we don't have any guarantee that
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* we're even running on the right architecture, we do virtually nothing.
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*
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* If CONFIG_DEBUG_LL is set we try to print out something about the error
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* and hope for the best (useful if bootloader fails to pass a proper
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* machine ID for example).
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*/
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.type __error_p, %function
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__error_p:
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#ifdef CONFIG_DEBUG_LL
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adr r0, str_p1
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bl printascii
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b __error
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str_p1: .asciz "\nError: unrecognized/unsupported processor variant.\n"
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.align
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#endif
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.type __error_a, %function
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__error_a:
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#ifdef CONFIG_DEBUG_LL
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mov r4, r1 @ preserve machine ID
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adr r0, str_a1
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bl printascii
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mov r0, r4
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bl printhex8
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adr r0, str_a2
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bl printascii
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adr r3, 3f
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ldmia r3, {r4, r5, r6} @ get machine desc list
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sub r4, r3, r4 @ get offset between virt&phys
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add r5, r5, r4 @ convert virt addresses to
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add r6, r6, r4 @ physical address space
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1: ldr r0, [r5, #MACHINFO_TYPE] @ get machine type
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bl printhex8
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mov r0, #'\t'
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bl printch
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ldr r0, [r5, #MACHINFO_NAME] @ get machine name
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add r0, r0, r4
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bl printascii
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mov r0, #'\n'
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bl printch
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add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc
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cmp r5, r6
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blo 1b
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adr r0, str_a3
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bl printascii
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b __error
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str_a1: .asciz "\nError: unrecognized/unsupported machine ID (r1 = 0x"
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str_a2: .asciz ").\n\nAvailable machine support:\n\nID (hex)\tNAME\n"
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str_a3: .asciz "\nPlease check your kernel config and/or bootloader.\n"
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.align
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#endif
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.type __error, %function
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__error:
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#ifdef CONFIG_ARCH_RPC
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/*
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* Turn the screen red on a error - RiscPC only.
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*/
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mov r0, #0x02000000
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mov r3, #0x11
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orr r3, r3, r3, lsl #8
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orr r3, r3, r3, lsl #16
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str r3, [r0], #4
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str r3, [r0], #4
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str r3, [r0], #4
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str r3, [r0], #4
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#endif
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1: mov r0, r0
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b 1b
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/*
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* Read processor ID register (CP#15, CR0), and look up in the linker-built
|
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* supported processor list. Note that we can't use the absolute addresses
|
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* for the __proc_info lists since we aren't running with the MMU on
|
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* (and therefore, we are not in the correct address space). We have to
|
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* calculate the offset.
|
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*
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* r9 = cpuid
|
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* Returns:
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* r3, r4, r6 corrupted
|
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* r5 = proc_info pointer in physical address space
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* r9 = cpuid (preserved)
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*/
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.type __lookup_processor_type, %function
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__lookup_processor_type:
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adr r3, 3f
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ldmda r3, {r5 - r7}
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sub r3, r3, r7 @ get offset between virt&phys
|
||||
add r5, r5, r3 @ convert virt addresses to
|
||||
add r6, r6, r3 @ physical address space
|
||||
1: ldmia r5, {r3, r4} @ value, mask
|
||||
and r4, r4, r9 @ mask wanted bits
|
||||
teq r3, r4
|
||||
beq 2f
|
||||
add r5, r5, #PROC_INFO_SZ @ sizeof(proc_info_list)
|
||||
cmp r5, r6
|
||||
blo 1b
|
||||
mov r5, #0 @ unknown processor
|
||||
2: mov pc, lr
|
||||
|
||||
/*
|
||||
* This provides a C-API version of the above function.
|
||||
*/
|
||||
ENTRY(lookup_processor_type)
|
||||
stmfd sp!, {r4 - r7, r9, lr}
|
||||
mov r9, r0
|
||||
bl __lookup_processor_type
|
||||
mov r0, r5
|
||||
ldmfd sp!, {r4 - r7, r9, pc}
|
||||
|
||||
/*
|
||||
* Look in include/asm-arm/procinfo.h and arch/arm/kernel/arch.[ch] for
|
||||
* more information about the __proc_info and __arch_info structures.
|
||||
*/
|
||||
.long __proc_info_begin
|
||||
.long __proc_info_end
|
||||
3: .long .
|
||||
.long __arch_info_begin
|
||||
.long __arch_info_end
|
||||
|
||||
/*
|
||||
* Lookup machine architecture in the linker-build list of architectures.
|
||||
* Note that we can't use the absolute addresses for the __arch_info
|
||||
* lists since we aren't running with the MMU on (and therefore, we are
|
||||
* not in the correct address space). We have to calculate the offset.
|
||||
*
|
||||
* r1 = machine architecture number
|
||||
* Returns:
|
||||
* r3, r4, r6 corrupted
|
||||
* r5 = mach_info pointer in physical address space
|
||||
*/
|
||||
.type __lookup_machine_type, %function
|
||||
__lookup_machine_type:
|
||||
adr r3, 3b
|
||||
ldmia r3, {r4, r5, r6}
|
||||
sub r3, r3, r4 @ get offset between virt&phys
|
||||
add r5, r5, r3 @ convert virt addresses to
|
||||
add r6, r6, r3 @ physical address space
|
||||
1: ldr r3, [r5, #MACHINFO_TYPE] @ get machine type
|
||||
teq r3, r1 @ matches loader number?
|
||||
beq 2f @ found
|
||||
add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc
|
||||
cmp r5, r6
|
||||
blo 1b
|
||||
mov r5, #0 @ unknown machine
|
||||
2: mov pc, lr
|
||||
|
||||
/*
|
||||
* This provides a C-API version of the above function.
|
||||
*/
|
||||
ENTRY(lookup_machine_type)
|
||||
stmfd sp!, {r4 - r6, lr}
|
||||
mov r1, r0
|
||||
bl __lookup_machine_type
|
||||
mov r0, r5
|
||||
ldmfd sp!, {r4 - r6, pc}
|
||||
#include "head-common.S"
|
||||
|
|
|
|||
Loading…
Reference in New Issue