thermal: exynos: remove needless triminfo_data abstraction
reg->triminfo_data is used only in exynos_tmu_initialize() and the code has already different paths for Exynos5440 and other SoC types (on which TRIMINFO_DATA register offset is identical) so the register abstraction is not needed and can be removed. There should be no functional changes caused by this patch. Cc: Amit Daniel Kachhap <amit.daniel@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Eduardo Valentin <edubezval@gmail.com> Cc: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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@ -182,22 +182,22 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
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switch (data->id) {
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switch (data->id) {
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case 0:
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case 0:
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trim_info = readl(data->base +
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trim_info = readl(data->base +
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EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
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EXYNOS5440_EFUSE_SWAP_OFFSET + EXYNOS5440_TMU_S0_7_TRIM);
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break;
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break;
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case 1:
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case 1:
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trim_info = readl(data->base + reg->triminfo_data);
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trim_info = readl(data->base + EXYNOS5440_TMU_S0_7_TRIM);
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break;
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break;
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case 2:
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case 2:
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trim_info = readl(data->base -
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trim_info = readl(data->base -
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EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
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EXYNOS5440_EFUSE_SWAP_OFFSET + EXYNOS5440_TMU_S0_7_TRIM);
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}
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}
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} else {
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} else {
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/* On exynos5420 the triminfo register is in the shared space */
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/* On exynos5420 the triminfo register is in the shared space */
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if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO)
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if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO)
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trim_info = readl(data->base_second +
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trim_info = readl(data->base_second +
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reg->triminfo_data);
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EXYNOS_TMU_REG_TRIMINFO);
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else
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else
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trim_info = readl(data->base + reg->triminfo_data);
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trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
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}
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}
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data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
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data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
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data->temp_error2 = ((trim_info >> EXYNOS_TRIMINFO_85_SHIFT) &
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data->temp_error2 = ((trim_info >> EXYNOS_TRIMINFO_85_SHIFT) &
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@ -76,7 +76,6 @@ enum soc_type {
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* struct exynos_tmu_register - register descriptors to access registers and
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* struct exynos_tmu_register - register descriptors to access registers and
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* bitfields. The register validity, offsets and bitfield values may vary
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* bitfields. The register validity, offsets and bitfield values may vary
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* slightly across different exynos SOC's.
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* slightly across different exynos SOC's.
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* @triminfo_data: register containing 2 pont trimming data
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* @triminfo_ctrl: trim info controller register.
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* @triminfo_ctrl: trim info controller register.
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* @triminfo_ctrl_count: the number of trim info controller register.
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* @triminfo_ctrl_count: the number of trim info controller register.
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* @tmu_ctrl: TMU main controller register.
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* @tmu_ctrl: TMU main controller register.
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@ -107,8 +106,6 @@ enum soc_type {
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* @tmu_pmin: register to get/set the Pmin value.
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* @tmu_pmin: register to get/set the Pmin value.
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*/
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*/
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struct exynos_tmu_registers {
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struct exynos_tmu_registers {
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u32 triminfo_data;
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u32 triminfo_ctrl[MAX_TRIMINFO_CTRL_REG];
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u32 triminfo_ctrl[MAX_TRIMINFO_CTRL_REG];
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u32 triminfo_ctrl_count;
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u32 triminfo_ctrl_count;
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@ -26,7 +26,6 @@
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#if defined(CONFIG_CPU_EXYNOS4210)
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#if defined(CONFIG_CPU_EXYNOS4210)
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static const struct exynos_tmu_registers exynos4210_tmu_registers = {
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static const struct exynos_tmu_registers exynos4210_tmu_registers = {
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.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
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.tmu_status = EXYNOS_TMU_REG_STATUS,
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.tmu_status = EXYNOS_TMU_REG_STATUS,
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.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
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.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
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@ -85,7 +84,6 @@ struct exynos_tmu_init_data const exynos4210_default_tmu_data = {
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#if defined(CONFIG_SOC_EXYNOS3250)
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#if defined(CONFIG_SOC_EXYNOS3250)
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static const struct exynos_tmu_registers exynos3250_tmu_registers = {
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static const struct exynos_tmu_registers exynos3250_tmu_registers = {
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.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
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.triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON1,
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.triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON1,
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.triminfo_ctrl[1] = EXYNOS_TMU_TRIMINFO_CON2,
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.triminfo_ctrl[1] = EXYNOS_TMU_TRIMINFO_CON2,
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.triminfo_ctrl_count = 2,
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.triminfo_ctrl_count = 2,
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@ -168,7 +166,6 @@ struct exynos_tmu_init_data const exynos3250_default_tmu_data = {
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#if defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250)
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#if defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250)
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static const struct exynos_tmu_registers exynos4412_tmu_registers = {
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static const struct exynos_tmu_registers exynos4412_tmu_registers = {
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.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
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.triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON2,
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.triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON2,
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.triminfo_ctrl_count = 1,
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.triminfo_ctrl_count = 1,
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
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@ -262,7 +259,6 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
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#if defined(CONFIG_SOC_EXYNOS5260)
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#if defined(CONFIG_SOC_EXYNOS5260)
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static const struct exynos_tmu_registers exynos5260_tmu_registers = {
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static const struct exynos_tmu_registers exynos5260_tmu_registers = {
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.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
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.therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
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.therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
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.therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
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.therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
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@ -341,7 +337,6 @@ struct exynos_tmu_init_data const exynos5260_default_tmu_data = {
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#if defined(CONFIG_SOC_EXYNOS5420)
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#if defined(CONFIG_SOC_EXYNOS5420)
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static const struct exynos_tmu_registers exynos5420_tmu_registers = {
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static const struct exynos_tmu_registers exynos5420_tmu_registers = {
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.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
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.therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
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.therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
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.therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
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.therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
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@ -428,7 +423,6 @@ struct exynos_tmu_init_data const exynos5420_default_tmu_data = {
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#if defined(CONFIG_SOC_EXYNOS5440)
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#if defined(CONFIG_SOC_EXYNOS5440)
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static const struct exynos_tmu_registers exynos5440_tmu_registers = {
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static const struct exynos_tmu_registers exynos5440_tmu_registers = {
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.triminfo_data = EXYNOS5440_TMU_S0_7_TRIM,
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.tmu_ctrl = EXYNOS5440_TMU_S0_7_CTRL,
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.tmu_ctrl = EXYNOS5440_TMU_S0_7_CTRL,
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.therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
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.therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
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.therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
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.therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
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