From 771120761fe026170f910f4e591b1e0861de0523 Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Sun, 17 Jan 2016 16:49:05 +0100 Subject: [PATCH] ARM: OMAP2+: hwmod data: Add SSI data for omap36xx This patch enables Synchronous Serial Interface (SSI) hwmod support for OMAP36xx SoCs (used by Nokia N950/N9). Signed-off-by: Sebastian Reichel Tested-by: Aaro Koskinen Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 0a985325cd64..9869a75c5d96 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -3583,14 +3583,14 @@ static struct omap_hwmod_class_sysconfig omap34xx_ssi_sysc = { .sysc_fields = &omap_hwmod_sysc_type1, }; -static struct omap_hwmod_class omap34xx_ssi_hwmod_class = { +static struct omap_hwmod_class omap3xxx_ssi_hwmod_class = { .name = "ssi", .sysc = &omap34xx_ssi_sysc, }; -static struct omap_hwmod omap34xx_ssi_hwmod = { +static struct omap_hwmod omap3xxx_ssi_hwmod = { .name = "ssi", - .class = &omap34xx_ssi_hwmod_class, + .class = &omap3xxx_ssi_hwmod_class, .clkdm_name = "core_l4_clkdm", .main_clk = "ssi_ssr_fck", .prcm = { @@ -3605,9 +3605,9 @@ static struct omap_hwmod omap34xx_ssi_hwmod = { }; /* L4 CORE -> SSI */ -static struct omap_hwmod_ocp_if omap34xx_l4_core__ssi = { +static struct omap_hwmod_ocp_if omap3xxx_l4_core__ssi = { .master = &omap3xxx_l4_core_hwmod, - .slave = &omap34xx_ssi_hwmod, + .slave = &omap3xxx_ssi_hwmod, .clk = "ssi_ick", .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3760,7 +3760,7 @@ static struct omap_hwmod_ocp_if *omap34xx_hwmod_ocp_ifs[] __initdata = { &omap3xxx_sad2d__l3, &omap3xxx_l4_core__mmu_isp, &omap3xxx_l3_main__mmu_iva, - &omap34xx_l4_core__ssi, + &omap3xxx_l4_core__ssi, NULL }; @@ -3784,6 +3784,7 @@ static struct omap_hwmod_ocp_if *omap36xx_hwmod_ocp_ifs[] __initdata = { &omap3xxx_sad2d__l3, &omap3xxx_l4_core__mmu_isp, &omap3xxx_l3_main__mmu_iva, + &omap3xxx_l4_core__ssi, NULL };