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parisc: Remove ordered stores from syscall.S 

Now that we use a sync prior to releasing the locks in syscall.S, we don't need
the PA 2.0 ordered stores used to release some locks.  Using an ordered store,
potentially slows the release and subsequent code.

There are a number of other ordered stores and loads that serve no purpose.  I
have converted these to normal stores.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Cc: stable@vger.kernel.org # 4.0+
Signed-off-by: Helge Deller <deller@gmx.de>
This commit is contained in:
John David Anglin 2018-08-12 16:38:03 -04:00 committed by Helge Deller
parent 4a53ec1ccf
commit 7797167ffd
1 changed files with 12 additions and 12 deletions
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24
arch/parisc/kernel/syscall.S
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@ -629,12 +629,12 @@ cas_action:
stw %r1, 4(%sr2,%r20) stw %r1, 4(%sr2,%r20)
#endif #endif
/* The load and store could fail */ /* The load and store could fail */
1: ldw,ma 0(%r26), %r28 1: ldw 0(%r26), %r28
sub,<> %r28, %r25, %r0 sub,<> %r28, %r25, %r0
2: stw,ma %r24, 0(%r26) 2: stw %r24, 0(%r26)
/* Free lock */ /* Free lock */
sync sync
stw,ma %r20, 0(%sr2,%r20) stw %r20, 0(%sr2,%r20)
#if ENABLE_LWS_DEBUG #if ENABLE_LWS_DEBUG
/* Clear thread register indicator */ /* Clear thread register indicator */
stw %r0, 4(%sr2,%r20) stw %r0, 4(%sr2,%r20)
@ -798,30 +798,30 @@ cas2_action:
ldo 1(%r0),%r28 ldo 1(%r0),%r28
/* 8bit CAS */ /* 8bit CAS */
13: ldb,ma 0(%r26), %r29 13: ldb 0(%r26), %r29
sub,= %r29, %r25, %r0 sub,= %r29, %r25, %r0
b,n cas2_end b,n cas2_end
14: stb,ma %r24, 0(%r26) 14: stb %r24, 0(%r26)
b cas2_end b cas2_end
copy %r0, %r28 copy %r0, %r28
nop nop
nop nop
/* 16bit CAS */ /* 16bit CAS */
15: ldh,ma 0(%r26), %r29 15: ldh 0(%r26), %r29
sub,= %r29, %r25, %r0 sub,= %r29, %r25, %r0
b,n cas2_end b,n cas2_end
16: sth,ma %r24, 0(%r26) 16: sth %r24, 0(%r26)
b cas2_end b cas2_end
copy %r0, %r28 copy %r0, %r28
nop nop
nop nop
/* 32bit CAS */ /* 32bit CAS */
17: ldw,ma 0(%r26), %r29 17: ldw 0(%r26), %r29
sub,= %r29, %r25, %r0 sub,= %r29, %r25, %r0
b,n cas2_end b,n cas2_end
18: stw,ma %r24, 0(%r26) 18: stw %r24, 0(%r26)
b cas2_end b cas2_end
copy %r0, %r28 copy %r0, %r28
nop nop
@ -829,10 +829,10 @@ cas2_action:
/* 64bit CAS */ /* 64bit CAS */
#ifdef CONFIG_64BIT #ifdef CONFIG_64BIT
19: ldd,ma 0(%r26), %r29 19: ldd 0(%r26), %r29
sub,*= %r29, %r25, %r0 sub,*= %r29, %r25, %r0
b,n cas2_end b,n cas2_end
20: std,ma %r24, 0(%r26) 20: std %r24, 0(%r26)
copy %r0, %r28 copy %r0, %r28
#else #else
/* Compare first word */ /* Compare first word */
@ -851,7 +851,7 @@ cas2_action:
cas2_end: cas2_end:
/* Free lock */ /* Free lock */
sync sync
stw,ma %r20, 0(%sr2,%r20) stw %r20, 0(%sr2,%r20)
/* Enable interrupts */ /* Enable interrupts */
ssm PSW_SM_I, %r0 ssm PSW_SM_I, %r0
/* Return to userspace, set no error */ /* Return to userspace, set no error */