Staging/IIO fixes for 4.16-rc2
Here are a small number of staging and iio driver fixes for 4.16-rc2. The IIO fixes are all for reported things, and the android driver fixes also resolve some reported problems. The remaining fsl-mc Kconfig change resolves a build testing error that Arnd reported. All of these have been in linux-next with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWo62hg8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ymTsgCg0xEZDChQWSypqA7mw6/0c18iitkAoIyAtoST 4I0CZwJ/rXtSpmZds8MT =Repf -----END PGP SIGNATURE----- Merge tag 'staging-4.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging/IIO fixes from Greg KH: "Here are a small number of staging and iio driver fixes for 4.16-rc2. The IIO fixes are all for reported things, and the android driver fixes also resolve some reported problems. The remaining fsl-mc Kconfig change resolves a build testing error that Arnd reported. All of these have been in linux-next with no reported issues" * tag 'staging-4.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: iio: buffer: check if a buffer has been set up when poll is called iio: adis_lib: Initialize trigger before requesting interrupt staging: android: ion: Zero CMA allocated memory staging: android: ashmem: Fix a race condition in pin ioctls staging: fsl-mc: fix build testing on x86 iio: srf08: fix link error "devm_iio_triggered_buffer_setup" undefined staging: iio: ad5933: switch buffer mode to software iio: adc: stm32: fix stm32h7_adc_enable error handling staging: iio: adc: ad7192: fix external frequency setting iio: adc: aspeed: Fix error handling path
This commit is contained in:
commit
77f892eb46
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@ -243,7 +243,7 @@ static int aspeed_adc_probe(struct platform_device *pdev)
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ASPEED_ADC_INIT_POLLING_TIME,
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ASPEED_ADC_INIT_TIMEOUT);
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if (ret)
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goto scaler_error;
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goto poll_timeout_error;
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}
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/* Start all channels in normal mode. */
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@ -274,9 +274,10 @@ iio_register_error:
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writel(ASPEED_OPERATION_MODE_POWER_DOWN,
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data->base + ASPEED_REG_ENGINE_CONTROL);
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clk_disable_unprepare(data->clk_scaler->clk);
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reset_error:
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reset_control_assert(data->rst);
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clk_enable_error:
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poll_timeout_error:
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reset_control_assert(data->rst);
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reset_error:
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clk_hw_unregister_divider(data->clk_scaler);
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scaler_error:
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clk_hw_unregister_divider(data->clk_prescaler);
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@ -722,8 +722,6 @@ static int stm32h7_adc_enable(struct stm32_adc *adc)
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int ret;
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u32 val;
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/* Clear ADRDY by writing one, then enable ADC */
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stm32_adc_set_bits(adc, STM32H7_ADC_ISR, STM32H7_ADRDY);
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stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADEN);
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/* Poll for ADRDY to be set (after adc startup time) */
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@ -731,8 +729,11 @@ static int stm32h7_adc_enable(struct stm32_adc *adc)
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val & STM32H7_ADRDY,
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100, STM32_ADC_TIMEOUT_US);
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if (ret) {
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stm32_adc_clr_bits(adc, STM32H7_ADC_CR, STM32H7_ADEN);
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stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADDIS);
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dev_err(&indio_dev->dev, "Failed to enable ADC\n");
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} else {
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/* Clear ADRDY by writing one */
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stm32_adc_set_bits(adc, STM32H7_ADC_ISR, STM32H7_ADRDY);
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}
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return ret;
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@ -46,6 +46,10 @@ int adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev)
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if (adis->trig == NULL)
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return -ENOMEM;
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adis->trig->dev.parent = &adis->spi->dev;
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adis->trig->ops = &adis_trigger_ops;
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iio_trigger_set_drvdata(adis->trig, adis);
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ret = request_irq(adis->spi->irq,
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&iio_trigger_generic_data_rdy_poll,
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IRQF_TRIGGER_RISING,
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@ -54,9 +58,6 @@ int adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev)
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if (ret)
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goto error_free_trig;
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adis->trig->dev.parent = &adis->spi->dev;
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adis->trig->ops = &adis_trigger_ops;
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iio_trigger_set_drvdata(adis->trig, adis);
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ret = iio_trigger_register(adis->trig);
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indio_dev->trig = iio_trigger_get(adis->trig);
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@ -175,7 +175,7 @@ __poll_t iio_buffer_poll(struct file *filp,
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struct iio_dev *indio_dev = filp->private_data;
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struct iio_buffer *rb = indio_dev->buffer;
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if (!indio_dev->info)
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if (!indio_dev->info || rb == NULL)
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return 0;
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poll_wait(filp, &rb->pollq, wait);
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@ -68,6 +68,8 @@ config SX9500
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config SRF08
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tristate "Devantech SRF02/SRF08/SRF10 ultrasonic ranger sensor"
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select IIO_BUFFER
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select IIO_TRIGGERED_BUFFER
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depends on I2C
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help
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Say Y here to build a driver for Devantech SRF02/SRF08/SRF10
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@ -702,30 +702,32 @@ static int ashmem_pin_unpin(struct ashmem_area *asma, unsigned long cmd,
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size_t pgstart, pgend;
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int ret = -EINVAL;
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if (unlikely(!asma->file))
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return -EINVAL;
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mutex_lock(&ashmem_mutex);
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if (unlikely(copy_from_user(&pin, p, sizeof(pin))))
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return -EFAULT;
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if (unlikely(!asma->file))
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goto out_unlock;
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if (unlikely(copy_from_user(&pin, p, sizeof(pin)))) {
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ret = -EFAULT;
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goto out_unlock;
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}
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/* per custom, you can pass zero for len to mean "everything onward" */
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if (!pin.len)
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pin.len = PAGE_ALIGN(asma->size) - pin.offset;
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if (unlikely((pin.offset | pin.len) & ~PAGE_MASK))
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return -EINVAL;
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goto out_unlock;
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if (unlikely(((__u32)-1) - pin.offset < pin.len))
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return -EINVAL;
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goto out_unlock;
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if (unlikely(PAGE_ALIGN(asma->size) < pin.offset + pin.len))
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return -EINVAL;
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goto out_unlock;
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pgstart = pin.offset / PAGE_SIZE;
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pgend = pgstart + (pin.len / PAGE_SIZE) - 1;
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mutex_lock(&ashmem_mutex);
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switch (cmd) {
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case ASHMEM_PIN:
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ret = ashmem_pin(asma, pgstart, pgend);
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@ -738,6 +740,7 @@ static int ashmem_pin_unpin(struct ashmem_area *asma, unsigned long cmd,
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break;
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}
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out_unlock:
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mutex_unlock(&ashmem_mutex);
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return ret;
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@ -12,6 +12,7 @@
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#include <linux/err.h>
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#include <linux/cma.h>
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#include <linux/scatterlist.h>
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#include <linux/highmem.h>
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#include "ion.h"
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@ -42,6 +43,22 @@ static int ion_cma_allocate(struct ion_heap *heap, struct ion_buffer *buffer,
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if (!pages)
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return -ENOMEM;
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if (PageHighMem(pages)) {
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unsigned long nr_clear_pages = nr_pages;
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struct page *page = pages;
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while (nr_clear_pages > 0) {
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void *vaddr = kmap_atomic(page);
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memset(vaddr, 0, PAGE_SIZE);
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kunmap_atomic(vaddr);
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page++;
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nr_clear_pages--;
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}
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} else {
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memset(page_address(pages), 0, size);
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}
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table = kmalloc(sizeof(*table), GFP_KERNEL);
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if (!table)
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goto err;
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@ -7,7 +7,7 @@
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config FSL_MC_BUS
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bool "QorIQ DPAA2 fsl-mc bus driver"
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depends on OF && (ARCH_LAYERSCAPE || (COMPILE_TEST && (ARM || ARM64 || X86 || PPC)))
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depends on OF && (ARCH_LAYERSCAPE || (COMPILE_TEST && (ARM || ARM64 || X86_LOCAL_APIC || PPC)))
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select GENERIC_MSI_IRQ_DOMAIN
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help
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Driver to enable the bus infrastructure for the QorIQ DPAA2
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@ -141,6 +141,8 @@
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#define AD7192_GPOCON_P1DAT BIT(1) /* P1 state */
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#define AD7192_GPOCON_P0DAT BIT(0) /* P0 state */
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#define AD7192_EXT_FREQ_MHZ_MIN 2457600
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#define AD7192_EXT_FREQ_MHZ_MAX 5120000
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#define AD7192_INT_FREQ_MHZ 4915200
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/* NOTE:
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ARRAY_SIZE(ad7192_calib_arr));
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}
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static inline bool ad7192_valid_external_frequency(u32 freq)
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{
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return (freq >= AD7192_EXT_FREQ_MHZ_MIN &&
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freq <= AD7192_EXT_FREQ_MHZ_MAX);
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}
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static int ad7192_setup(struct ad7192_state *st,
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const struct ad7192_platform_data *pdata)
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{
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id);
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switch (pdata->clock_source_sel) {
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case AD7192_CLK_EXT_MCLK1_2:
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case AD7192_CLK_EXT_MCLK2:
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st->mclk = AD7192_INT_FREQ_MHZ;
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break;
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case AD7192_CLK_INT:
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case AD7192_CLK_INT_CO:
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if (pdata->ext_clk_hz)
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st->mclk = pdata->ext_clk_hz;
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else
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st->mclk = AD7192_INT_FREQ_MHZ;
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st->mclk = AD7192_INT_FREQ_MHZ;
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break;
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case AD7192_CLK_EXT_MCLK1_2:
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case AD7192_CLK_EXT_MCLK2:
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if (ad7192_valid_external_frequency(pdata->ext_clk_hz)) {
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st->mclk = pdata->ext_clk_hz;
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break;
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}
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dev_err(&st->sd.spi->dev, "Invalid frequency setting %u\n",
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pdata->ext_clk_hz);
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ret = -EINVAL;
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goto out;
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default:
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ret = -EINVAL;
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goto out;
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@ -648,8 +648,6 @@ static int ad5933_register_ring_funcs_and_init(struct iio_dev *indio_dev)
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/* Ring buffer functions - here trigger setup related */
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indio_dev->setup_ops = &ad5933_ring_setup_ops;
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indio_dev->modes |= INDIO_BUFFER_HARDWARE;
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return 0;
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}
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indio_dev->dev.parent = &client->dev;
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indio_dev->info = &ad5933_info;
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indio_dev->name = id->name;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE);
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indio_dev->channels = ad5933_channels;
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indio_dev->num_channels = ARRAY_SIZE(ad5933_channels);
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