ARM: OMAP: McBSP: Add support for mcbsp on mach-omap2
This patch adds support for mach-omap2 based on current mcbsp platform driver. Signed-off-by: Eduardo Valentin <eduardo.valentin@indt.org.br> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Eduardo Valentin
Tony Lindgren
parent
44ec9a3371
commit
78673bc898
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@ -6,6 +6,8 @@
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obj-y := irq.o id.o io.o memory.o control.o prcm.o clock.o mux.o \
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devices.o serial.o gpmc.o timer-gp.o
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obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
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# Functions loaded to SRAM
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obj-$(CONFIG_ARCH_OMAP2420) += sram242x.o
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obj-$(CONFIG_ARCH_OMAP2430) += sram243x.o
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@ -1365,7 +1365,8 @@ static const struct clksel mcbsp_15_clksel[] = {
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};
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static struct clk mcbsp5_fck = {
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.name = "mcbsp5_fck",
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.name = "mcbsp_fck",
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.id = 5,
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.init = &omap2_init_clksel_parent,
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
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.enable_bit = OMAP3430_EN_MCBSP5_SHIFT,
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@ -1377,7 +1378,8 @@ static struct clk mcbsp5_fck = {
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};
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static struct clk mcbsp1_fck = {
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.name = "mcbsp1_fck",
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.name = "mcbsp_fck",
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.id = 1,
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.init = &omap2_init_clksel_parent,
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
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.enable_bit = OMAP3430_EN_MCBSP1_SHIFT,
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@ -1789,7 +1791,8 @@ static struct clk gpt10_ick = {
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};
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static struct clk mcbsp5_ick = {
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.name = "mcbsp5_ick",
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.name = "mcbsp_ick",
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.id = 5,
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.parent = &core_l4_ick,
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
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.enable_bit = OMAP3430_EN_MCBSP5_SHIFT,
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@ -1798,7 +1801,8 @@ static struct clk mcbsp5_ick = {
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};
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static struct clk mcbsp1_ick = {
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.name = "mcbsp1_ick",
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.name = "mcbsp_ick",
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.id = 1,
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.parent = &core_l4_ick,
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
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.enable_bit = OMAP3430_EN_MCBSP1_SHIFT,
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@ -2541,7 +2545,8 @@ static struct clk gpt2_ick = {
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};
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static struct clk mcbsp2_ick = {
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.name = "mcbsp2_ick",
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.name = "mcbsp_ick",
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.id = 2,
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.parent = &per_l4_ick,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
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.enable_bit = OMAP3430_EN_MCBSP2_SHIFT,
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@ -2550,7 +2555,8 @@ static struct clk mcbsp2_ick = {
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};
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static struct clk mcbsp3_ick = {
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.name = "mcbsp3_ick",
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.name = "mcbsp_ick",
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.id = 3,
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.parent = &per_l4_ick,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
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.enable_bit = OMAP3430_EN_MCBSP3_SHIFT,
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@ -2559,7 +2565,8 @@ static struct clk mcbsp3_ick = {
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};
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static struct clk mcbsp4_ick = {
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.name = "mcbsp4_ick",
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.name = "mcbsp_ick",
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.id = 4,
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.parent = &per_l4_ick,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
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.enable_bit = OMAP3430_EN_MCBSP4_SHIFT,
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@ -2574,7 +2581,8 @@ static const struct clksel mcbsp_234_clksel[] = {
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};
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static struct clk mcbsp2_fck = {
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.name = "mcbsp2_fck",
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.name = "mcbsp_fck",
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.id = 2,
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.init = &omap2_init_clksel_parent,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_bit = OMAP3430_EN_MCBSP2_SHIFT,
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@ -2586,7 +2594,8 @@ static struct clk mcbsp2_fck = {
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};
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static struct clk mcbsp3_fck = {
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.name = "mcbsp3_fck",
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.name = "mcbsp_fck",
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.id = 3,
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.init = &omap2_init_clksel_parent,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_bit = OMAP3430_EN_MCBSP3_SHIFT,
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@ -2598,7 +2607,8 @@ static struct clk mcbsp3_fck = {
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};
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static struct clk mcbsp4_fck = {
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.name = "mcbsp4_fck",
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.name = "mcbsp_fck",
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.id = 4,
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.init = &omap2_init_clksel_parent,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_bit = OMAP3430_EN_MCBSP4_SHIFT,
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@ -0,0 +1,208 @@
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/*
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* linux/arch/arm/mach-omap2/mcbsp.c
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*
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* Copyright (C) 2008 Instituto Nokia de Tecnologia
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* Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Multichannel mode not supported.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <asm/arch/dma.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/mcbsp.h>
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struct mcbsp_internal_clk {
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struct clk clk;
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struct clk **childs;
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int n_childs;
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};
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#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
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static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
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{
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const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
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int i;
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mclk->n_childs = ARRAY_SIZE(clk_names);
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mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
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GFP_KERNEL);
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for (i = 0; i < mclk->n_childs; i++) {
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/* We fake a platform device to get correct device id */
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struct platform_device pdev;
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pdev.dev.bus = &platform_bus_type;
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pdev.id = mclk->clk.id;
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mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
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if (IS_ERR(mclk->childs[i]))
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printk(KERN_ERR "Could not get clock %s (%d).\n",
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clk_names[i], mclk->clk.id);
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}
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}
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static int omap_mcbsp_clk_enable(struct clk *clk)
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{
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struct mcbsp_internal_clk *mclk = container_of(clk,
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struct mcbsp_internal_clk, clk);
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int i;
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for (i = 0; i < mclk->n_childs; i++)
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clk_enable(mclk->childs[i]);
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return 0;
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}
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static void omap_mcbsp_clk_disable(struct clk *clk)
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{
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struct mcbsp_internal_clk *mclk = container_of(clk,
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struct mcbsp_internal_clk, clk);
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int i;
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for (i = 0; i < mclk->n_childs; i++)
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clk_disable(mclk->childs[i]);
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}
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static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
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{
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.clk = {
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.name = "mcbsp_clk",
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.id = 1,
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.enable = omap_mcbsp_clk_enable,
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.disable = omap_mcbsp_clk_disable,
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},
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},
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{
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.clk = {
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.name = "mcbsp_clk",
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.id = 2,
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.enable = omap_mcbsp_clk_enable,
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.disable = omap_mcbsp_clk_disable,
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},
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},
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};
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#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks)
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#else
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#define omap_mcbsp_clks_size 0
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static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
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static inline void omap_mcbsp_clk_init(struct clk *clk)
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{ }
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#endif
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static void omap2_mcbsp2_mux_setup(void)
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{
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omap_cfg_reg(Y15_24XX_MCBSP2_CLKX);
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omap_cfg_reg(R14_24XX_MCBSP2_FSX);
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omap_cfg_reg(W15_24XX_MCBSP2_DR);
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omap_cfg_reg(V15_24XX_MCBSP2_DX);
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omap_cfg_reg(V14_24XX_GPIO117);
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/*
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* TODO: Need to add MUX settings for OMAP 2430 SDP
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*/
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}
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static void omap2_mcbsp_request(unsigned int id)
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{
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if (cpu_is_omap2420() && (id == OMAP_MCBSP2))
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omap2_mcbsp2_mux_setup();
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}
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static int omap2_mcbsp_check(unsigned int id)
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{
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if (id > OMAP_MAX_MCBSP_COUNT - 1) {
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printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1);
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return -ENODEV;
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}
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return 0;
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}
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static struct omap_mcbsp_ops omap2_mcbsp_ops = {
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.request = omap2_mcbsp_request,
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.check = omap2_mcbsp_check,
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};
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#ifdef CONFIG_ARCH_OMAP24XX
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static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = {
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{
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.virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE),
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.dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
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.dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
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.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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.clk_name = "mcbsp_clk",
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},
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{
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.virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE),
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.dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
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.dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
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.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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.clk_name = "mcbsp_clk",
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},
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};
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#define OMAP24XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap24xx_mcbsp_pdata)
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#else
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#define omap24xx_mcbsp_pdata NULL
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#define OMAP24XX_MCBSP_PDATA_SZ 0
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#endif
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#ifdef CONFIG_ARCH_OMAP34XX
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static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
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{
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.virt_base = IO_ADDRESS(OMAP34XX_MCBSP1_BASE),
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.dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
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.dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
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.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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.clk_name = "mcbsp_clk",
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},
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{
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.virt_base = IO_ADDRESS(OMAP34XX_MCBSP2_BASE),
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.dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
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.dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
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.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
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.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
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.ops = &omap2_mcbsp_ops,
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.clk_name = "mcbsp_clk",
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},
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};
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#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata)
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#else
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#define omap34xx_mcbsp_pdata NULL
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#define OMAP34XX_MCBSP_PDATA_SZ 0
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#endif
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int __init omap2_mcbsp_init(void)
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{
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int i;
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for (i = 0; i < omap_mcbsp_clks_size; i++) {
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/* Once we call clk_get inside init, we do not register it */
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omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
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clk_register(&omap_mcbsp_clks[i].clk);
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}
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if (cpu_is_omap24xx())
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omap_mcbsp_register_board_cfg(omap24xx_mcbsp_pdata,
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OMAP24XX_MCBSP_PDATA_SZ);
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if (cpu_is_omap34xx())
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omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata,
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OMAP34XX_MCBSP_PDATA_SZ);
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return omap_mcbsp_init();
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}
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arch_initcall(omap2_mcbsp_init);
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