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Merge master.kernel.org:/home/rmk/linux-2.6-arm

This commit is contained in:
Linus Torvalds 2005-08-17 13:02:22 -07:00
parent c4f92dba97 62ee914ef2
commit 7974b1cc78
6 changed files with 25 additions and 28 deletions
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6
arch/arm/kernel/calls.S
View File

@ -327,6 +327,12 @@ __syscall_start:
/* 310 */ .long sys_request_key
.long sys_keyctl
.long sys_semtimedop
/* vserver */ .long sys_ni_syscall
.long sys_ioprio_set
/* 315 */ .long sys_ioprio_get
.long sys_inotify_init
.long sys_inotify_add_watch
.long sys_inotify_rm_watch
__syscall_end:
.rept NR_syscalls - (__syscall_end - __syscall_start) / 4

4
arch/arm/mach-s3c2410/s3c2410.c
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@ -18,6 +18,7 @@
* 28-Sep-2004 BJD Updates for new serial port bits
* 04-Nov-2004 BJD Updated UART configuration process
* 10-Jan-2005 BJD Removed s3c2410_clock_tick_rate
* 13-Aug-2005 DA Removed UART from initial I/O mappings
*/
#include <linux/kernel.h>
@ -49,10 +50,9 @@ static struct map_desc s3c2410_iodesc[] __initdata = {
IODESC_ENT(USBHOST),
IODESC_ENT(CLKPWR),
IODESC_ENT(LCD),
IODESC_ENT(UART),
IODESC_ENT(TIMER),
IODESC_ENT(ADC),
IODESC_ENT(WATCHDOG)
IODESC_ENT(WATCHDOG),
};
static struct resource s3c_uart0_resource[] = {

2
arch/arm/mm/Kconfig
View File

@ -384,7 +384,7 @@ config CPU_DCACHE_DISABLE
config CPU_DCACHE_WRITETHROUGH
bool "Force write through D-cache"
depends on (CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020) && !CPU_DISABLE_DCACHE
depends on (CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020) && !CPU_DCACHE_DISABLE
default y if CPU_ARM925T
help
Say Y here to use the data cache in writethrough mode. Unless you

2
arch/arm/mm/proc-v6.S
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@ -105,7 +105,7 @@ ENTRY(cpu_v6_dcache_clean_area)
ENTRY(cpu_v6_switch_mm)
mov r2, #0
ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id
mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
mcr p15, 0, r2, c7, c10, 4 @ drain write buffer
mcr p15, 0, r0, c2, c0, 0 @ set TTB 0
mcr p15, 0, r1, c13, c0, 1 @ set context ID

34
arch/arm/nwfpe/softfloat.c
View File

@ -1602,9 +1602,7 @@ flag float32_le_quiet( float32 a, float32 b )
if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
|| ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
) {
if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {
float_raise( float_flag_invalid );
}
/* Do nothing, even if NaN as we're quiet */
return 0;
}
aSign = extractFloat32Sign( a );
@ -1629,9 +1627,7 @@ flag float32_lt_quiet( float32 a, float32 b )
if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
|| ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
) {
if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {
float_raise( float_flag_invalid );
}
/* Do nothing, even if NaN as we're quiet */
return 0;
}
aSign = extractFloat32Sign( a );
@ -2493,9 +2489,7 @@ flag float64_le_quiet( float64 a, float64 b )
if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
|| ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
) {
if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {
float_raise( float_flag_invalid );
}
/* Do nothing, even if NaN as we're quiet */
return 0;
}
aSign = extractFloat64Sign( a );
@ -2520,9 +2514,7 @@ flag float64_lt_quiet( float64 a, float64 b )
if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
|| ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
) {
if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {
float_raise( float_flag_invalid );
}
/* Do nothing, even if NaN as we're quiet */
return 0;
}
aSign = extractFloat64Sign( a );
@ -3256,7 +3248,7 @@ flag floatx80_eq( floatx80 a, floatx80 b )
) {
if ( floatx80_is_signaling_nan( a )
|| floatx80_is_signaling_nan( b ) ) {
roundData->exception |= float_flag_invalid;
float_raise( float_flag_invalid );
}
return 0;
}
@ -3286,7 +3278,7 @@ flag floatx80_le( floatx80 a, floatx80 b )
|| ( ( extractFloatx80Exp( b ) == 0x7FFF )
&& (bits64) ( extractFloatx80Frac( b )<<1 ) )
) {
roundData->exception |= float_flag_invalid;
float_raise( float_flag_invalid );
return 0;
}
aSign = extractFloatx80Sign( a );
@ -3320,7 +3312,7 @@ flag floatx80_lt( floatx80 a, floatx80 b )
|| ( ( extractFloatx80Exp( b ) == 0x7FFF )
&& (bits64) ( extractFloatx80Frac( b )<<1 ) )
) {
roundData->exception |= float_flag_invalid;
float_raise( float_flag_invalid );
return 0;
}
aSign = extractFloatx80Sign( a );
@ -3353,7 +3345,7 @@ flag floatx80_eq_signaling( floatx80 a, floatx80 b )
|| ( ( extractFloatx80Exp( b ) == 0x7FFF )
&& (bits64) ( extractFloatx80Frac( b )<<1 ) )
) {
roundData->exception |= float_flag_invalid;
float_raise( float_flag_invalid );
return 0;
}
return
@ -3382,10 +3374,7 @@ flag floatx80_le_quiet( floatx80 a, floatx80 b )
|| ( ( extractFloatx80Exp( b ) == 0x7FFF )
&& (bits64) ( extractFloatx80Frac( b )<<1 ) )
) {
if ( floatx80_is_signaling_nan( a )
|| floatx80_is_signaling_nan( b ) ) {
roundData->exception |= float_flag_invalid;
}
/* Do nothing, even if NaN as we're quiet */
return 0;
}
aSign = extractFloatx80Sign( a );
@ -3419,10 +3408,7 @@ flag floatx80_lt_quiet( floatx80 a, floatx80 b )
|| ( ( extractFloatx80Exp( b ) == 0x7FFF )
&& (bits64) ( extractFloatx80Frac( b )<<1 ) )
) {
if ( floatx80_is_signaling_nan( a )
|| floatx80_is_signaling_nan( b ) ) {
roundData->exception |= float_flag_invalid;
}
/* Do nothing, even if NaN as we're quiet */
return 0;
}
aSign = extractFloatx80Sign( a );

5
include/asm-arm/unistd.h
View File

@ -350,6 +350,11 @@
#endif
#define __NR_vserver (__NR_SYSCALL_BASE+313)
#define __NR_ioprio_set (__NR_SYSCALL_BASE+314)
#define __NR_ioprio_get (__NR_SYSCALL_BASE+315)
#define __NR_inotify_init (__NR_SYSCALL_BASE+316)
#define __NR_inotify_add_watch (__NR_SYSCALL_BASE+317)
#define __NR_inotify_rm_watch (__NR_SYSCALL_BASE+318)
/*
* The following SWIs are ARM private.