cpufreq: imx-cpufreq-dt: Correct i.MX8MN's default speed grade value
[ Upstream commitaf44d180e3
] i.MX8MN has different speed grade definition compared to i.MX8MQ/i.MX8MM, when fuses are NOT written, the default speed_grade should be set to minimum available OPP defined in DT which is 1.2GHz, the corresponding speed_grade value should be 0xb. Fixes:5b8010ba70
("cpufreq: imx-cpufreq-dt: Add i.MX8MN support") Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -44,19 +44,19 @@ static int imx_cpufreq_dt_probe(struct platform_device *pdev)
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mkt_segment = (cell_value & OCOTP_CFG3_MKT_SEGMENT_MASK) >> OCOTP_CFG3_MKT_SEGMENT_SHIFT;
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/*
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* Early samples without fuses written report "0 0" which means
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* consumer segment and minimum speed grading.
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*
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* According to datasheet minimum speed grading is not supported for
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* consumer parts so clamp to 1 to avoid warning for "no OPPs"
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* Early samples without fuses written report "0 0" which may NOT
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* match any OPP defined in DT. So clamp to minimum OPP defined in
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* DT to avoid warning for "no OPPs".
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*
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* Applies to i.MX8M series SoCs.
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*/
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if (mkt_segment == 0 && speed_grade == 0 && (
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of_machine_is_compatible("fsl,imx8mm") ||
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of_machine_is_compatible("fsl,imx8mn") ||
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of_machine_is_compatible("fsl,imx8mq")))
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speed_grade = 1;
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if (mkt_segment == 0 && speed_grade == 0) {
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if (of_machine_is_compatible("fsl,imx8mm") ||
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of_machine_is_compatible("fsl,imx8mq"))
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speed_grade = 1;
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if (of_machine_is_compatible("fsl,imx8mn"))
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speed_grade = 0xb;
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}
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supported_hw[0] = BIT(speed_grade);
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supported_hw[1] = BIT(mkt_segment);
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