ARM: at91: Add at91sam9rl DT SoC support
This adds preliminary DT support for the at91sam9rl. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <b.brezillon.dev@gmail.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This commit is contained in:
Alexandre Belloni
Nicolas Ferre
parent
09ab012acc
commit
7aff448f3e
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@ -0,0 +1,577 @@
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/*
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* at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
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*
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* Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
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*
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* Licensed under GPLv2 or later.
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*/
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#include "skeleton.dtsi"
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#include <dt-bindings/pinctrl/at91.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Atmel AT91SAM9RL family SoC";
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compatible = "atmel,at91sam9rl", "atmel,at91sam9";
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interrupt-parent = <&aic>;
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aliases {
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serial0 = &dbgu;
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serial1 = &usart0;
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serial2 = &usart1;
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serial3 = &usart2;
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serial4 = &usart3;
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gpio0 = &pioA;
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gpio1 = &pioB;
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gpio2 = &pioC;
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gpio3 = &pioD;
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tcb0 = &tcb0;
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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ssc0 = &ssc0;
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ssc1 = &ssc1;
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};
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cpus {
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#address-cells = <0>;
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#size-cells = <0>;
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cpu {
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compatible = "arm,arm926ej-s";
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device_type = "cpu";
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};
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};
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memory {
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reg = <0x20000000 0x04000000>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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nand0: nand@40000000 {
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compatible = "atmel,at91rm9200-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x40000000 0x10000000>,
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<0xffffe800 0x200>;
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atmel,nand-addr-offset = <21>;
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atmel,nand-cmd-offset = <22>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand>;
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gpios = <&pioD 17 GPIO_ACTIVE_HIGH>,
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<&pioB 6 GPIO_ACTIVE_HIGH>,
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<0>;
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status = "disabled";
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};
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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tcb0: timer@fffa0000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfffa0000 0x100>;
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interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
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<17 IRQ_TYPE_LEVEL_HIGH 0>,
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<18 IRQ_TYPE_LEVEL_HIGH 0>;
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};
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mmc0: mmc@fffa4000 {
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compatible = "atmel,hsmci";
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reg = <0xfffa4000 0x600>;
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interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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status = "disabled";
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};
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i2c0: i2c@fffa8000 {
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compatible = "atmel,at91sam9260-i2c";
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reg = <0xfffa8000 0x100>;
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interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c1: i2c@fffac000 {
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compatible = "atmel,at91sam9260-i2c";
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reg = <0xfffac000 0x100>;
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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usart0: serial@fffb0000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffb0000 0x200>;
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interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart0>;
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status = "disabled";
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};
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usart1: serial@fffb4000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffb4000 0x200>;
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interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart1>;
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status = "disabled";
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};
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usart2: serial@fffb8000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffb8000 0x200>;
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interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart2>;
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status = "disabled";
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};
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usart3: serial@fffbc000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffbc000 0x200>;
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interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart3>;
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status = "disabled";
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};
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ssc0: ssc@fffc0000 {
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compatible = "atmel,at91rm9200-ssc";
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reg = <0xfffc0000 0x4000>;
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interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
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status = "disabled";
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};
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ssc1: ssc@fffc4000 {
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compatible = "atmel,at91rm9200-ssc";
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reg = <0xfffc4000 0x4000>;
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interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
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status = "disabled";
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};
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spi0: spi@fffcc000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "atmel,at91rm9200-spi";
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reg = <0xfffcc000 0x200>;
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interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi0>;
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status = "disabled";
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};
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ramc0: ramc@ffffea00 {
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compatible = "atmel,at91sam9260-sdramc";
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reg = <0xffffea00 0x200>;
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};
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aic: interrupt-controller@fffff000 {
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#interrupt-cells = <3>;
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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reg = <0xfffff000 0x200>;
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atmel,external-irqs = <31>;
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};
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dbgu: serial@fffff200 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffff200 0x200>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dbgu>;
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status = "disabled";
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};
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pinctrl@fffff400 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
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ranges = <0xfffff400 0xfffff400 0x800>;
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atmel,mux-mask =
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/* A B */
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<0xffffffff 0xe05c6738>, /* pioA */
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<0xffffffff 0x0000c780>, /* pioB */
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<0xffffffff 0xe3ffff0e>, /* pioC */
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<0x003fffff 0x0001ff3c>; /* pioD */
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/* shared pinctrl settings */
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dbgu {
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pinctrl_dbgu: dbgu-0 {
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atmel,pins =
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<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
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<AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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};
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i2c_gpio0 {
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pinctrl_i2c_gpio0: i2c_gpio0-0 {
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atmel,pins =
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<AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
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<AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
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};
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};
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i2c_gpio1 {
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pinctrl_i2c_gpio1: i2c_gpio1-0 {
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atmel,pins =
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<AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
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<AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
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};
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};
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mmc0 {
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pinctrl_mmc0_clk: mmc0_clk-0 {
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atmel,pins =
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<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
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atmel,pins =
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<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
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<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
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atmel,pins =
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<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
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<AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
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<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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};
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nand {
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pinctrl_nand: nand-0 {
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atmel,pins =
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<AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
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<AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_nand0_ale_cle: nand_ale_cle-0 {
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atmel,pins =
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<AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
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<AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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pinctrl_nand0_oe_we: nand_oe_we-0 {
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atmel,pins =
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<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
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<AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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pinctrl_nand0_cs: nand_cs-0 {
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atmel,pins =
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<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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};
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ssc0 {
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pinctrl_ssc0_tx: ssc0_tx-0 {
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atmel,pins =
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<AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
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<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
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<AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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pinctrl_ssc0_rx: ssc0_rx-0 {
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atmel,pins =
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<AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
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<AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
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<AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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};
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};
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ssc1 {
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pinctrl_ssc1_tx: ssc1_tx-0 {
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atmel,pins =
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<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
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<AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
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<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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};
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pinctrl_ssc1_rx: ssc1_rx-0 {
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atmel,pins =
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<AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>,
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<AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
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<AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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};
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};
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spi0 {
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pinctrl_spi0: spi0-0 {
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atmel,pins =
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<AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
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<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
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<AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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};
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tcb0 {
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pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
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atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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};
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pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
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atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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};
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pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
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atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
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atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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};
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pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
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atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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};
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pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
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atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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};
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pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
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atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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};
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pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
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atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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};
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pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
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atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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};
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};
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usart0 {
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pinctrl_usart0: usart0-0 {
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atmel,pins =
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<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
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<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart0_rts: usart0_rts-0 {
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atmel,pins =
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<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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pinctrl_usart0_cts: usart0_cts-0 {
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atmel,pins =
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<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
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atmel,pins =
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<AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
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<AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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pinctrl_usart0_dcd: usart0_dcd-0 {
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atmel,pins =
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<AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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pinctrl_usart0_ri: usart0_ri-0 {
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atmel,pins =
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<AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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pinctrl_usart0_sck: usart0_sck-0 {
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atmel,pins =
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<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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};
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usart1 {
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pinctrl_usart1: usart1-0 {
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atmel,pins =
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<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
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<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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pinctrl_usart1_rts: usart1_rts-0 {
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atmel,pins =
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<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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};
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pinctrl_usart1_cts: usart1_cts-0 {
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atmel,pins =
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<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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};
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pinctrl_usart1_sck: usart1_sck-0 {
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atmel,pins =
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<AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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};
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};
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|
||||
usart2 {
|
||||
pinctrl_usart2: usart2-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart2_rts: usart2_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart2_cts: usart2_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart2_sck: usart2_sck-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
usart3 {
|
||||
pinctrl_usart3: usart3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart3_rts: usart3_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart3_cts: usart3_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart3_sck: usart3_sck-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff600 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x200>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff800 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x200>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioD: gpio@fffffa00 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffffa00 0x200>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
compatible = "atmel,at91rm9200-pmc";
|
||||
reg = <0xfffffc00 0x100>;
|
||||
};
|
||||
|
||||
rstc@fffffd00 {
|
||||
compatible = "atmel,at91sam9260-rstc";
|
||||
reg = <0xfffffd00 0x10>;
|
||||
};
|
||||
|
||||
shdwc@fffffd10 {
|
||||
compatible = "atmel,at91sam9260-shdwc";
|
||||
reg = <0xfffffd10 0x10>;
|
||||
};
|
||||
|
||||
pit: timer@fffffd30 {
|
||||
compatible = "atmel,at91sam9260-pit";
|
||||
reg = <0xfffffd30 0xf>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
};
|
||||
|
||||
watchdog@fffffd40 {
|
||||
compatible = "atmel,at91sam9260-wdt";
|
||||
reg = <0xfffffd40 0x10>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
compatible = "i2c-gpio";
|
||||
gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */
|
||||
<&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */
|
||||
i2c-gpio,sda-open-drain;
|
||||
i2c-gpio,scl-open-drain;
|
||||
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c_gpio0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@1 {
|
||||
compatible = "i2c-gpio";
|
||||
gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */
|
||||
<&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */
|
||||
i2c-gpio,sda-open-drain;
|
||||
i2c-gpio,scl-open-drain;
|
||||
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c_gpio1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue