OMAPDSS: DISPC: store core clk rate
Store dispc core clock rate so that it's available for calculations even if the HW is disabled. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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@ -97,6 +97,8 @@ static struct {
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int irq;
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unsigned long core_clk_rate;
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u32 fifo_size[DISPC_MAX_NR_FIFOS];
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/* maps which plane is using a fifo. fifo-id -> plane-id */
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int fifo_assignment[DISPC_MAX_NR_FIFOS];
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@ -2951,6 +2953,10 @@ static void dispc_mgr_set_lcd_divisor(enum omap_channel channel, u16 lck_div,
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dispc_write_reg(DISPC_DIVISORo(channel),
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FLD_VAL(lck_div, 23, 16) | FLD_VAL(pck_div, 7, 0));
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if (dss_has_feature(FEAT_CORE_CLK_DIV) == false &&
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channel == OMAP_DSS_CHANNEL_LCD)
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dispc.core_clk_rate = dispc_fclk_rate() / lck_div;
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}
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static void dispc_mgr_get_lcd_divisor(enum omap_channel channel, int *lck_div,
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@ -3056,15 +3062,7 @@ unsigned long dispc_mgr_pclk_rate(enum omap_channel channel)
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unsigned long dispc_core_clk_rate(void)
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{
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int lcd;
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unsigned long fclk = dispc_fclk_rate();
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if (dss_has_feature(FEAT_CORE_CLK_DIV))
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lcd = REG_GET(DISPC_DIVISOR, 23, 16);
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else
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lcd = REG_GET(DISPC_DIVISORo(OMAP_DSS_CHANNEL_LCD), 23, 16);
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return fclk / lcd;
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return dispc.core_clk_rate;
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}
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static unsigned long dispc_plane_pclk_rate(enum omap_plane plane)
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@ -3451,6 +3449,8 @@ static void _omap_dispc_initial_config(void)
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l = FLD_MOD(l, 1, 0, 0);
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l = FLD_MOD(l, 1, 23, 16);
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dispc_write_reg(DISPC_DIVISOR, l);
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dispc.core_clk_rate = dispc_fclk_rate();
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}
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/* FUNCGATED */
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