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SoC changes for omaps for v4.17 

This series is mostly a series from Suman Anna to remove now unused
 platform data that is now coming from device tree. This also make it
 a bit simpler to move the timer code to live under drivers in a
 separate series of patches. There are also few minor clean-ups for
 omap4 PM code.
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Merge tag 'omap-for-v4.17/soc-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

Pull "SoC changes for omaps for v4.17" from Tony Lindgren:

This series is mostly a series from Suman Anna to remove now unused
platform data that is now coming from device tree. This also make it
a bit simpler to move the timer code to live under drivers in a
separate series of patches. There are also few minor clean-ups for
omap4 PM code.

* tag 'omap-for-v4.17/soc-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Fix typo for wakeup_ns_pa_addr
  ARM: OMAP2+: Use v7_invalidate_l1 in omap4_finish_suspend
  ARM: OMAP2+: Remove unused gpio header file references
  ARM: OMAP: Move plat/i2c.h into mach-omap1 folder
  ARM: OMAP2+: Cleanup omap_mcbsp_dev_attr and other legacy data
  ARM: OMAP2+: Cleanup omap2_spi_dev_attr and other legacy data
  ARM: OMAP2+: Cleanup omap_timer_capability_dev_attr usage
  ARM: OMAP2+: Cleanup omap_i2c_dev_attr usage
  ARM: OMAP2+: Cleanup omap_gpio_dev_attr usage
  ARM: OMAP2+: Include types.h directly for hwmod data
This commit is contained in:
Arnd Bergmann 2018-03-07 16:14:15 +01:00
parent dbc7886164 e33509c19d
commit 7b80bd2948
26 changed files with 13 additions and 519 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/mach-omap1/common.h
View File

@ -32,11 +32,10 @@
#include <asm/exception.h>
#include <plat/i2c.h>
#include <mach/irqs.h>
#include "soc.h"
#include "i2c.h"
#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
void omap7xx_map_io(void);

2
arch/arm/mach-omap1/i2c.c
View File

@ -24,8 +24,6 @@
#include <mach/mux.h>
#include "soc.h"
#include <plat/i2c.h>
#define OMAP_I2C_SIZE 0x3f
#define OMAP1_I2C_BASE 0xfffb3800

9
arch/arm/plat-omap/include/plat/i2c.h → arch/arm/mach-omap1/i2c.h
View File

@ -19,8 +19,8 @@
*
*/
#ifndef __PLAT_OMAP_I2C_H
#define __PLAT_OMAP_I2C_H
#ifndef __ARCH_ARM_MACH_OMAP1_I2C_H
#define __ARCH_ARM_MACH_OMAP1_I2C_H
struct i2c_board_info;
struct omap_i2c_bus_platform_data;
@ -47,7 +47,4 @@ static inline int omap_register_i2c_bus_cmdline(void)
}
#endif
struct omap_hwmod;
int omap_i2c_reset(struct omap_hwmod *oh);
#endif /* __PLAT_OMAP_I2C_H */
#endif /* __ARCH_ARM_MACH_OMAP1_I2C_H */

2
arch/arm/mach-omap2/devices.c
View File

@ -8,7 +8,7 @@
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/gpio.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>

2
arch/arm/mach-omap2/hsmmc.c
View File

@ -13,9 +13,7 @@
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/mmc/host.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/platform_data/hsmmc-omap.h>
#include "soc.h"

15
arch/arm/mach-omap2/i2c.h
View File

@ -19,23 +19,10 @@
*
*/
#include <plat/i2c.h>
#ifndef __MACH_OMAP2_I2C_H
#define __MACH_OMAP2_I2C_H
/**
* i2c_dev_attr - OMAP I2C controller device attributes for omap_hwmod
* @fifo_depth: total controller FIFO size (in bytes)
* @flags: differences in hardware support capability
*
* @fifo_depth represents what exists on the hardware, not what is
* actually configured at runtime by the device driver.
*/
struct omap_i2c_dev_attr {
u8 fifo_depth;
u32 flags;
};
struct omap_hwmod;
int omap_i2c_reset(struct omap_hwmod *oh);

1
arch/arm/mach-omap2/msdi.c
View File

@ -23,7 +23,6 @@
#include <linux/kernel.h>
#include <linux/err.h>
#include <linux/platform_data/gpio-omap.h>
#include "prm.h"
#include "common.h"

2
arch/arm/mach-omap2/omap4-sar-layout.h
View File

@ -28,7 +28,7 @@
#define L2X0_AUXCTRL_OFFSET 0xff8
#define L2X0_PREFETCH_CTRL_OFFSET 0xffc
/* CPUx Wakeup Non-Secure Physical Address offsets in SAR_BANK3 */
/* CPUx Wakeup Non-Secure Physical Address offsets in SAR_BANK1 */
#define CPU0_WAKEUP_NS_PA_ADDR_OFFSET 0xa04
#define CPU1_WAKEUP_NS_PA_ADDR_OFFSET 0xa08
#define OMAP5_CPU0_WAKEUP_NS_PA_ADDR_OFFSET 0xe00

11
arch/arm/mach-omap2/omap_hwmod_2420_data.c
View File

@ -14,9 +14,7 @@
*/
#include <linux/i2c-omap.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <linux/omap-dma.h>
#include <plat/dmtimer.h>
#include "omap_hwmod.h"
#include "l3_2xxx.h"
@ -97,13 +95,6 @@ static struct omap_hwmod_class i2c_class = {
.reset = &omap_i2c_reset,
};
static struct omap_i2c_dev_attr i2c_dev_attr = {
.flags = OMAP_I2C_FLAG_NO_FIFO |
OMAP_I2C_FLAG_SIMPLE_CLOCK |
OMAP_I2C_FLAG_16BIT_DATA_REG |
OMAP_I2C_FLAG_BUS_SHIFT_2,
};
/* I2C1 */
static struct omap_hwmod omap2420_i2c1_hwmod = {
.name = "i2c1",
@ -116,7 +107,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = {
},
},
.class = &i2c_class,
.dev_attr = &i2c_dev_attr,
/*
* From mach-omap2/pm24xx.c: "Putting MPU into the WFI state
* while a transfer is active seems to cause the I2C block to
@ -137,7 +127,6 @@ static struct omap_hwmod omap2420_i2c2_hwmod = {
},
},
.class = &i2c_class,
.dev_attr = &i2c_dev_attr,
.flags = HWMOD_16BIT_REG,
};

18
arch/arm/mach-omap2/omap_hwmod_2430_data.c
View File

@ -14,11 +14,8 @@
*/
#include <linux/i2c-omap.h>
#include <linux/platform_data/asoc-ti-mcbsp.h>
#include <linux/platform_data/hsmmc-omap.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <linux/omap-dma.h>
#include <plat/dmtimer.h>
#include "omap_hwmod.h"
#include "l3_2xxx.h"
@ -75,12 +72,6 @@ static struct omap_hwmod_class i2c_class = {
.reset = &omap_i2c_reset,
};
static struct omap_i2c_dev_attr i2c_dev_attr = {
.fifo_depth = 8, /* bytes */
.flags = OMAP_I2C_FLAG_BUS_SHIFT_2 |
OMAP_I2C_FLAG_FORCE_19200_INT_CLK,
};
/* I2C1 */
static struct omap_hwmod omap2430_i2c1_hwmod = {
.name = "i2c1",
@ -102,7 +93,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = {
},
},
.class = &i2c_class,
.dev_attr = &i2c_dev_attr,
};
/* I2C2 */
@ -118,7 +108,6 @@ static struct omap_hwmod omap2430_i2c2_hwmod = {
},
},
.class = &i2c_class,
.dev_attr = &i2c_dev_attr,
};
/* gpio5 */
@ -134,7 +123,6 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
},
},
.class = &omap2xxx_gpio_hwmod_class,
.dev_attr = &omap2xxx_gpio_dev_attr,
};
/* dma attributes */
@ -167,10 +155,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = {
};
/* mcspi3 */
static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = {
.num_chipselect = 2,
};
static struct omap_hwmod omap2430_mcspi3_hwmod = {
.name = "mcspi3",
.main_clk = "mcspi3_fck",
@ -182,7 +166,6 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = {
},
},
.class = &omap2xxx_mcspi_class,
.dev_attr = &omap_mcspi3_dev_attr,
};
/* usbhsotg */
@ -239,7 +222,6 @@ static struct omap_hwmod_class_sysconfig omap2430_mcbsp_sysc = {
static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = {
.name = "mcbsp",
.sysc = &omap2430_mcbsp_sysc,
.rev = MCBSP_CONFIG_TYPE2,
};
static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = {

61
arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
View File

@ -9,10 +9,8 @@
* published by the Free Software Foundation.
*/
#include <linux/platform_data/gpio-omap.h>
#include <linux/types.h>
#include <linux/omap-dma.h>
#include <plat/dmtimer.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include "omap_hwmod.h"
#include "omap_hwmod_common_data.h"
@ -159,7 +157,6 @@ static struct omap_hwmod_class_sysconfig omap2xxx_mcspi_sysc = {
struct omap_hwmod_class omap2xxx_mcspi_class = {
.name = "mcspi",
.sysc = &omap2xxx_mcspi_sysc,
.rev = OMAP2_MCSPI_REV,
};
/*
@ -220,23 +217,7 @@ struct omap_hwmod omap2xxx_iva_hwmod = {
.class = &iva_hwmod_class,
};
/* always-on timers dev attribute */
static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = {
.timer_capability = OMAP_TIMER_ALWON,
};
/* pwm timers dev attribute */
static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = {
.timer_capability = OMAP_TIMER_HAS_PWM,
};
/* timers with DSP interrupt dev attribute */
static struct omap_timer_capability_dev_attr capability_dsp_dev_attr = {
.timer_capability = OMAP_TIMER_HAS_DSP_IRQ,
};
/* timer1 */
struct omap_hwmod omap2xxx_timer1_hwmod = {
.name = "timer1",
.main_clk = "gpt1_fck",
@ -247,13 +228,11 @@ struct omap_hwmod omap2xxx_timer1_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
},
},
.dev_attr = &capability_alwon_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
/* timer2 */
struct omap_hwmod omap2xxx_timer2_hwmod = {
.name = "timer2",
.main_clk = "gpt2_fck",
@ -269,7 +248,6 @@ struct omap_hwmod omap2xxx_timer2_hwmod = {
};
/* timer3 */
struct omap_hwmod omap2xxx_timer3_hwmod = {
.name = "timer3",
.main_clk = "gpt3_fck",
@ -285,7 +263,6 @@ struct omap_hwmod omap2xxx_timer3_hwmod = {
};
/* timer4 */
struct omap_hwmod omap2xxx_timer4_hwmod = {
.name = "timer4",
.main_clk = "gpt4_fck",
@ -301,7 +278,6 @@ struct omap_hwmod omap2xxx_timer4_hwmod = {
};
/* timer5 */
struct omap_hwmod omap2xxx_timer5_hwmod = {
.name = "timer5",
.main_clk = "gpt5_fck",
@ -312,13 +288,11 @@ struct omap_hwmod omap2xxx_timer5_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT,
},
},
.dev_attr = &capability_dsp_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
/* timer6 */
struct omap_hwmod omap2xxx_timer6_hwmod = {
.name = "timer6",
.main_clk = "gpt6_fck",
@ -329,13 +303,11 @@ struct omap_hwmod omap2xxx_timer6_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT,
},
},
.dev_attr = &capability_dsp_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
/* timer7 */
struct omap_hwmod omap2xxx_timer7_hwmod = {
.name = "timer7",
.main_clk = "gpt7_fck",
@ -346,13 +318,11 @@ struct omap_hwmod omap2xxx_timer7_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT,
},
},
.dev_attr = &capability_dsp_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
/* timer8 */
struct omap_hwmod omap2xxx_timer8_hwmod = {
.name = "timer8",
.main_clk = "gpt8_fck",
@ -363,13 +333,11 @@ struct omap_hwmod omap2xxx_timer8_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT,
},
},
.dev_attr = &capability_dsp_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
/* timer9 */
struct omap_hwmod omap2xxx_timer9_hwmod = {
.name = "timer9",
.main_clk = "gpt9_fck",
@ -380,13 +348,11 @@ struct omap_hwmod omap2xxx_timer9_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT,
},
},
.dev_attr = &capability_pwm_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
/* timer10 */
struct omap_hwmod omap2xxx_timer10_hwmod = {
.name = "timer10",
.main_clk = "gpt10_fck",
@ -397,13 +363,11 @@ struct omap_hwmod omap2xxx_timer10_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT,
},
},
.dev_attr = &capability_pwm_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
/* timer11 */
struct omap_hwmod omap2xxx_timer11_hwmod = {
.name = "timer11",
.main_clk = "gpt11_fck",
@ -414,13 +378,11 @@ struct omap_hwmod omap2xxx_timer11_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT,
},
},
.dev_attr = &capability_pwm_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
/* timer12 */
struct omap_hwmod omap2xxx_timer12_hwmod = {
.name = "timer12",
.main_clk = "gpt12_fck",
@ -431,7 +393,6 @@ struct omap_hwmod omap2xxx_timer12_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT,
},
},
.dev_attr = &capability_pwm_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
@ -568,12 +529,6 @@ struct omap_hwmod omap2xxx_dss_venc_hwmod = {
.flags = HWMOD_NO_IDLEST,
};
/* gpio dev_attr */
struct omap_gpio_dev_attr omap2xxx_gpio_dev_attr = {
.bank_width = 32,
.dbck_flag = false,
};
/* gpio1 */
struct omap_hwmod omap2xxx_gpio1_hwmod = {
.name = "gpio1",
@ -587,7 +542,6 @@ struct omap_hwmod omap2xxx_gpio1_hwmod = {
},
},
.class = &omap2xxx_gpio_hwmod_class,
.dev_attr = &omap2xxx_gpio_dev_attr,
};
/* gpio2 */
@ -603,7 +557,6 @@ struct omap_hwmod omap2xxx_gpio2_hwmod = {
},
},
.class = &omap2xxx_gpio_hwmod_class,
.dev_attr = &omap2xxx_gpio_dev_attr,
};
/* gpio3 */
@ -619,7 +572,6 @@ struct omap_hwmod omap2xxx_gpio3_hwmod = {
},
},
.class = &omap2xxx_gpio_hwmod_class,
.dev_attr = &omap2xxx_gpio_dev_attr,
};
/* gpio4 */
@ -635,14 +587,9 @@ struct omap_hwmod omap2xxx_gpio4_hwmod = {
},
},
.class = &omap2xxx_gpio_hwmod_class,
.dev_attr = &omap2xxx_gpio_dev_attr,
};
/* mcspi1 */
static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
.num_chipselect = 4,
};
struct omap_hwmod omap2xxx_mcspi1_hwmod = {
.name = "mcspi1",
.main_clk = "mcspi1_fck",
@ -654,14 +601,9 @@ struct omap_hwmod omap2xxx_mcspi1_hwmod = {
},
},
.class = &omap2xxx_mcspi_class,
.dev_attr = &omap_mcspi1_dev_attr,
};
/* mcspi2 */
static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
.num_chipselect = 2,
};
struct omap_hwmod omap2xxx_mcspi2_hwmod = {
.name = "mcspi2",
.main_clk = "mcspi2_fck",
@ -673,7 +615,6 @@ struct omap_hwmod omap2xxx_mcspi2_hwmod = {
},
},
.class = &omap2xxx_mcspi_class,
.dev_attr = &omap_mcspi2_dev_attr,
};
static struct omap_hwmod_class omap2xxx_counter_hwmod_class = {

3
arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h
View File

@ -139,9 +139,6 @@ extern struct omap_hwmod_class am33xx_epwmss_hwmod_class;
extern struct omap_hwmod_class am33xx_ehrpwm_hwmod_class;
extern struct omap_hwmod_class am33xx_spi_hwmod_class;
extern struct omap_gpio_dev_attr gpio_dev_attr;
extern struct omap2_mcspi_dev_attr mcspi_attrib;
void omap_hwmod_am33xx_reg(void);
void omap_hwmod_am43xx_reg(void);

25
arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
View File

@ -14,9 +14,9 @@
* GNU General Public License for more details.
*/
#include <linux/platform_data/gpio-omap.h>
#include <linux/types.h>
#include <linux/platform_data/hsmmc-omap.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include "omap_hwmod.h"
#include "i2c.h"
#include "wd_timer.h"
@ -537,11 +537,6 @@ struct omap_hwmod_class am33xx_gpio_hwmod_class = {
.rev = 2,
};
struct omap_gpio_dev_attr gpio_dev_attr = {
.bank_width = 32,
.dbck_flag = true,
};
/* gpio1 */
static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
{ .role = "dbclk", .clk = "gpio1_dbclk" },
@ -560,7 +555,6 @@ struct omap_hwmod am33xx_gpio1_hwmod = {
},
.opt_clks = gpio1_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio2 */
@ -581,7 +575,6 @@ struct omap_hwmod am33xx_gpio2_hwmod = {
},
.opt_clks = gpio2_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio3 */
@ -602,7 +595,6 @@ struct omap_hwmod am33xx_gpio3_hwmod = {
},
.opt_clks = gpio3_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpmc */
@ -654,10 +646,6 @@ static struct omap_hwmod_class i2c_class = {
.reset = &omap_i2c_reset,
};
static struct omap_i2c_dev_attr i2c_dev_attr = {
.flags = OMAP_I2C_FLAG_BUS_SHIFT_NONE,
};
/* i2c1 */
struct omap_hwmod am33xx_i2c1_hwmod = {
.name = "i2c1",
@ -670,7 +658,6 @@ struct omap_hwmod am33xx_i2c1_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &i2c_dev_attr,
};
/* i2c1 */
@ -685,7 +672,6 @@ struct omap_hwmod am33xx_i2c2_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &i2c_dev_attr,
};
/* i2c3 */
@ -700,7 +686,6 @@ struct omap_hwmod am33xx_i2c3_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &i2c_dev_attr,
};
/*
@ -893,13 +878,9 @@ static struct omap_hwmod_class_sysconfig am33xx_mcspi_sysc = {
struct omap_hwmod_class am33xx_spi_hwmod_class = {
.name = "mcspi",
.sysc = &am33xx_mcspi_sysc,
.rev = OMAP4_MCSPI_REV,
};
/* spi0 */
struct omap2_mcspi_dev_attr mcspi_attrib = {
.num_chipselect = 2,
};
struct omap_hwmod am33xx_spi0_hwmod = {
.name = "spi0",
.class = &am33xx_spi_hwmod_class,
@ -910,7 +891,6 @@ struct omap_hwmod am33xx_spi0_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &mcspi_attrib,
};
/* spi1 */
@ -924,7 +904,6 @@ struct omap_hwmod am33xx_spi1_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &mcspi_attrib,
};
/*

4
arch/arm/mach-omap2/omap_hwmod_33xx_data.c
View File

@ -17,9 +17,6 @@
#include <linux/i2c-omap.h>
#include "omap_hwmod.h"
#include <linux/platform_data/gpio-omap.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include "omap_hwmod_common_data.h"
#include "control.h"
@ -252,7 +249,6 @@ static struct omap_hwmod am33xx_gpio0_hwmod = {
},
.opt_clks = gpio0_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio0_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* lcdc */

116
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
View File

@ -17,15 +17,11 @@
#include <linux/i2c-omap.h>
#include <linux/power/smartreflex.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/platform_data/hsmmc-omap.h>
#include <linux/omap-dma.h>
#include "l3_3xxx.h"
#include "l4_3xxx.h"
#include <linux/platform_data/asoc-ti-mcbsp.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <plat/dmtimer.h>
#include "soc.h"
#include "omap_hwmod.h"
@ -155,31 +151,6 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = {
.sysc = &omap3xxx_timer_sysc,
};
/* secure timers dev attribute */
static struct omap_timer_capability_dev_attr capability_secure_dev_attr = {
.timer_capability = OMAP_TIMER_ALWON | OMAP_TIMER_SECURE,
};
/* always-on timers dev attribute */
static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = {
.timer_capability = OMAP_TIMER_ALWON,
};
/* pwm timers dev attribute */
static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = {
.timer_capability = OMAP_TIMER_HAS_PWM,
};
/* timers with DSP interrupt dev attribute */
static struct omap_timer_capability_dev_attr capability_dsp_dev_attr = {
.timer_capability = OMAP_TIMER_HAS_DSP_IRQ,
};
/* pwm timers with DSP interrupt dev attribute */
static struct omap_timer_capability_dev_attr capability_dsp_pwm_dev_attr = {
.timer_capability = OMAP_TIMER_HAS_DSP_IRQ | OMAP_TIMER_HAS_PWM,
};
/* timer1 */
static struct omap_hwmod omap3xxx_timer1_hwmod = {
.name = "timer1",
@ -191,7 +162,6 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = {
.idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT,
},
},
.dev_attr = &capability_alwon_dev_attr,
.class = &omap3xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
@ -252,7 +222,6 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = {
.idlest_idle_bit = OMAP3430_ST_GPT5_SHIFT,
},
},
.dev_attr = &capability_dsp_dev_attr,
.class = &omap3xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
@ -268,7 +237,6 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = {
.idlest_idle_bit = OMAP3430_ST_GPT6_SHIFT,
},
},
.dev_attr = &capability_dsp_dev_attr,
.class = &omap3xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
@ -284,7 +252,6 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = {
.idlest_idle_bit = OMAP3430_ST_GPT7_SHIFT,
},
},
.dev_attr = &capability_dsp_dev_attr,
.class = &omap3xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
@ -300,7 +267,6 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = {
.idlest_idle_bit = OMAP3430_ST_GPT8_SHIFT,
},
},
.dev_attr = &capability_dsp_pwm_dev_attr,
.class = &omap3xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
@ -316,7 +282,6 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = {
.idlest_idle_bit = OMAP3430_ST_GPT9_SHIFT,
},
},
.dev_attr = &capability_pwm_dev_attr,
.class = &omap3xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
@ -332,7 +297,6 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = {
.idlest_idle_bit = OMAP3430_ST_GPT10_SHIFT,
},
},
.dev_attr = &capability_pwm_dev_attr,
.class = &omap3xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
@ -348,13 +312,11 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = {
.idlest_idle_bit = OMAP3430_ST_GPT11_SHIFT,
},
},
.dev_attr = &capability_pwm_dev_attr,
.class = &omap3xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
/* timer12 */
static struct omap_hwmod omap3xxx_timer12_hwmod = {
.name = "timer12",
.main_clk = "gpt12_fck",
@ -365,7 +327,6 @@ static struct omap_hwmod omap3xxx_timer12_hwmod = {
.idlest_idle_bit = OMAP3430_ST_GPT12_SHIFT,
},
},
.dev_attr = &capability_secure_dev_attr,
.class = &omap3xxx_timer_hwmod_class,
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
@ -683,11 +644,6 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
};
/* I2C1 */
static struct omap_i2c_dev_attr i2c1_dev_attr = {
.fifo_depth = 8, /* bytes */
.flags = OMAP_I2C_FLAG_BUS_SHIFT_2,
};
static struct omap_hwmod omap3xxx_i2c1_hwmod = {
.name = "i2c1",
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
@ -700,15 +656,9 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = {
},
},
.class = &i2c_class,
.dev_attr = &i2c1_dev_attr,
};
/* I2C2 */
static struct omap_i2c_dev_attr i2c2_dev_attr = {
.fifo_depth = 8, /* bytes */
.flags = OMAP_I2C_FLAG_BUS_SHIFT_2,
};
static struct omap_hwmod omap3xxx_i2c2_hwmod = {
.name = "i2c2",
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
@ -721,17 +671,9 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = {
},
},
.class = &i2c_class,
.dev_attr = &i2c2_dev_attr,
};
/* I2C3 */
static struct omap_i2c_dev_attr i2c3_dev_attr = {
.fifo_depth = 64, /* bytes */
.flags = OMAP_I2C_FLAG_BUS_SHIFT_2,
};
static struct omap_hwmod omap3xxx_i2c3_hwmod = {
.name = "i2c3",
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
@ -744,7 +686,6 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = {
},
},
.class = &i2c_class,
.dev_attr = &i2c3_dev_attr,
};
/*
@ -769,12 +710,6 @@ static struct omap_hwmod_class omap3xxx_gpio_hwmod_class = {
.rev = 1,
};
/* gpio_dev_attr */
static struct omap_gpio_dev_attr gpio_dev_attr = {
.bank_width = 32,
.dbck_flag = true,
};
/* gpio1 */
static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
{ .role = "dbclk", .clk = "gpio1_dbck", },
@ -794,7 +729,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = {
},
},
.class = &omap3xxx_gpio_hwmod_class,
.dev_attr = &gpio_dev_attr,
};
/* gpio2 */
@ -816,7 +750,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = {
},
},
.class = &omap3xxx_gpio_hwmod_class,
.dev_attr = &gpio_dev_attr,
};
/* gpio3 */
@ -838,7 +771,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = {
},
},
.class = &omap3xxx_gpio_hwmod_class,
.dev_attr = &gpio_dev_attr,
};
/* gpio4 */
@ -860,7 +792,6 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = {
},
},
.class = &omap3xxx_gpio_hwmod_class,
.dev_attr = &gpio_dev_attr,
};
/* gpio5 */
@ -883,7 +814,6 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = {
},
},
.class = &omap3xxx_gpio_hwmod_class,
.dev_attr = &gpio_dev_attr,
};
/* gpio6 */
@ -906,7 +836,6 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = {
},
},
.class = &omap3xxx_gpio_hwmod_class,
.dev_attr = &gpio_dev_attr,
};
/* dma attributes */
@ -966,7 +895,6 @@ static struct omap_hwmod_class_sysconfig omap3xxx_mcbsp_sysc = {
static struct omap_hwmod_class omap3xxx_mcbsp_hwmod_class = {
.name = "mcbsp",
.sysc = &omap3xxx_mcbsp_sysc,
.rev = MCBSP_CONFIG_TYPE3,
};
/* McBSP functional clock mapping */
@ -981,7 +909,6 @@ static struct omap_hwmod_opt_clk mcbsp234_opt_clks[] = {
};
/* mcbsp1 */
static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
.name = "mcbsp1",
.class = &omap3xxx_mcbsp_hwmod_class,
@ -998,11 +925,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
};
/* mcbsp2 */
static struct omap_mcbsp_dev_attr omap34xx_mcbsp2_dev_attr = {
.sidetone = "mcbsp2_sidetone",
};
static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
.name = "mcbsp2",
.class = &omap3xxx_mcbsp_hwmod_class,
@ -1016,15 +938,9 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
},
.opt_clks = mcbsp234_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks),
.dev_attr = &omap34xx_mcbsp2_dev_attr,
};
/* mcbsp3 */
static struct omap_mcbsp_dev_attr omap34xx_mcbsp3_dev_attr = {
.sidetone = "mcbsp3_sidetone",
};
static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
.name = "mcbsp3",
.class = &omap3xxx_mcbsp_hwmod_class,
@ -1038,12 +954,9 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
},
.opt_clks = mcbsp234_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks),
.dev_attr = &omap34xx_mcbsp3_dev_attr,
};
/* mcbsp4 */
static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
.name = "mcbsp4",
.class = &omap3xxx_mcbsp_hwmod_class,
@ -1060,8 +973,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
};
/* mcbsp5 */
static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {
.name = "mcbsp5",
.class = &omap3xxx_mcbsp_hwmod_class,
@ -1090,7 +1001,6 @@ static struct omap_hwmod_class omap3xxx_mcbsp_sidetone_hwmod_class = {
};
/* mcbsp2_sidetone */
static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
.name = "mcbsp2_sidetone",
.class = &omap3xxx_mcbsp_sidetone_hwmod_class,
@ -1099,7 +1009,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
};
/* mcbsp3_sidetone */
static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = {
.name = "mcbsp3_sidetone",
.class = &omap3xxx_mcbsp_sidetone_hwmod_class,
@ -1258,14 +1167,9 @@ static struct omap_hwmod_class_sysconfig omap34xx_mcspi_sysc = {
static struct omap_hwmod_class omap34xx_mcspi_class = {
.name = "mcspi",
.sysc = &omap34xx_mcspi_sysc,
.rev = OMAP3_MCSPI_REV,
};
/* mcspi1 */
static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
.num_chipselect = 4,
};
static struct omap_hwmod omap34xx_mcspi1 = {
.name = "mcspi1",
.main_clk = "mcspi1_fck",
@ -1277,14 +1181,9 @@ static struct omap_hwmod omap34xx_mcspi1 = {
},
},
.class = &omap34xx_mcspi_class,
.dev_attr = &omap_mcspi1_dev_attr,
};
/* mcspi2 */
static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
.num_chipselect = 2,
};
static struct omap_hwmod omap34xx_mcspi2 = {
.name = "mcspi2",
.main_clk = "mcspi2_fck",
@ -1296,16 +1195,9 @@ static struct omap_hwmod omap34xx_mcspi2 = {
},
},
.class = &omap34xx_mcspi_class,
.dev_attr = &omap_mcspi2_dev_attr,
};
/* mcspi3 */
static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = {
.num_chipselect = 2,
};
static struct omap_hwmod omap34xx_mcspi3 = {
.name = "mcspi3",
.main_clk = "mcspi3_fck",
@ -1317,16 +1209,9 @@ static struct omap_hwmod omap34xx_mcspi3 = {
},
},
.class = &omap34xx_mcspi_class,
.dev_attr = &omap_mcspi3_dev_attr,
};
/* mcspi4 */
static struct omap2_mcspi_dev_attr omap_mcspi4_dev_attr = {
.num_chipselect = 1,
};
static struct omap_hwmod omap34xx_mcspi4 = {
.name = "mcspi4",
.main_clk = "mcspi4_fck",
@ -1338,7 +1223,6 @@ static struct omap_hwmod omap34xx_mcspi4 = {
},
},
.class = &omap34xx_mcspi_class,
.dev_attr = &omap_mcspi4_dev_attr,
};
/* usbhsotg */

8
arch/arm/mach-omap2/omap_hwmod_43xx_data.c
View File

@ -14,8 +14,6 @@
* GNU General Public License for more details.
*/
#include <linux/platform_data/gpio-omap.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include "omap_hwmod.h"
#include "omap_hwmod_33xx_43xx_common_data.h"
#include "prcm43xx.h"
@ -107,7 +105,6 @@ static struct omap_hwmod am43xx_gpio0_hwmod = {
},
.opt_clks = gpio0_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio0_opt_clks),
.dev_attr = &gpio_dev_attr,
};
static struct omap_hwmod_class_sysconfig am43xx_synctimer_sysc = {
@ -239,7 +236,6 @@ static struct omap_hwmod am43xx_spi2_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &mcspi_attrib,
};
static struct omap_hwmod am43xx_spi3_hwmod = {
@ -253,7 +249,6 @@ static struct omap_hwmod am43xx_spi3_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &mcspi_attrib,
};
static struct omap_hwmod am43xx_spi4_hwmod = {
@ -267,7 +262,6 @@ static struct omap_hwmod am43xx_spi4_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &mcspi_attrib,
};
static struct omap_hwmod_opt_clk gpio4_opt_clks[] = {
@ -288,7 +282,6 @@ static struct omap_hwmod am43xx_gpio4_hwmod = {
},
.opt_clks = gpio4_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks),
.dev_attr = &gpio_dev_attr,
};
static struct omap_hwmod_opt_clk gpio5_opt_clks[] = {
@ -309,7 +302,6 @@ static struct omap_hwmod am43xx_gpio5_hwmod = {
},
.opt_clks = gpio5_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks),
.dev_attr = &gpio_dev_attr,
};
static struct omap_hwmod_class am43xx_ocp2scp_hwmod_class = {

75
arch/arm/mach-omap2/omap_hwmod_44xx_data.c
View File

@ -21,17 +21,12 @@
*/
#include <linux/io.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/platform_data/hsmmc-omap.h>
#include <linux/power/smartreflex.h>
#include <linux/i2c-omap.h>
#include <linux/omap-dma.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <linux/platform_data/asoc-ti-mcbsp.h>
#include <plat/dmtimer.h>
#include "omap_hwmod.h"
#include "omap_hwmod_common_data.h"
#include "cm1_44xx.h"
@ -1083,12 +1078,6 @@ static struct omap_hwmod_class omap44xx_gpio_hwmod_class = {
.rev = 2,
};
/* gpio dev_attr */
static struct omap_gpio_dev_attr gpio_dev_attr = {
.bank_width = 32,
.dbck_flag = true,
};
/* gpio1 */
static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
{ .role = "dbclk", .clk = "gpio1_dbclk" },
@ -1108,7 +1097,6 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = {
},
.opt_clks = gpio1_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio2 */
@ -1131,7 +1119,6 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = {
},
.opt_clks = gpio2_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio3 */
@ -1154,7 +1141,6 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = {
},
.opt_clks = gpio3_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio4 */
@ -1177,7 +1163,6 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = {
},
.opt_clks = gpio4_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio5 */
@ -1200,7 +1185,6 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = {
},
.opt_clks = gpio5_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio6 */
@ -1223,7 +1207,6 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = {
},
.opt_clks = gpio6_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/*
@ -1394,10 +1377,6 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = {
.reset = &omap_i2c_reset,
};
static struct omap_i2c_dev_attr i2c_dev_attr = {
.flags = OMAP_I2C_FLAG_BUS_SHIFT_NONE,
};
/* i2c1 */
static struct omap_hwmod omap44xx_i2c1_hwmod = {
.name = "i2c1",
@ -1412,7 +1391,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &i2c_dev_attr,
};
/* i2c2 */
@ -1429,7 +1407,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &i2c_dev_attr,
};
/* i2c3 */
@ -1446,7 +1423,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &i2c_dev_attr,
};
/* i2c4 */
@ -1463,7 +1439,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &i2c_dev_attr,
};
/*
@ -1702,7 +1677,6 @@ static struct omap_hwmod_class_sysconfig omap44xx_mcbsp_sysc = {
static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = {
.name = "mcbsp",
.sysc = &omap44xx_mcbsp_sysc,
.rev = MCBSP_CONFIG_TYPE4,
};
/* mcbsp1 */
@ -1860,14 +1834,9 @@ static struct omap_hwmod_class_sysconfig omap44xx_mcspi_sysc = {
static struct omap_hwmod_class omap44xx_mcspi_hwmod_class = {
.name = "mcspi",
.sysc = &omap44xx_mcspi_sysc,
.rev = OMAP4_MCSPI_REV,
};
/* mcspi1 */
static struct omap2_mcspi_dev_attr mcspi1_dev_attr = {
.num_chipselect = 4,
};
static struct omap_hwmod omap44xx_mcspi1_hwmod = {
.name = "mcspi1",
.class = &omap44xx_mcspi_hwmod_class,
@ -1880,14 +1849,9 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &mcspi1_dev_attr,
};
/* mcspi2 */
static struct omap2_mcspi_dev_attr mcspi2_dev_attr = {
.num_chipselect = 2,
};
static struct omap_hwmod omap44xx_mcspi2_hwmod = {
.name = "mcspi2",
.class = &omap44xx_mcspi_hwmod_class,
@ -1900,14 +1864,9 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &mcspi2_dev_attr,
};
/* mcspi3 */
static struct omap2_mcspi_dev_attr mcspi3_dev_attr = {
.num_chipselect = 2,
};
static struct omap_hwmod omap44xx_mcspi3_hwmod = {
.name = "mcspi3",
.class = &omap44xx_mcspi_hwmod_class,
@ -1920,14 +1879,9 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &mcspi3_dev_attr,
};
/* mcspi4 */
static struct omap2_mcspi_dev_attr mcspi4_dev_attr = {
.num_chipselect = 1,
};
static struct omap_hwmod omap44xx_mcspi4_hwmod = {
.name = "mcspi4",
.class = &omap44xx_mcspi_hwmod_class,
@ -1940,7 +1894,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &mcspi4_dev_attr,
};
/*
@ -2547,26 +2500,6 @@ static struct omap_hwmod_class omap44xx_timer_hwmod_class = {
.sysc = &omap44xx_timer_sysc,
};
/* always-on timers dev attribute */
static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = {
.timer_capability = OMAP_TIMER_ALWON,
};
/* pwm timers dev attribute */
static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = {
.timer_capability = OMAP_TIMER_HAS_PWM,
};
/* timers with DSP interrupt dev attribute */
static struct omap_timer_capability_dev_attr capability_dsp_dev_attr = {
.timer_capability = OMAP_TIMER_HAS_DSP_IRQ,
};
/* pwm timers with DSP interrupt dev attribute */
static struct omap_timer_capability_dev_attr capability_dsp_pwm_dev_attr = {
.timer_capability = OMAP_TIMER_HAS_DSP_IRQ | OMAP_TIMER_HAS_PWM,
};
/* timer1 */
static struct omap_hwmod omap44xx_timer1_hwmod = {
.name = "timer1",
@ -2581,7 +2514,6 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &capability_alwon_dev_attr,
};
/* timer2 */
@ -2643,7 +2575,6 @@ static struct omap_hwmod omap44xx_timer5_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &capability_dsp_dev_attr,
};
/* timer6 */
@ -2659,7 +2590,6 @@ static struct omap_hwmod omap44xx_timer6_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &capability_dsp_dev_attr,
};
/* timer7 */
@ -2675,7 +2605,6 @@ static struct omap_hwmod omap44xx_timer7_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &capability_dsp_dev_attr,
};
/* timer8 */
@ -2691,7 +2620,6 @@ static struct omap_hwmod omap44xx_timer8_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &capability_dsp_pwm_dev_attr,
};
/* timer9 */
@ -2707,7 +2635,6 @@ static struct omap_hwmod omap44xx_timer9_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &capability_pwm_dev_attr,
};
/* timer10 */
@ -2724,7 +2651,6 @@ static struct omap_hwmod omap44xx_timer10_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &capability_pwm_dev_attr,
};
/* timer11 */
@ -2740,7 +2666,6 @@ static struct omap_hwmod omap44xx_timer11_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &capability_pwm_dev_attr,
};
/*

54
arch/arm/mach-omap2/omap_hwmod_54xx_data.c
View File

@ -18,15 +18,11 @@
*/
#include <linux/io.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/platform_data/hsmmc-omap.h>
#include <linux/power/smartreflex.h>
#include <linux/i2c-omap.h>
#include <linux/omap-dma.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <linux/platform_data/asoc-ti-mcbsp.h>
#include <plat/dmtimer.h>
#include "omap_hwmod.h"
#include "omap_hwmod_common_data.h"
@ -627,12 +623,6 @@ static struct omap_hwmod_class omap54xx_gpio_hwmod_class = {
.rev = 2,
};
/* gpio dev_attr */
static struct omap_gpio_dev_attr gpio_dev_attr = {
.bank_width = 32,
.dbck_flag = true,
};
/* gpio1 */
static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
{ .role = "dbclk", .clk = "gpio1_dbclk" },
@ -652,7 +642,6 @@ static struct omap_hwmod omap54xx_gpio1_hwmod = {
},
.opt_clks = gpio1_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio2 */
@ -675,7 +664,6 @@ static struct omap_hwmod omap54xx_gpio2_hwmod = {
},
.opt_clks = gpio2_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio3 */
@ -698,7 +686,6 @@ static struct omap_hwmod omap54xx_gpio3_hwmod = {
},
.opt_clks = gpio3_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio4 */
@ -721,7 +708,6 @@ static struct omap_hwmod omap54xx_gpio4_hwmod = {
},
.opt_clks = gpio4_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio5 */
@ -744,7 +730,6 @@ static struct omap_hwmod omap54xx_gpio5_hwmod = {
},
.opt_clks = gpio5_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio6 */
@ -767,7 +752,6 @@ static struct omap_hwmod omap54xx_gpio6_hwmod = {
},
.opt_clks = gpio6_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio7 */
@ -790,7 +774,6 @@ static struct omap_hwmod omap54xx_gpio7_hwmod = {
},
.opt_clks = gpio7_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio7_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio8 */
@ -813,7 +796,6 @@ static struct omap_hwmod omap54xx_gpio8_hwmod = {
},
.opt_clks = gpio8_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio8_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/*
@ -839,11 +821,6 @@ static struct omap_hwmod_class omap54xx_i2c_hwmod_class = {
.rev = OMAP_I2C_IP_VERSION_2,
};
/* i2c dev_attr */
static struct omap_i2c_dev_attr i2c_dev_attr = {
.flags = OMAP_I2C_FLAG_BUS_SHIFT_NONE,
};
/* i2c1 */
static struct omap_hwmod omap54xx_i2c1_hwmod = {
.name = "i2c1",
@ -858,7 +835,6 @@ static struct omap_hwmod omap54xx_i2c1_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &i2c_dev_attr,
};
/* i2c2 */
@ -875,7 +851,6 @@ static struct omap_hwmod omap54xx_i2c2_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &i2c_dev_attr,
};
/* i2c3 */
@ -892,7 +867,6 @@ static struct omap_hwmod omap54xx_i2c3_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &i2c_dev_attr,
};
/* i2c4 */
@ -909,7 +883,6 @@ static struct omap_hwmod omap54xx_i2c4_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &i2c_dev_attr,
};
/* i2c5 */
@ -926,7 +899,6 @@ static struct omap_hwmod omap54xx_i2c5_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &i2c_dev_attr,
};
/*
@ -1012,7 +984,6 @@ static struct omap_hwmod_class_sysconfig omap54xx_mcbsp_sysc = {
static struct omap_hwmod_class omap54xx_mcbsp_hwmod_class = {
.name = "mcbsp",
.sysc = &omap54xx_mcbsp_sysc,
.rev = MCBSP_CONFIG_TYPE4,
};
/* mcbsp1 */
@ -1149,15 +1120,9 @@ static struct omap_hwmod_class_sysconfig omap54xx_mcspi_sysc = {
static struct omap_hwmod_class omap54xx_mcspi_hwmod_class = {
.name = "mcspi",
.sysc = &omap54xx_mcspi_sysc,
.rev = OMAP4_MCSPI_REV,
};
/* mcspi1 */
/* mcspi1 dev_attr */
static struct omap2_mcspi_dev_attr mcspi1_dev_attr = {
.num_chipselect = 4,
};
static struct omap_hwmod omap54xx_mcspi1_hwmod = {
.name = "mcspi1",
.class = &omap54xx_mcspi_hwmod_class,
@ -1170,15 +1135,9 @@ static struct omap_hwmod omap54xx_mcspi1_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &mcspi1_dev_attr,
};
/* mcspi2 */
/* mcspi2 dev_attr */
static struct omap2_mcspi_dev_attr mcspi2_dev_attr = {
.num_chipselect = 2,
};
static struct omap_hwmod omap54xx_mcspi2_hwmod = {
.name = "mcspi2",
.class = &omap54xx_mcspi_hwmod_class,
@ -1191,15 +1150,9 @@ static struct omap_hwmod omap54xx_mcspi2_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &mcspi2_dev_attr,
};
/* mcspi3 */
/* mcspi3 dev_attr */
static struct omap2_mcspi_dev_attr mcspi3_dev_attr = {
.num_chipselect = 2,
};
static struct omap_hwmod omap54xx_mcspi3_hwmod = {
.name = "mcspi3",
.class = &omap54xx_mcspi_hwmod_class,
@ -1212,15 +1165,9 @@ static struct omap_hwmod omap54xx_mcspi3_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &mcspi3_dev_attr,
};
/* mcspi4 */
/* mcspi4 dev_attr */
static struct omap2_mcspi_dev_attr mcspi4_dev_attr = {
.num_chipselect = 1,
};
static struct omap_hwmod omap54xx_mcspi4_hwmod = {
.name = "mcspi4",
.class = &omap54xx_mcspi_hwmod_class,
@ -1233,7 +1180,6 @@ static struct omap_hwmod omap54xx_mcspi4_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &mcspi4_dev_attr,
};
/*

53
arch/arm/mach-omap2/omap_hwmod_7xx_data.c
View File

@ -18,15 +18,11 @@
*/
#include <linux/io.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/platform_data/hsmmc-omap.h>
#include <linux/power/smartreflex.h>
#include <linux/i2c-omap.h>
#include <linux/omap-dma.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <linux/platform_data/asoc-ti-mcbsp.h>
#include <plat/dmtimer.h>
#include "omap_hwmod.h"
#include "omap_hwmod_common_data.h"
@ -818,12 +814,6 @@ static struct omap_hwmod_class dra7xx_gpio_hwmod_class = {
.rev = 2,
};
/* gpio dev_attr */
static struct omap_gpio_dev_attr gpio_dev_attr = {
.bank_width = 32,
.dbck_flag = true,
};
/* gpio1 */
static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
{ .role = "dbclk", .clk = "gpio1_dbclk" },
@ -844,7 +834,6 @@ static struct omap_hwmod dra7xx_gpio1_hwmod = {
},
.opt_clks = gpio1_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio2 */
@ -867,7 +856,6 @@ static struct omap_hwmod dra7xx_gpio2_hwmod = {
},
.opt_clks = gpio2_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio3 */
@ -890,7 +878,6 @@ static struct omap_hwmod dra7xx_gpio3_hwmod = {
},
.opt_clks = gpio3_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio4 */
@ -913,7 +900,6 @@ static struct omap_hwmod dra7xx_gpio4_hwmod = {
},
.opt_clks = gpio4_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio5 */
@ -936,7 +922,6 @@ static struct omap_hwmod dra7xx_gpio5_hwmod = {
},
.opt_clks = gpio5_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio6 */
@ -959,7 +944,6 @@ static struct omap_hwmod dra7xx_gpio6_hwmod = {
},
.opt_clks = gpio6_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio7 */
@ -982,7 +966,6 @@ static struct omap_hwmod dra7xx_gpio7_hwmod = {
},
.opt_clks = gpio7_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio7_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/* gpio8 */
@ -1005,7 +988,6 @@ static struct omap_hwmod dra7xx_gpio8_hwmod = {
},
.opt_clks = gpio8_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio8_opt_clks),
.dev_attr = &gpio_dev_attr,
};
/*
@ -1105,11 +1087,6 @@ static struct omap_hwmod_class dra7xx_i2c_hwmod_class = {
.rev = OMAP_I2C_IP_VERSION_2,
};
/* i2c dev_attr */
static struct omap_i2c_dev_attr i2c_dev_attr = {
.flags = OMAP_I2C_FLAG_BUS_SHIFT_NONE,
};
/* i2c1 */
static struct omap_hwmod dra7xx_i2c1_hwmod = {
.name = "i2c1",
@ -1124,7 +1101,6 @@ static struct omap_hwmod dra7xx_i2c1_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &i2c_dev_attr,
};
/* i2c2 */
@ -1141,7 +1117,6 @@ static struct omap_hwmod dra7xx_i2c2_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &i2c_dev_attr,
};
/* i2c3 */
@ -1158,7 +1133,6 @@ static struct omap_hwmod dra7xx_i2c3_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &i2c_dev_attr,
};
/* i2c4 */
@ -1175,7 +1149,6 @@ static struct omap_hwmod dra7xx_i2c4_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &i2c_dev_attr,
};
/* i2c5 */
@ -1192,7 +1165,6 @@ static struct omap_hwmod dra7xx_i2c5_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &i2c_dev_attr,
};
/*
@ -1401,15 +1373,9 @@ static struct omap_hwmod_class_sysconfig dra7xx_mcspi_sysc = {
static struct omap_hwmod_class dra7xx_mcspi_hwmod_class = {
.name = "mcspi",
.sysc = &dra7xx_mcspi_sysc,
.rev = OMAP4_MCSPI_REV,
};
/* mcspi1 */
/* mcspi1 dev_attr */
static struct omap2_mcspi_dev_attr mcspi1_dev_attr = {
.num_chipselect = 4,
};
static struct omap_hwmod dra7xx_mcspi1_hwmod = {
.name = "mcspi1",
.class = &dra7xx_mcspi_hwmod_class,
@ -1422,15 +1388,9 @@ static struct omap_hwmod dra7xx_mcspi1_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &mcspi1_dev_attr,
};
/* mcspi2 */
/* mcspi2 dev_attr */
static struct omap2_mcspi_dev_attr mcspi2_dev_attr = {
.num_chipselect = 2,
};
static struct omap_hwmod dra7xx_mcspi2_hwmod = {
.name = "mcspi2",
.class = &dra7xx_mcspi_hwmod_class,
@ -1443,15 +1403,9 @@ static struct omap_hwmod dra7xx_mcspi2_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &mcspi2_dev_attr,
};
/* mcspi3 */
/* mcspi3 dev_attr */
static struct omap2_mcspi_dev_attr mcspi3_dev_attr = {
.num_chipselect = 2,
};
static struct omap_hwmod dra7xx_mcspi3_hwmod = {
.name = "mcspi3",
.class = &dra7xx_mcspi_hwmod_class,
@ -1464,15 +1418,9 @@ static struct omap_hwmod dra7xx_mcspi3_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &mcspi3_dev_attr,
};
/* mcspi4 */
/* mcspi4 dev_attr */
static struct omap2_mcspi_dev_attr mcspi4_dev_attr = {
.num_chipselect = 1,
};
static struct omap_hwmod dra7xx_mcspi4_hwmod = {
.name = "mcspi4",
.class = &dra7xx_mcspi_hwmod_class,
@ -1485,7 +1433,6 @@ static struct omap_hwmod dra7xx_mcspi4_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &mcspi4_dev_attr,
};
/*

31
arch/arm/mach-omap2/omap_hwmod_81xx_data.c
View File

@ -15,10 +15,9 @@
*
*/
#include <linux/platform_data/gpio-omap.h>
#include <linux/types.h>
#include <linux/platform_data/hsmmc-omap.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <plat/dmtimer.h>
#include "omap_hwmod_common_data.h"
#include "cm81xx.h"
@ -488,11 +487,6 @@ static struct omap_hwmod_class dm81xx_gpio_hwmod_class = {
.rev = 2,
};
static struct omap_gpio_dev_attr gpio_dev_attr = {
.bank_width = 32,
.dbck_flag = true,
};
static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
{ .role = "dbclk", .clk = "sysclk18_ck" },
};
@ -510,7 +504,6 @@ static struct omap_hwmod dm81xx_gpio1_hwmod = {
},
.opt_clks = gpio1_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks),
.dev_attr = &gpio_dev_attr,
};
static struct omap_hwmod_ocp_if dm81xx_l4_ls__gpio1 = {
@ -537,7 +530,6 @@ static struct omap_hwmod dm81xx_gpio2_hwmod = {
},
.opt_clks = gpio2_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks),
.dev_attr = &gpio_dev_attr,
};
static struct omap_hwmod_ocp_if dm81xx_l4_ls__gpio2 = {
@ -654,15 +646,10 @@ static struct omap_hwmod_class dm816x_timer_hwmod_class = {
.sysc = &dm816x_timer_sysc,
};
static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = {
.timer_capability = OMAP_TIMER_ALWON,
};
static struct omap_hwmod dm814x_timer1_hwmod = {
.name = "timer1",
.clkdm_name = "alwon_l3s_clkdm",
.main_clk = "timer1_fck",
.dev_attr = &capability_alwon_dev_attr,
.class = &dm816x_timer_hwmod_class,
.flags = HWMOD_NO_IDLEST,
};
@ -684,7 +671,6 @@ static struct omap_hwmod dm816x_timer1_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &capability_alwon_dev_attr,
.class = &dm816x_timer_hwmod_class,
};
@ -699,7 +685,6 @@ static struct omap_hwmod dm814x_timer2_hwmod = {
.name = "timer2",
.clkdm_name = "alwon_l3s_clkdm",
.main_clk = "timer2_fck",
.dev_attr = &capability_alwon_dev_attr,
.class = &dm816x_timer_hwmod_class,
.flags = HWMOD_NO_IDLEST,
};
@ -721,7 +706,6 @@ static struct omap_hwmod dm816x_timer2_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &capability_alwon_dev_attr,
.class = &dm816x_timer_hwmod_class,
};
@ -742,7 +726,6 @@ static struct omap_hwmod dm816x_timer3_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &capability_alwon_dev_attr,
.class = &dm816x_timer_hwmod_class,
};
@ -763,7 +746,6 @@ static struct omap_hwmod dm816x_timer4_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &capability_alwon_dev_attr,
.class = &dm816x_timer_hwmod_class,
};
@ -784,7 +766,6 @@ static struct omap_hwmod dm816x_timer5_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &capability_alwon_dev_attr,
.class = &dm816x_timer_hwmod_class,
};
@ -805,7 +786,6 @@ static struct omap_hwmod dm816x_timer6_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &capability_alwon_dev_attr,
.class = &dm816x_timer_hwmod_class,
};
@ -826,7 +806,6 @@ static struct omap_hwmod dm816x_timer7_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
.dev_attr = &capability_alwon_dev_attr,
.class = &dm816x_timer_hwmod_class,
};
@ -1138,11 +1117,6 @@ static struct omap_hwmod_class_sysconfig dm816x_mcspi_sysc = {
static struct omap_hwmod_class dm816x_mcspi_class = {
.name = "mcspi",
.sysc = &dm816x_mcspi_sysc,
.rev = OMAP3_MCSPI_REV,
};
static struct omap2_mcspi_dev_attr dm816x_mcspi1_dev_attr = {
.num_chipselect = 4,
};
static struct omap_hwmod dm81xx_mcspi1_hwmod = {
@ -1156,7 +1130,6 @@ static struct omap_hwmod dm81xx_mcspi1_hwmod = {
},
},
.class = &dm816x_mcspi_class,
.dev_attr = &dm816x_mcspi1_dev_attr,
};
static struct omap_hwmod_ocp_if dm81xx_l4_ls__mcspi1 = {

1
arch/arm/mach-omap2/omap_hwmod_common_data.h
View File

@ -19,7 +19,6 @@
#include "display.h"
/* Common IP block data across OMAP2xxx */
extern struct omap_gpio_dev_attr omap2xxx_gpio_dev_attr;
extern struct omap_hwmod omap2xxx_l3_main_hwmod;
extern struct omap_hwmod omap2xxx_l4_core_hwmod;
extern struct omap_hwmod omap2xxx_l4_wkup_hwmod;

7
arch/arm/mach-omap2/sleep44xx.S
View File

@ -90,12 +90,7 @@ skip_secure_l1_clean:
mcr p15, 0, r0, c1, c0, 0
isb
/*
* Invalidate L1 data cache. Even though only invalidate is
* necessary exported flush API is used here. Doing clean
* on already clean cache would be almost NOP.
*/
bl v7_flush_dcache_all
bl v7_invalidate_l1
/*
* Switch the CPU from Symmetric Multiprocessing (SMP) mode

4
arch/arm/plat-omap/include/plat/dmtimer.h
View File

@ -75,10 +75,6 @@
*/
#define OMAP_TIMER_ERRATA_I103_I767 0x80000000
struct omap_timer_capability_dev_attr {
u32 timer_capability;
};
struct timer_regs {
u32 tidr;
u32 tier;

12
include/linux/platform_data/asoc-ti-mcbsp.h
View File

@ -25,10 +25,6 @@
#include <linux/spinlock.h>
#include <linux/clk.h>
#define MCBSP_CONFIG_TYPE2 0x2
#define MCBSP_CONFIG_TYPE3 0x3
#define MCBSP_CONFIG_TYPE4 0x4
/* Platform specific configuration */
struct omap_mcbsp_ops {
void (*request)(unsigned int);
@ -47,14 +43,6 @@ struct omap_mcbsp_platform_data {
int (*force_ick_on)(struct clk *clk, bool force_on);
};
/**
* omap_mcbsp_dev_attr - OMAP McBSP device attributes for omap_hwmod
* @sidetone: name of the sidetone device
*/
struct omap_mcbsp_dev_attr {
const char *sidetone;
};
void omap3_mcbsp_init_pdata_callback(struct omap_mcbsp_platform_data *pdata);
#endif

5
include/linux/platform_data/gpio-omap.h
View File

@ -157,11 +157,6 @@
#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr))
#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES)
struct omap_gpio_dev_attr {
int bank_width; /* GPIO bank width */
bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
};
struct omap_gpio_reg_offs {
u16 revision;
u16 direction;

8
include/linux/platform_data/spi-omap2-mcspi.h
View File

@ -2,10 +2,6 @@
#ifndef _OMAP2_MCSPI_H
#define _OMAP2_MCSPI_H
#define OMAP2_MCSPI_REV 0
#define OMAP3_MCSPI_REV 1
#define OMAP4_MCSPI_REV 2
#define OMAP4_MCSPI_REG_OFFSET 0x100
#define MCSPI_PINDIR_D0_IN_D1_OUT 0
@ -17,10 +13,6 @@ struct omap2_mcspi_platform_config {
unsigned int pin_dir:1;
};
struct omap2_mcspi_dev_attr {
unsigned short num_chipselect;
};
struct omap2_mcspi_device_config {
unsigned turbo_mode:1;