drm/drivers: add support for using the arch wc mapping API.
This fixes a regression in all these drivers since the cache
mode tracking was fixed for mixed mappings. It uses the new
arch API to add the VRAM range to the PAT mapping tracking
tables.
Fixes: 87744ab383
(mm: fix cache mode tracking in vm_insert_mixed())
Reviewed-by: Christian König <christian.koenig@amd.com>.
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
parent
8ef4227615
commit
7cf321d118
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@ -754,6 +754,10 @@ static const char *amdgpu_vram_names[] = {
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int amdgpu_bo_init(struct amdgpu_device *adev)
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int amdgpu_bo_init(struct amdgpu_device *adev)
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{
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{
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/* reserve PAT memory space to WC for VRAM */
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arch_io_reserve_memtype_wc(adev->mc.aper_base,
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adev->mc.aper_size);
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/* Add an MTRR for the VRAM */
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/* Add an MTRR for the VRAM */
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adev->mc.vram_mtrr = arch_phys_wc_add(adev->mc.aper_base,
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adev->mc.vram_mtrr = arch_phys_wc_add(adev->mc.aper_base,
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adev->mc.aper_size);
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adev->mc.aper_size);
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@ -769,6 +773,7 @@ void amdgpu_bo_fini(struct amdgpu_device *adev)
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{
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{
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amdgpu_ttm_fini(adev);
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amdgpu_ttm_fini(adev);
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arch_phys_wc_del(adev->mc.vram_mtrr);
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arch_phys_wc_del(adev->mc.vram_mtrr);
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arch_io_free_memtype_wc(adev->mc.aper_base, adev->mc.aper_size);
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}
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}
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int amdgpu_bo_fbdev_mmap(struct amdgpu_bo *bo,
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int amdgpu_bo_fbdev_mmap(struct amdgpu_bo *bo,
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@ -267,6 +267,8 @@ int ast_mm_init(struct ast_private *ast)
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return ret;
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return ret;
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}
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}
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arch_io_reserve_memtype_wc(pci_resource_start(dev->pdev, 0),
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pci_resource_len(dev->pdev, 0));
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ast->fb_mtrr = arch_phys_wc_add(pci_resource_start(dev->pdev, 0),
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ast->fb_mtrr = arch_phys_wc_add(pci_resource_start(dev->pdev, 0),
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pci_resource_len(dev->pdev, 0));
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pci_resource_len(dev->pdev, 0));
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@ -275,11 +277,15 @@ int ast_mm_init(struct ast_private *ast)
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void ast_mm_fini(struct ast_private *ast)
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void ast_mm_fini(struct ast_private *ast)
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{
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{
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struct drm_device *dev = ast->dev;
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ttm_bo_device_release(&ast->ttm.bdev);
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ttm_bo_device_release(&ast->ttm.bdev);
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ast_ttm_global_release(ast);
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ast_ttm_global_release(ast);
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arch_phys_wc_del(ast->fb_mtrr);
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arch_phys_wc_del(ast->fb_mtrr);
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arch_io_free_memtype_wc(pci_resource_start(dev->pdev, 0),
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pci_resource_len(dev->pdev, 0));
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}
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}
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void ast_ttm_placement(struct ast_bo *bo, int domain)
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void ast_ttm_placement(struct ast_bo *bo, int domain)
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@ -267,6 +267,9 @@ int cirrus_mm_init(struct cirrus_device *cirrus)
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return ret;
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return ret;
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}
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}
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arch_io_reserve_memtype_wc(pci_resource_start(dev->pdev, 0),
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pci_resource_len(dev->pdev, 0));
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cirrus->fb_mtrr = arch_phys_wc_add(pci_resource_start(dev->pdev, 0),
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cirrus->fb_mtrr = arch_phys_wc_add(pci_resource_start(dev->pdev, 0),
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pci_resource_len(dev->pdev, 0));
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pci_resource_len(dev->pdev, 0));
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@ -276,6 +279,8 @@ int cirrus_mm_init(struct cirrus_device *cirrus)
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void cirrus_mm_fini(struct cirrus_device *cirrus)
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void cirrus_mm_fini(struct cirrus_device *cirrus)
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{
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{
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struct drm_device *dev = cirrus->dev;
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if (!cirrus->mm_inited)
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if (!cirrus->mm_inited)
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return;
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return;
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@ -285,6 +290,8 @@ void cirrus_mm_fini(struct cirrus_device *cirrus)
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arch_phys_wc_del(cirrus->fb_mtrr);
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arch_phys_wc_del(cirrus->fb_mtrr);
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cirrus->fb_mtrr = 0;
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cirrus->fb_mtrr = 0;
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arch_io_free_memtype_wc(pci_resource_start(dev->pdev, 0),
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pci_resource_len(dev->pdev, 0));
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}
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}
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void cirrus_ttm_placement(struct cirrus_bo *bo, int domain)
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void cirrus_ttm_placement(struct cirrus_bo *bo, int domain)
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@ -266,6 +266,9 @@ int mgag200_mm_init(struct mga_device *mdev)
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return ret;
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return ret;
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}
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}
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arch_io_reserve_memtype_wc(pci_resource_start(dev->pdev, 0),
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pci_resource_len(dev->pdev, 0));
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mdev->fb_mtrr = arch_phys_wc_add(pci_resource_start(dev->pdev, 0),
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mdev->fb_mtrr = arch_phys_wc_add(pci_resource_start(dev->pdev, 0),
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pci_resource_len(dev->pdev, 0));
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pci_resource_len(dev->pdev, 0));
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@ -274,10 +277,14 @@ int mgag200_mm_init(struct mga_device *mdev)
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void mgag200_mm_fini(struct mga_device *mdev)
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void mgag200_mm_fini(struct mga_device *mdev)
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{
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{
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struct drm_device *dev = mdev->dev;
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ttm_bo_device_release(&mdev->ttm.bdev);
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ttm_bo_device_release(&mdev->ttm.bdev);
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mgag200_ttm_global_release(mdev);
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mgag200_ttm_global_release(mdev);
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arch_io_free_memtype_wc(pci_resource_start(dev->pdev, 0),
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pci_resource_len(dev->pdev, 0));
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arch_phys_wc_del(mdev->fb_mtrr);
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arch_phys_wc_del(mdev->fb_mtrr);
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mdev->fb_mtrr = 0;
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mdev->fb_mtrr = 0;
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}
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}
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@ -398,6 +398,9 @@ nouveau_ttm_init(struct nouveau_drm *drm)
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/* VRAM init */
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/* VRAM init */
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drm->gem.vram_available = drm->device.info.ram_user;
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drm->gem.vram_available = drm->device.info.ram_user;
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arch_io_reserve_memtype_wc(device->func->resource_addr(device, 1),
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device->func->resource_size(device, 1));
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ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_VRAM,
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ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_VRAM,
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drm->gem.vram_available >> PAGE_SHIFT);
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drm->gem.vram_available >> PAGE_SHIFT);
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if (ret) {
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if (ret) {
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@ -430,6 +433,8 @@ nouveau_ttm_init(struct nouveau_drm *drm)
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void
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void
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nouveau_ttm_fini(struct nouveau_drm *drm)
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nouveau_ttm_fini(struct nouveau_drm *drm)
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{
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{
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struct nvkm_device *device = nvxx_device(&drm->device);
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ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_VRAM);
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ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_VRAM);
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ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_TT);
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ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_TT);
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@ -439,4 +444,7 @@ nouveau_ttm_fini(struct nouveau_drm *drm)
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arch_phys_wc_del(drm->ttm.mtrr);
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arch_phys_wc_del(drm->ttm.mtrr);
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drm->ttm.mtrr = 0;
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drm->ttm.mtrr = 0;
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arch_io_free_memtype_wc(device->func->resource_addr(device, 1),
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device->func->resource_size(device, 1));
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}
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}
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@ -446,6 +446,10 @@ void radeon_bo_force_delete(struct radeon_device *rdev)
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int radeon_bo_init(struct radeon_device *rdev)
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int radeon_bo_init(struct radeon_device *rdev)
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{
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{
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/* reserve PAT memory space to WC for VRAM */
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arch_io_reserve_memtype_wc(rdev->mc.aper_base,
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rdev->mc.aper_size);
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/* Add an MTRR for the VRAM */
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/* Add an MTRR for the VRAM */
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if (!rdev->fastfb_working) {
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if (!rdev->fastfb_working) {
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rdev->mc.vram_mtrr = arch_phys_wc_add(rdev->mc.aper_base,
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rdev->mc.vram_mtrr = arch_phys_wc_add(rdev->mc.aper_base,
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@ -463,6 +467,7 @@ void radeon_bo_fini(struct radeon_device *rdev)
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{
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{
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radeon_ttm_fini(rdev);
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radeon_ttm_fini(rdev);
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arch_phys_wc_del(rdev->mc.vram_mtrr);
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arch_phys_wc_del(rdev->mc.vram_mtrr);
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arch_io_free_memtype_wc(rdev->mc.aper_base, rdev->mc.aper_size);
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}
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}
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/* Returns how many bytes TTM can move per IB.
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/* Returns how many bytes TTM can move per IB.
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