ath79: add ATH79_CPU_IRQ() macro
Remove the individual ATH79_CPU_IRQ_* constants and use the new macro instead of those. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4929/ Signed-off-by: John Crispin <blogic@openwrt.org>
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@ -111,7 +111,7 @@ static void __init ath79_usb_setup(void)
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platform_device_register(&ath79_ohci_device);
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ath79_usb_init_resource(ath79_ehci_resources, AR71XX_EHCI_BASE,
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AR71XX_EHCI_SIZE, ATH79_CPU_IRQ_USB);
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AR71XX_EHCI_SIZE, ATH79_CPU_IRQ(3));
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ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v1;
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platform_device_register(&ath79_ehci_device);
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}
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@ -136,7 +136,7 @@ static void __init ar7240_usb_setup(void)
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iounmap(usb_ctrl_base);
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ath79_usb_init_resource(ath79_ohci_resources, AR7240_OHCI_BASE,
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AR7240_OHCI_SIZE, ATH79_CPU_IRQ_USB);
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AR7240_OHCI_SIZE, ATH79_CPU_IRQ(3));
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platform_device_register(&ath79_ohci_device);
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}
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@ -152,7 +152,7 @@ static void __init ar724x_usb_setup(void)
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mdelay(10);
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ath79_usb_init_resource(ath79_ehci_resources, AR724X_EHCI_BASE,
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AR724X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
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AR724X_EHCI_SIZE, ATH79_CPU_IRQ(3));
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ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
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platform_device_register(&ath79_ehci_device);
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}
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@ -169,7 +169,7 @@ static void __init ar913x_usb_setup(void)
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mdelay(10);
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ath79_usb_init_resource(ath79_ehci_resources, AR913X_EHCI_BASE,
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AR913X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
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AR913X_EHCI_SIZE, ATH79_CPU_IRQ(3));
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ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
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platform_device_register(&ath79_ehci_device);
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}
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@ -186,7 +186,7 @@ static void __init ar933x_usb_setup(void)
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mdelay(10);
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ath79_usb_init_resource(ath79_ehci_resources, AR933X_EHCI_BASE,
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AR933X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
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AR933X_EHCI_SIZE, ATH79_CPU_IRQ(3));
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ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
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platform_device_register(&ath79_ehci_device);
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}
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@ -212,7 +212,7 @@ static void __init ar934x_usb_setup(void)
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udelay(1000);
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ath79_usb_init_resource(ath79_ehci_resources, AR934X_EHCI_BASE,
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AR934X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
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AR934X_EHCI_SIZE, ATH79_CPU_IRQ(3));
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ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
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platform_device_register(&ath79_ehci_device);
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}
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@ -55,8 +55,8 @@ static void __init ar913x_wmac_setup(void)
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ath79_wmac_resources[0].start = AR913X_WMAC_BASE;
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ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1;
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ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
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ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;
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ath79_wmac_resources[1].start = ATH79_CPU_IRQ(2);
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ath79_wmac_resources[1].end = ATH79_CPU_IRQ(2);
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}
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@ -83,8 +83,8 @@ static void __init ar933x_wmac_setup(void)
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ath79_wmac_resources[0].start = AR933X_WMAC_BASE;
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ath79_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1;
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ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
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ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;
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ath79_wmac_resources[1].start = ATH79_CPU_IRQ(2);
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ath79_wmac_resources[1].end = ATH79_CPU_IRQ(2);
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t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
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if (t & AR933X_BOOTSTRAP_REF_CLK_40)
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@ -114,7 +114,7 @@ static void __init ath79_misc_irq_init(void)
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handle_level_irq);
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}
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irq_set_chained_handler(ATH79_CPU_IRQ_MISC, ath79_misc_irq_handler);
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irq_set_chained_handler(ATH79_CPU_IRQ(6), ath79_misc_irq_handler);
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}
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static void ar934x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc)
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@ -147,7 +147,7 @@ static void ar934x_ip2_irq_init(void)
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irq_set_chip_and_handler(i, &dummy_irq_chip,
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handle_level_irq);
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irq_set_chained_handler(ATH79_CPU_IRQ_IP2, ar934x_ip2_irq_dispatch);
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irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch);
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}
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asmlinkage void plat_irq_dispatch(void)
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@ -157,22 +157,22 @@ asmlinkage void plat_irq_dispatch(void)
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pending = read_c0_status() & read_c0_cause() & ST0_IM;
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if (pending & STATUSF_IP7)
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do_IRQ(ATH79_CPU_IRQ_TIMER);
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do_IRQ(ATH79_CPU_IRQ(7));
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else if (pending & STATUSF_IP2)
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ath79_ip2_handler();
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else if (pending & STATUSF_IP4)
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do_IRQ(ATH79_CPU_IRQ_GE0);
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do_IRQ(ATH79_CPU_IRQ(4));
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else if (pending & STATUSF_IP5)
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do_IRQ(ATH79_CPU_IRQ_GE1);
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do_IRQ(ATH79_CPU_IRQ(5));
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else if (pending & STATUSF_IP3)
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ath79_ip3_handler();
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else if (pending & STATUSF_IP6)
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do_IRQ(ATH79_CPU_IRQ_MISC);
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do_IRQ(ATH79_CPU_IRQ(6));
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else
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spurious_interrupt();
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@ -188,60 +188,60 @@ asmlinkage void plat_irq_dispatch(void)
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static void ar71xx_ip2_handler(void)
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{
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ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_PCI);
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do_IRQ(ATH79_CPU_IRQ_IP2);
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do_IRQ(ATH79_CPU_IRQ(2));
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}
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static void ar724x_ip2_handler(void)
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{
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ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_PCIE);
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do_IRQ(ATH79_CPU_IRQ_IP2);
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do_IRQ(ATH79_CPU_IRQ(2));
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}
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static void ar913x_ip2_handler(void)
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{
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ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_WMAC);
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do_IRQ(ATH79_CPU_IRQ_IP2);
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do_IRQ(ATH79_CPU_IRQ(2));
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}
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static void ar933x_ip2_handler(void)
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{
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ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_WMAC);
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do_IRQ(ATH79_CPU_IRQ_IP2);
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do_IRQ(ATH79_CPU_IRQ(2));
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}
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static void ar934x_ip2_handler(void)
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{
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do_IRQ(ATH79_CPU_IRQ_IP2);
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do_IRQ(ATH79_CPU_IRQ(2));
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}
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static void ar71xx_ip3_handler(void)
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{
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ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_USB);
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do_IRQ(ATH79_CPU_IRQ_USB);
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do_IRQ(ATH79_CPU_IRQ(3));
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}
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static void ar724x_ip3_handler(void)
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{
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ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_USB);
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do_IRQ(ATH79_CPU_IRQ_USB);
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do_IRQ(ATH79_CPU_IRQ(3));
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}
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static void ar913x_ip3_handler(void)
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{
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ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_USB);
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do_IRQ(ATH79_CPU_IRQ_USB);
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do_IRQ(ATH79_CPU_IRQ(3));
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}
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static void ar933x_ip3_handler(void)
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{
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ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_USB);
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do_IRQ(ATH79_CPU_IRQ_USB);
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do_IRQ(ATH79_CPU_IRQ(3));
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}
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static void ar934x_ip3_handler(void)
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{
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ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_USB);
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do_IRQ(ATH79_CPU_IRQ_USB);
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do_IRQ(ATH79_CPU_IRQ(3));
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}
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void __init arch_init_irq(void)
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@ -127,8 +127,8 @@ ath79_register_pci_ar71xx(void)
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res[0].end = AR71XX_PCI_CFG_BASE + AR71XX_PCI_CFG_SIZE - 1;
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res[1].flags = IORESOURCE_IRQ;
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res[1].start = ATH79_CPU_IRQ_IP2;
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res[1].end = ATH79_CPU_IRQ_IP2;
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res[1].start = ATH79_CPU_IRQ(2);
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res[1].end = ATH79_CPU_IRQ(2);
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res[2].name = "io_base";
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res[2].flags = IORESOURCE_IO;
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@ -208,7 +208,7 @@ int __init ath79_register_pci(void)
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AR724X_PCI_MEM_BASE,
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AR724X_PCI_MEM_SIZE,
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0,
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ATH79_CPU_IRQ_IP2);
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ATH79_CPU_IRQ(2));
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} else if (soc_is_ar9342() ||
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soc_is_ar9344()) {
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u32 bootstrap;
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@ -12,6 +12,8 @@
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#define MIPS_CPU_IRQ_BASE 0
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#define NR_IRQS 48
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#define ATH79_CPU_IRQ(_x) (MIPS_CPU_IRQ_BASE + (_x))
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#define ATH79_MISC_IRQ_BASE 8
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#define ATH79_MISC_IRQ_COUNT 32
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#define ATH79_MISC_IRQ(_x) (ATH79_MISC_IRQ_BASE + (_x))
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@ -24,13 +26,6 @@
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#define ATH79_IP2_IRQ_COUNT 2
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#define ATH79_IP2_IRQ(_x) (ATH79_IP2_IRQ_BASE + (_x))
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#define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2)
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#define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3)
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#define ATH79_CPU_IRQ_GE0 (MIPS_CPU_IRQ_BASE + 4)
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#define ATH79_CPU_IRQ_GE1 (MIPS_CPU_IRQ_BASE + 5)
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#define ATH79_CPU_IRQ_MISC (MIPS_CPU_IRQ_BASE + 6)
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#define ATH79_CPU_IRQ_TIMER (MIPS_CPU_IRQ_BASE + 7)
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#define ATH79_MISC_IRQ_TIMER (ATH79_MISC_IRQ_BASE + 0)
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#define ATH79_MISC_IRQ_ERROR (ATH79_MISC_IRQ_BASE + 1)
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#define ATH79_MISC_IRQ_GPIO (ATH79_MISC_IRQ_BASE + 2)
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