[ARM] 3398/1: Fix the VFP registers loading/storing base address
Patch from Catalin Marinas The current VFP code corrupts the VFP registers (including the control ones) if more than one floating point application is executed at the same time. This patch fixes the updating of the load/store base addresses for the VFP registers. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -102,7 +102,6 @@ vfp_support_entry:
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VFPFMRX r8, FPINST2, NE @ FPINST2 if needed - avoids reading
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VFPFMRX r8, FPINST2, NE @ FPINST2 if needed - avoids reading
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@ nonexistant reg on rev0
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@ nonexistant reg on rev0
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VFPFSTMIA r4 @ save the working registers
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VFPFSTMIA r4 @ save the working registers
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add r4, r4, #8*16+4
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stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2
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stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2
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@ and point r4 at the word at the
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@ and point r4 at the word at the
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@ start of the register dump
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@ start of the register dump
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@ -111,10 +110,9 @@ no_old_VFP_process:
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DBGSTR1 "load state %p", r10
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DBGSTR1 "load state %p", r10
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str r10, [r3] @ update the last_VFP_context pointer
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str r10, [r3] @ update the last_VFP_context pointer
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@ Load the saved state back into the VFP
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@ Load the saved state back into the VFP
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add r4, r10, #8*16+4
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ldmia r4, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2
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VFPFLDMIA r10 @ reload the working registers while
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VFPFLDMIA r10 @ reload the working registers while
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@ FPEXC is in a safe state
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@ FPEXC is in a safe state
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ldmia r10, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2
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tst r1, #FPEXC_FPV2 @ is there an FPINST2 to write?
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tst r1, #FPEXC_FPV2 @ is there an FPINST2 to write?
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VFPFMXR FPINST2, r8, NE @ FPINST2 if needed - avoids writing
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VFPFMXR FPINST2, r8, NE @ FPINST2 if needed - avoids writing
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@ nonexistant reg on rev0
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@ nonexistant reg on rev0
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