EDAC, MCE: Add F15 EX MCE decoder
Integrate the single FIROB signature into an expanded table along with the new BD MCE types. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
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@ -112,6 +112,22 @@ static const char * const f15h_cu_mce_desc[] = {
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"PRB address parity error"
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};
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static const char * const fr_ex_mce_desc[] = {
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"CPU Watchdog timer expire",
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"Wakeup array dest tag",
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"AG payload array",
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"EX payload array",
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"IDRF array",
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"Retire dispatch queue",
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"Mapper checkpoint array",
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"Physical register file EX0 port",
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"Physical register file EX1 port",
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"Physical register file AG0 port",
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"Physical register file AG1 port",
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"Flag register file",
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"DE correctable error could not be corrected"
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};
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static bool f12h_dc_mce(u16 ec, u8 xec)
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{
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bool ret = false;
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@ -651,15 +667,26 @@ EXPORT_SYMBOL_GPL(amd_decode_nb_mce);
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static void amd_decode_fr_mce(struct mce *m)
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{
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if (boot_cpu_data.x86 == 0xf ||
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boot_cpu_data.x86 == 0x11)
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struct cpuinfo_x86 *c = &boot_cpu_data;
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u8 xec = (m->status >> 16) & xec_mask;
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if (c->x86 == 0xf || c->x86 == 0x11)
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goto wrong_fr_mce;
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/* we have only one error signature so match all fields at once. */
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if ((m->status & 0xffff) == 0x0f0f) {
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pr_emerg(HW_ERR "FR Error: CPU Watchdog timer expire.\n");
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return;
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}
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if (c->x86 != 0x15 && xec != 0x0)
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goto wrong_fr_mce;
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pr_emerg(HW_ERR "%s Error: ",
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(c->x86 == 0x15 ? "Execution Unit" : "FIROB"));
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if (xec == 0x0 || xec == 0xc)
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pr_cont("%s.\n", fr_ex_mce_desc[xec]);
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else if (xec < 0xd)
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pr_cont("%s parity error.\n", fr_ex_mce_desc[xec]);
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else
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goto wrong_fr_mce;
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return;
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wrong_fr_mce:
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pr_emerg(HW_ERR "Corrupted FR MCE info?\n");
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