s390/entry: add assembler macro to conveniently tests under mask
Various functions in entry.S perform test-under-mask instructions to test for particular bits in memory. Because test-under-mask uses a mask value of one byte, the mask value and the offset into the memory must be calculated manually. This easily introduces errors and is hard to review and read. Introduce the TSTMSK assembler macro to specify a mask constant and let the macro calculate the offset and the byte mask to generate a test-under-mask instruction. The benefit is that existing symbolic constants can now be used for tests. Also the macro checks for zero mask values and mask values that consist of multiple bytes. Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com> Reviewed-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This commit is contained in:
Hendrik Brueckner
Martin Schwidefsky
parent
0ac277790e
commit
83abeffbd5
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@ -11,8 +11,16 @@
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#ifndef _ASM_S390_NMI_H
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#define _ASM_S390_NMI_H
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#include <linux/const.h>
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#include <linux/types.h>
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#define MCCK_CODE_SYSTEM_DAMAGE _BITUL(63)
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#define MCCK_CODE_CPU_TIMER_VALID _BITUL(63 - 46)
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#define MCCK_CODE_PSW_MWP_VALID _BITUL(63 - 20)
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#define MCCK_CODE_PSW_IA_VALID _BITUL(63 - 23)
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#ifndef __ASSEMBLY__
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struct mci {
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__u32 sd : 1; /* 00 system damage */
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__u32 pd : 1; /* 01 instruction-processing damage */
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@ -63,4 +71,5 @@ struct pt_regs;
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extern void s390_handle_mcck(void);
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extern void s390_do_machine_check(struct pt_regs *regs);
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_S390_NMI_H */
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@ -5,11 +5,35 @@
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#ifndef _ASM_S390_SETUP_H
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#define _ASM_S390_SETUP_H
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#include <linux/const.h>
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#include <uapi/asm/setup.h>
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#define PARMAREA 0x10400
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/*
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* Machine features detected in head.S
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*/
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#define MACHINE_FLAG_VM _BITUL(0)
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#define MACHINE_FLAG_IEEE _BITUL(1)
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#define MACHINE_FLAG_CSP _BITUL(2)
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#define MACHINE_FLAG_MVPG _BITUL(3)
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#define MACHINE_FLAG_DIAG44 _BITUL(4)
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#define MACHINE_FLAG_IDTE _BITUL(5)
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#define MACHINE_FLAG_DIAG9C _BITUL(6)
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#define MACHINE_FLAG_KVM _BITUL(8)
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#define MACHINE_FLAG_ESOP _BITUL(9)
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#define MACHINE_FLAG_EDAT1 _BITUL(10)
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#define MACHINE_FLAG_EDAT2 _BITUL(11)
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#define MACHINE_FLAG_LPAR _BITUL(12)
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#define MACHINE_FLAG_LPP _BITUL(13)
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#define MACHINE_FLAG_TOPOLOGY _BITUL(14)
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#define MACHINE_FLAG_TE _BITUL(15)
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#define MACHINE_FLAG_TLB_LC _BITUL(17)
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#define MACHINE_FLAG_VX _BITUL(18)
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#define MACHINE_FLAG_CAD _BITUL(19)
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#ifndef __ASSEMBLY__
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#include <asm/lowcore.h>
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@ -28,29 +52,6 @@ extern unsigned long max_physmem_end;
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extern void detect_memory_memblock(void);
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/*
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* Machine features detected in head.S
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*/
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#define MACHINE_FLAG_VM (1UL << 0)
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#define MACHINE_FLAG_IEEE (1UL << 1)
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#define MACHINE_FLAG_CSP (1UL << 2)
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#define MACHINE_FLAG_MVPG (1UL << 3)
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#define MACHINE_FLAG_DIAG44 (1UL << 4)
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#define MACHINE_FLAG_IDTE (1UL << 5)
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#define MACHINE_FLAG_DIAG9C (1UL << 6)
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#define MACHINE_FLAG_KVM (1UL << 8)
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#define MACHINE_FLAG_ESOP (1UL << 9)
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#define MACHINE_FLAG_EDAT1 (1UL << 10)
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#define MACHINE_FLAG_EDAT2 (1UL << 11)
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#define MACHINE_FLAG_LPAR (1UL << 12)
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#define MACHINE_FLAG_LPP (1UL << 13)
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#define MACHINE_FLAG_TOPOLOGY (1UL << 14)
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#define MACHINE_FLAG_TE (1UL << 15)
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#define MACHINE_FLAG_TLB_LC (1UL << 17)
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#define MACHINE_FLAG_VX (1UL << 18)
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#define MACHINE_FLAG_CAD (1UL << 19)
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#define MACHINE_IS_VM (S390_lowcore.machine_flags & MACHINE_FLAG_VM)
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#define MACHINE_IS_KVM (S390_lowcore.machine_flags & MACHINE_FLAG_KVM)
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#define MACHINE_IS_LPAR (S390_lowcore.machine_flags & MACHINE_FLAG_LPAR)
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@ -21,6 +21,8 @@
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#include <asm/sigp.h>
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#include <asm/irq.h>
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#include <asm/vx-insn.h>
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#include <asm/setup.h>
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#include <asm/nmi.h>
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__PT_R0 = __PT_GPRS
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__PT_R1 = __PT_GPRS + 8
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@ -138,6 +140,28 @@ _PIF_WORK = (_PIF_PER_TRAP)
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#endif
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.endm
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/*
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* The TSTMSK macro generates a test-under-mask instruction by
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* calculating the memory offset for the specified mask value.
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* Mask value can be any constant. The macro shifts the mask
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* value to calculate the memory offset for the test-under-mask
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* instruction.
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*/
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.macro TSTMSK addr, mask, size=8, bytepos=0
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.if (\bytepos < \size) && (\mask >> 8)
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.if (\mask & 0xff)
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.error "Mask exceeds byte boundary"
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.endif
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TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
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.exitm
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.endif
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.ifeq \mask
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.error "Mask must not be zero"
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.endif
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off = \size - \bytepos - 1
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tm off+\addr, \mask
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.endm
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.section .kprobes.text, "ax"
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/*
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@ -180,7 +204,7 @@ ENTRY(sie64a)
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stg %r2,__SF_EMPTY(%r15) # save control block pointer
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stg %r3,__SF_EMPTY+8(%r15) # save guest register save area
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xc __SF_EMPTY+16(16,%r15),__SF_EMPTY+16(%r15) # host id & reason
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tm __LC_CPU_FLAGS+7,_CIF_FPU # load guest fp/vx registers ?
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TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ?
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jno .Lsie_load_guest_gprs
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brasl %r14,load_fpu_regs # load guest fp/vx regs
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.Lsie_load_guest_gprs:
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@ -194,14 +218,14 @@ ENTRY(sie64a)
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oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
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tm __SIE_PROG20+3(%r14),3 # last exit...
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jnz .Lsie_skip
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tm __LC_CPU_FLAGS+7,_CIF_FPU
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TSTMSK __LC_CPU_FLAGS,_CIF_FPU
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jo .Lsie_skip # exit if fp/vx regs changed
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tm __LC_MACHINE_FLAGS+6,0x20 # MACHINE_FLAG_LPP
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TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
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jz .Lsie_enter
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.insn s,0xb2800000,__LC_CURRENT_PID # set guest id to pid
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.Lsie_enter:
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sie 0(%r14)
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tm __LC_MACHINE_FLAGS+6,0x20 # MACHINE_FLAG_LPP
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TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
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jz .Lsie_skip
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.insn s,0xb2800000,__SF_EMPTY+16(%r15)# set host id
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.Lsie_skip:
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@ -270,7 +294,7 @@ ENTRY(system_call)
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stg %r2,__PT_ORIG_GPR2(%r11)
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stg %r7,STACK_FRAME_OVERHEAD(%r15)
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lgf %r9,0(%r8,%r10) # get system call add.
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tm __TI_flags+7(%r12),_TIF_TRACE
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TSTMSK __TI_flags(%r12),_TIF_TRACE
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jnz .Lsysc_tracesys
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basr %r14,%r9 # call sys_xxxx
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stg %r2,__PT_R2(%r11) # store return value
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@ -278,11 +302,11 @@ ENTRY(system_call)
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.Lsysc_return:
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LOCKDEP_SYS_EXIT
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.Lsysc_tif:
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tm __PT_FLAGS+7(%r11),_PIF_WORK
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TSTMSK __PT_FLAGS(%r11),_PIF_WORK
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jnz .Lsysc_work
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tm __TI_flags+7(%r12),_TIF_WORK
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TSTMSK __TI_flags(%r12),_TIF_WORK
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jnz .Lsysc_work # check for work
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tm __LC_CPU_FLAGS+7,_CIF_WORK
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TSTMSK __LC_CPU_FLAGS,_CIF_WORK
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jnz .Lsysc_work
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.Lsysc_restore:
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lg %r14,__LC_VDSO_PER_CPU
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@ -298,23 +322,23 @@ ENTRY(system_call)
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# One of the work bits is on. Find out which one.
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#
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.Lsysc_work:
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tm __LC_CPU_FLAGS+7,_CIF_MCCK_PENDING
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TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
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jo .Lsysc_mcck_pending
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tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
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TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
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jo .Lsysc_reschedule
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#ifdef CONFIG_UPROBES
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tm __TI_flags+7(%r12),_TIF_UPROBE
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TSTMSK __TI_flags(%r12),_TIF_UPROBE
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jo .Lsysc_uprobe_notify
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#endif
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tm __PT_FLAGS+7(%r11),_PIF_PER_TRAP
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TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP
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jo .Lsysc_singlestep
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tm __TI_flags+7(%r12),_TIF_SIGPENDING
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TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
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jo .Lsysc_sigpending
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tm __TI_flags+7(%r12),_TIF_NOTIFY_RESUME
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TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
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jo .Lsysc_notify_resume
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tm __LC_CPU_FLAGS+7,_CIF_FPU
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TSTMSK __LC_CPU_FLAGS,_CIF_FPU
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jo .Lsysc_vxrs
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tm __LC_CPU_FLAGS+7,_CIF_ASCE
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TSTMSK __LC_CPU_FLAGS,_CIF_ASCE
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jo .Lsysc_uaccess
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j .Lsysc_return # beware of critical section cleanup
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@ -353,7 +377,7 @@ ENTRY(system_call)
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.Lsysc_sigpending:
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lgr %r2,%r11 # pass pointer to pt_regs
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brasl %r14,do_signal
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tm __PT_FLAGS+7(%r11),_PIF_SYSCALL
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TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
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jno .Lsysc_return
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lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
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lg %r10,__TI_sysc_table(%r12) # address of system call table
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@ -413,7 +437,7 @@ ENTRY(system_call)
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basr %r14,%r9 # call sys_xxx
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stg %r2,__PT_R2(%r11) # store return value
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.Lsysc_tracenogo:
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tm __TI_flags+7(%r12),_TIF_TRACE
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TSTMSK __TI_flags(%r12),_TIF_TRACE
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jz .Lsysc_return
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lgr %r2,%r11 # pass pointer to pt_regs
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larl %r14,.Lsysc_return
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@ -553,7 +577,7 @@ ENTRY(io_int_handler)
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lghi %r3,THIN_INTERRUPT
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.Lio_call:
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brasl %r14,do_IRQ
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tm __LC_MACHINE_FLAGS+6,0x10 # MACHINE_FLAG_LPAR
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TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
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jz .Lio_return
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tpi 0
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jz .Lio_return
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@ -563,9 +587,9 @@ ENTRY(io_int_handler)
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LOCKDEP_SYS_EXIT
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TRACE_IRQS_ON
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.Lio_tif:
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tm __TI_flags+7(%r12),_TIF_WORK
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TSTMSK __TI_flags(%r12),_TIF_WORK
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jnz .Lio_work # there is work to do (signals etc.)
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tm __LC_CPU_FLAGS+7,_CIF_WORK
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TSTMSK __LC_CPU_FLAGS,_CIF_WORK
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jnz .Lio_work
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.Lio_restore:
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lg %r14,__LC_VDSO_PER_CPU
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@ -593,7 +617,7 @@ ENTRY(io_int_handler)
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# check for preemptive scheduling
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icm %r0,15,__TI_precount(%r12)
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jnz .Lio_restore # preemption is disabled
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tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
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TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
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jno .Lio_restore
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# switch to kernel stack
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lg %r1,__PT_R15(%r11)
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@ -625,17 +649,17 @@ ENTRY(io_int_handler)
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# One of the work bits is on. Find out which one.
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#
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.Lio_work_tif:
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tm __LC_CPU_FLAGS+7,_CIF_MCCK_PENDING
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TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
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jo .Lio_mcck_pending
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tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
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TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
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jo .Lio_reschedule
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tm __TI_flags+7(%r12),_TIF_SIGPENDING
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TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
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jo .Lio_sigpending
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tm __TI_flags+7(%r12),_TIF_NOTIFY_RESUME
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TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
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jo .Lio_notify_resume
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tm __LC_CPU_FLAGS+7,_CIF_FPU
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TSTMSK __LC_CPU_FLAGS,_CIF_FPU
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jo .Lio_vxrs
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tm __LC_CPU_FLAGS+7,_CIF_ASCE
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TSTMSK __LC_CPU_FLAGS,_CIF_ASCE
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jo .Lio_uaccess
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j .Lio_return # beware of critical section cleanup
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@ -757,12 +781,12 @@ ENTRY(psw_idle)
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ENTRY(save_fpu_regs)
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lg %r2,__LC_CURRENT
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aghi %r2,__TASK_thread
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tm __LC_CPU_FLAGS+7,_CIF_FPU
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TSTMSK __LC_CPU_FLAGS,_CIF_FPU
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bor %r14
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stfpc __THREAD_FPU_fpc(%r2)
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.Lsave_fpu_regs_fpc_end:
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lg %r3,__THREAD_FPU_regs(%r2)
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tm __LC_MACHINE_FLAGS+5,4 # MACHINE_HAS_VX
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TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
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jz .Lsave_fpu_regs_fp # no -> store FP regs
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.Lsave_fpu_regs_vx_low:
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VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3)
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@ -804,10 +828,10 @@ ENTRY(save_fpu_regs)
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load_fpu_regs:
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lg %r4,__LC_CURRENT
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aghi %r4,__TASK_thread
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tm __LC_CPU_FLAGS+7,_CIF_FPU
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TSTMSK __LC_CPU_FLAGS,_CIF_FPU
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bnor %r14
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lfpc __THREAD_FPU_fpc(%r4)
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tm __LC_MACHINE_FLAGS+5,4 # MACHINE_HAS_VX
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TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
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lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area
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jz .Lload_fpu_regs_fp # -> no VX, load FP regs
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.Lload_fpu_regs_vx:
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@ -851,11 +875,11 @@ ENTRY(mcck_int_handler)
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lg %r12,__LC_THREAD_INFO
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larl %r13,cleanup_critical
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lmg %r8,%r9,__LC_MCK_OLD_PSW
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tm __LC_MCCK_CODE,0x80 # system damage?
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TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
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jo .Lmcck_panic # yes -> rest of mcck code invalid
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lghi %r14,__LC_CPU_TIMER_SAVE_AREA
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mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
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tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
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TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
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jo 3f
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la %r14,__LC_SYNC_ENTER_TIMER
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clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
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@ -869,7 +893,7 @@ ENTRY(mcck_int_handler)
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la %r14,__LC_LAST_UPDATE_TIMER
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2: spt 0(%r14)
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mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
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3: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
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3: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID)
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jno .Lmcck_panic # no -> skip cleanup critical
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SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
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.Lmcck_skip:
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@ -889,7 +913,7 @@ ENTRY(mcck_int_handler)
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la %r11,STACK_FRAME_OVERHEAD(%r1)
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lgr %r15,%r1
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ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
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tm __LC_CPU_FLAGS+7,_CIF_MCCK_PENDING
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TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
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jno .Lmcck_return
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TRACE_IRQS_OFF
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brasl %r14,s390_handle_mcck
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@ -1018,7 +1042,7 @@ cleanup_critical:
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.Lcleanup_sie:
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lg %r9,__SF_EMPTY(%r15) # get control block pointer
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tm __LC_MACHINE_FLAGS+6,0x20 # MACHINE_FLAG_LPP
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TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
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jz 0f
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.insn s,0xb2800000,__SF_EMPTY+16(%r15)# set host id
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||||
0: ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
|
||||
|
|
@ -1173,7 +1197,7 @@ cleanup_critical:
|
|||
.quad .Lpsw_idle_lpsw
|
||||
|
||||
.Lcleanup_save_fpu_regs:
|
||||
tm __LC_CPU_FLAGS+7,_CIF_FPU
|
||||
TSTMSK __LC_CPU_FLAGS,_CIF_FPU
|
||||
bor %r14
|
||||
clg %r9,BASED(.Lcleanup_save_fpu_regs_done)
|
||||
jhe 5f
|
||||
|
|
@ -1191,7 +1215,7 @@ cleanup_critical:
|
|||
stfpc __THREAD_FPU_fpc(%r2)
|
||||
1: # Load register save area and check if VX is active
|
||||
lg %r3,__THREAD_FPU_regs(%r2)
|
||||
tm __LC_MACHINE_FLAGS+5,4 # MACHINE_HAS_VX
|
||||
TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
|
||||
jz 4f # no VX -> store FP regs
|
||||
2: # Store vector registers (V0-V15)
|
||||
VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3)
|
||||
|
|
@ -1231,7 +1255,7 @@ cleanup_critical:
|
|||
.quad .Lsave_fpu_regs_done
|
||||
|
||||
.Lcleanup_load_fpu_regs:
|
||||
tm __LC_CPU_FLAGS+7,_CIF_FPU
|
||||
TSTMSK __LC_CPU_FLAGS,_CIF_FPU
|
||||
bnor %r14
|
||||
clg %r9,BASED(.Lcleanup_load_fpu_regs_done)
|
||||
jhe 1f
|
||||
|
|
@ -1244,7 +1268,7 @@ cleanup_critical:
|
|||
lg %r4,__LC_CURRENT
|
||||
aghi %r4,__TASK_thread
|
||||
lfpc __THREAD_FPU_fpc(%r4)
|
||||
tm __LC_MACHINE_FLAGS+5,4 # MACHINE_HAS_VX
|
||||
TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
|
||||
lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area
|
||||
jz 2f # -> no VX, load FP regs
|
||||
4: # Load V0 ..V15 registers
|
||||
|
|
|
|||
Loading…
Reference in New Issue