FRV: ARCH_KMALLOC_MINALIGN was already defined

ARCH_KMALLOC_MINALIGN was already defined in asm/mem-layout.h and so shouldn't
have been added to asm/cache.h as well, but rather altered in place.

The commit that added it to asm/cache.h was:

	commit 69dcf3db03
	Author: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
	Date:   Mon May 24 14:32:54 2010 -0700

	    frv: set ARCH_KMALLOC_MINALIGN

	    Architectures that handle DMA-non-coherent memory need to set
	    ARCH_KMALLOC_MINALIGN to make sure that kmalloc'ed buffer is
	    DMA-safe: the buffer doesn't share a cache with the others.

Signed-off-by: David Howells <dhowells@redhat.com>
cc: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
David Howells 2010-05-28 10:41:16 +01:00 committed by Linus Torvalds
parent 29d03fa12b
commit 8507bb0062
2 changed files with 2 additions and 4 deletions

View File

@ -17,8 +17,6 @@
#define L1_CACHE_SHIFT (CONFIG_FRV_L1_CACHE_SHIFT) #define L1_CACHE_SHIFT (CONFIG_FRV_L1_CACHE_SHIFT)
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
#define __cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES))) #define __cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES))) #define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))

View File

@ -35,8 +35,8 @@
* the slab must be aligned such that load- and store-double instructions don't * the slab must be aligned such that load- and store-double instructions don't
* fault if used * fault if used
*/ */
#define ARCH_KMALLOC_MINALIGN 8 #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
#define ARCH_SLAB_MINALIGN 8 #define ARCH_SLAB_MINALIGN L1_CACHE_BYTES
/*****************************************************************************/ /*****************************************************************************/
/* /*